Patents by Inventor Gaurav Agrawal
Gaurav Agrawal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12291826Abstract: A mat comprising a first side and a second side opposite the first side is disclosed. The mat has a body with a thickness defined between the first side and the second side and a width defined between a first edge and a second edge. A plurality of fortifying members can be positioned between the first side and the second side extend within the body substantially vertically with respect to the width. A lip can extend from the body of the mat and have a first rib having a first rib thickness. A first channel portion can have a first channel thickness whereby the first rib thickness is greater than the first channel thickness.Type: GrantFiled: February 28, 2020Date of Patent: May 6, 2025Assignee: NEWPARK MATS & INTEGRATED SERVICES LLCInventors: Randy Paul Bordelon, James Kerwin McDowell, Gaurav Agrawal, Saad Aziz, Dane Manuel, Adam Marcel
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Patent number: 12215733Abstract: Mat locking pins include a pin body and a wheel housed within the pin body, the wheel configured to be movable from a first position to a second position, wherein in the first position the wheel is housed within the pin body and in the second position at least a portion of the wheel extends from the pin body. Mat systems include such mat locking pins to enable movement of the may system and/or secure two mats together.Type: GrantFiled: October 26, 2022Date of Patent: February 4, 2025Assignee: NEWPARK MATS & INTEGRATED SERVICES LLCInventors: Gaurav Agrawal, Keith J. Murphy, Jared B. Howenstine
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Publication number: 20250019591Abstract: Processes comprising: heat treating a heavy hydrocarbon feedstock in a heat treatment unit to produce a first effluent comprising a heat treated product; at least partially removing a mixture of gas and distillate from the first effluent in a first separation unit to produce a second effluent comprising a separation bottom product; deasphalting the second effluent in a second separation unit in the presence of a first solvent to produce: a soluble product fraction comprising a first portion of the first solvent, a deasphalted oil (DAO) product, and a first pitch product; an insoluble product fraction comprising a second portion of the first solvent and a portion of the first pitch product; and at least partially removing the second portion of the first solvent from the first pitch product in a third separation unit to produce a purified pitch product.Type: ApplicationFiled: September 14, 2022Publication date: January 16, 2025Applicant: ExxonMobil Technology and Engineering CompanyInventors: Stuart E. Smith, Gaurav Agrawal, Mustafa Al-Sabawi, David T. Ferrughelli
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Publication number: 20250012018Abstract: Mats and methods associated therewith are described. The mats include a main body defined by a plurality of sidewalls and two exterior surface walls opposing each other. The main body includes a pattern of internal walls that define internal voids within the main body. At least one primary structural support rib is arranged within the main body and extends between the two surface walls and from one of the plurality of side walls to another of the plurality of side walls. The at least one primary structural support rib traverses the internal voids defined by the pattern of internal walls.Type: ApplicationFiled: September 17, 2024Publication date: January 9, 2025Inventors: Saad Aziz, Gaurav Agrawal
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Publication number: 20240413825Abstract: A digital frequency synthesizer includes a delay-locked loop (DLL) that generates time-delayed versions of a reference clock signal, a clock divider that executes an integer-division operation on one delayed clock signal to generate an integer-divided clock signal, and control circuitry that generates fractional data for enabling a fractional division. The digital frequency synthesizer further includes a first clock selector that selects one delayed clock signal as a DLL clock signal based on the fractional data, a delay chain that generates time-delayed versions of the DLL clock signal, and a second clock selector that selects one delayed clock signal as a selected clock signal based on the fractional data. A rising edge of the integer-divided clock signal is adjusted based on the selected clock signal to generate a fractional-divided clock signal that is a fractional-divided version of the reference clock signal.Type: ApplicationFiled: August 1, 2023Publication date: December 12, 2024Inventors: Gaurav Agrawal, Deependra Kumar Jain
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Publication number: 20240384181Abstract: The present disclosure generally relates to methods for reducing fouling in tar upgrading processes and to apparatus for carrying out such processes. In some embodiments, a method is provided that includes providing a first tar stream, combining the first tar stream with a utility fluid to form a first process stream having a viscosity lower than that of the first tar stream, and heating the first process stream in a pre-heater under liquid phase conditions without feeding molecular hydrogen gas into the pre-heater to form a second process stream exiting the pre-heater.Type: ApplicationFiled: October 3, 2022Publication date: November 21, 2024Inventors: Sundar Narayanan, Gaurav Agrawal, Teng Xu
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Publication number: 20240364330Abstract: A three-port resonant switch includes multiple switching elements coupled in series between a first port and a second port of the resonant switch. Each switching element has a parasitic capacitance across it, and a resistance in the ON-state. The multiple switching elements include a first set and a second set of switching elements. The first set of switching elements and the second set of switching elements are connected in series at a junction. The resonant switch further includes a capacitor connected between the junction and a constant reference potential. In an embodiment, the resonant switch is used in a transceiver, and the three ports are respectively connected to a termination resistor, an antenna via a circulator and a low-noise amplifier of a receiver in the transceiver. The resonant switch has good isolation between the first port and third port and low insertion-loss between the first port and the second port.Type: ApplicationFiled: December 29, 2023Publication date: October 31, 2024Inventor: Gaurav Agrawal
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Patent number: 12129608Abstract: Mats and methods associated therewith are described. The mats include a main body defined by a plurality of sidewalls and two exterior surface walls opposing each other. The main body includes a pattern of internal walls that define internal voids within the main body. At least one primary structural support rib is arranged within the main body and extends between the two surface walls and from one of the plurality of side walls to another of the plurality of side walls. The at least one primary structural support rib traverses the internal voids defined by the pattern of internal walls.Type: GrantFiled: June 2, 2020Date of Patent: October 29, 2024Assignee: NEWPARK MATS & INTEGRATED SERVICES LLCInventors: Saad Aziz, Gaurav Agrawal
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Patent number: 12124426Abstract: In some embodiments, systems, methods, and apparatuses are provided herein useful for managing a plurality of concurrent and nearly concurrent data requests within a computer system. The systems have a main data storage for storing source data, and a high speed, and/or remote data storage for storing computed data. In some embodiments, a combination of data filters and distributed mutex processes are used to eliminate or limit duplicate reads and writes into the high speed data storage units by ensuring only a single service module gets a lock to do the read and update of the cache; and makes it possible for keys to expire and be removed from the data filter. The systems and methods herein have various applications including retail sales environments where the requested data is related to product sales, product availability and the like.Type: GrantFiled: November 1, 2023Date of Patent: October 22, 2024Assignee: Walmart Apollo, LLCInventors: Gaurav Agrawal, Mingfeng Gong, Deiva Saranya Mandadi, Sandeep Singh, Tuo Shi
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Patent number: 12081218Abstract: A multiphase digital frequency synthesizer including a multiphase ring oscillator that provides phased clock signals, a clock divider that divides a phased clock signal by an integer value and a carry value to provide a divided clock signal, positive select circuitry that determines and updates a positive select value with accumulation and a modulo function based on a fractional division factor updated with successive cycles of the divided clock signal, carry circuitry that determines the carry value based on a number of the phased clock signals, positive multiplex circuitry that selects from among the phased clock signal using the positive select value for providing a positive multiplexed clock signal, and fractional phase addition circuitry that provides a first output clock signal based on a selected phased clock signal, the divided clock signal, and the positive multiplexed clock signal. Similar negative select circuitry and duty cycle correction circuitry may be included.Type: GrantFiled: April 6, 2023Date of Patent: September 3, 2024Assignee: NXP USA, Inc.Inventors: Ravi Kumar, Gaurav Agrawal, Deependra Kumar Jain, Krishna Thakur
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Publication number: 20240253337Abstract: Method of manufacturing mats for use as support surfaces include depositing a resin material in a mold shaped to define a mat, depositing a recycled material on a top surface of the deposited resin material, and at least one of heat treating and pressure treating the resin material and the recycled material to generate a formed mat. The recycled material and the resin material are fused together during the treatment by at least one of the heat treating and the pressure treating to form a friction layer of the formed mat comprising the fused resin material and recycled material.Type: ApplicationFiled: January 27, 2023Publication date: August 1, 2024Inventors: Gaurav Agrawal, Dane Manuel
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Publication number: 20240141934Abstract: Mat locking pins include a pin body and a wheel housed within the pin body, the wheel configured to be movable from a first position to a second position, wherein in the first position the wheel is housed within the pin body and in the second position at least a portion of the wheel extends from the pin body. Mat systems include such mat locking pins to enable movement of the may system and/or secure two mats together.Type: ApplicationFiled: October 26, 2022Publication date: May 2, 2024Inventors: Gaurav Agrawal, Keith J. Murphy, Jared B. Howenstine
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Patent number: 11938184Abstract: In alternative embodiments, the invention provides a “triple combination” therapy for treating, ameliorating and preventing Crohn's Disease (or Crohn syndrome, terminal or distal ileitis or regional enteritis) or related disorders and conditions in mammals, such as paratuberculosis in mammals, or Johne's disease, including genetically-predisposed and chronic disorders, where the microbial or bacterial flora of the bowel is at least one causative or symptom-producing factor; and compositions for practicing same. In alternative embodiments, methods and compositions of the invention comprise or comprise use of therapies, medications, formulations and pharmaceuticals comprising active agents that can suppress or eradicate the microbiota super-infection that causes Crohn's Disease or paratuberculosis infection in mammals.Type: GrantFiled: March 16, 2021Date of Patent: March 26, 2024Inventor: Gaurav Agrawal
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Publication number: 20240088879Abstract: A multiphase digital frequency synthesizer including a multiphase ring oscillator that provides phased clock signals, a clock divider that divides a phased clock signal by an integer value and a carry value to provide a divided clock signal, positive select circuitry that determines and updates a positive select value with accumulation and a modulo function based on a fractional division factor updated with successive cycles of the divided clock signal, carry circuitry that determines the carry value based on a number of the phased clock signals, positive multiplex circuitry that selects from among the phased clock signal using the positive select value for providing a positive multiplexed clock signal, and fractional phase addition circuitry that provides a first output clock signal based on a selected phased clock signal, the divided clock signal, and the positive multiplexed clock signal. Similar negative select circuitry and duty cycle correction circuitry may be included.Type: ApplicationFiled: April 6, 2023Publication date: March 14, 2024Inventors: Ravi Kumar, Gaurav Agrawal, Deependra Kumar Jain, Krishna Thakur
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Patent number: 11913179Abstract: Apparatus and methods related to mats and connects are described. The apparatus include a mat having a top side, a bottom side, and an interior defined between the top side and the bottom side, and at least one connector post extending within the interior of the mat, wherein the at least one connector post comprises a connector pin cavity extending within the interior of the mat and configured to receive a connector pin and at least one locking structure configured to engage with a portion of the connector pin and secure the connector pin to the at least one connector post.Type: GrantFiled: October 5, 2020Date of Patent: February 27, 2024Assignee: NEWPARK MATS & INTEGRATED SERVICES LLCInventors: Saad Aziz, Gaurav Agrawal
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Publication number: 20240061827Abstract: In some embodiments, systems, methods, and apparatuses are provided herein useful for managing a plurality of concurrent and nearly concurrent data requests within a computer system. The systems have a main data storage for storing source data, and a high speed, and/or remote data storage for storing computed data. In some embodiments, a combination of data filters and distributed mutex processes are used to eliminate or limit duplicate reads and writes into the high speed data storage units by ensuring only a single service module gets a lock to do the read and update of the cache; and makes it possible for keys to expire and be removed from the data filter. The systems and methods herein have various applications including retail sales environments where the requested data is related to product sales, product availability and the like.Type: ApplicationFiled: November 1, 2023Publication date: February 22, 2024Inventors: Gaurav Agrawal, Mingfeng Gong, Deiva Saranya Mandadi, Sandeep Singh, Tuo Shi
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Publication number: 20230415709Abstract: Methods of manufacturing mats for use as support surfaces include mixing pre-used material with virgin material to form a blended material and forming the mat for use as a support surface from the blended material. Mats for use as support surfaces include a body having a composition of at least 30% by weight of pre-used material and the remainder being virgin material.Type: ApplicationFiled: June 24, 2022Publication date: December 28, 2023Inventors: Dane Manuel, Gaurav Agrawal
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Patent number: 11841843Abstract: In some embodiments, systems, methods, and apparatuses are provided herein useful for managing a plurality of concurrent and nearly concurrent data requests within a computer system. The systems have a main data storage for storing source data, and a high speed, and/or remote data storage for storing computed data. In some embodiments, a combination of data filters and distributed mutex processes are used to eliminate or limit duplicate reads and writes into the high speed data storage units by ensuring only a single service module gets a lock to do the read and update of the cache; and makes it possible for keys to expire and be removed from the data filter. The systems and methods herein have various applications including retail sales environments where the requested data is related to product sales, product availability and the like.Type: GrantFiled: July 21, 2022Date of Patent: December 12, 2023Assignee: Walmart Apollo, LLCInventors: Gaurav Agrawal, Mingfeng Gong, Deiva Saranya Mandadi, Sandeep Singh, Tuo Shi
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Publication number: 20230364675Abstract: Polycrystalline compacts include a polycrystalline superabrasive material comprising a first plurality of grains of superabrasive material having a first average grain size and a second plurality of grains of superabrasive material having a second average grain size smaller than the first average grain size. The first plurality of grains is dispersed within a substantially continuous matrix of the second plurality of grains. Earth-boring tools may include a body and at least one polycrystalline compact attached thereto. Methods of forming polycrystalline compacts may include coating relatively larger grains of superabrasive material with relatively smaller grains of superabrasive material, forming a green structure comprising the coated grains, and sintering the green structure. Other methods include mixing diamond grains with a catalyst and subjecting the mixture to a pressure greater than about five gigapascals (5.0 GPa) and a temperature greater than about 1,300° C.Type: ApplicationFiled: May 17, 2023Publication date: November 16, 2023Inventors: Danny E. Scott, Anthony A. DiGiovanni, Gaurav Agrawal, Soma Chakraborty
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Publication number: 20230334284Abstract: Embodiments of the present disclosure include systems and methods for sparsifying vectors for neural network models based on overlapping windows. A window is used to select a first set of elements in a vector of elements. A first element is selected from the first set of elements having the highest absolute value. The window is slid along the vector by a defined number of elements. The window is used to select a second set of elements in the vector, wherein the first set of elements and the second set of elements share at least one common element. A second element is selected from the second set of elements having the highest absolute value.Type: ApplicationFiled: May 27, 2022Publication date: October 19, 2023Inventors: Girish Vishnu VARATKAR, Ankit MORE, Bita DARVISH ROUHANI, Mattheus C. HEDDES, Gaurav AGRAWAL