Abstract: An operational optical transceiver (or transmitter or receiver) configured to contain a module command interface. The optical transceiver includes at least one processor, a memory location dedicated for high level commands, and a library of microcode that control specific optical transceiver operations. A high level command is written to the memory location dedicated for high level commands. The processor determines that the high level command has been written to the memory location, identifies what the command is, and executes microcode from the microcode library that corresponds to the high level command. The executed microcode causes the optical transceiver to perform the operation directed by the high level command.

Abstract: An architecture and method in an integrated circuit for configuring a controller to facilitate communication with a plurality of external device interfaces. The integrated circuit includes a processor, a first memory, a second memory, including a plurality of dedicated memory blocks containing configuration data, and a plurality of external device interfaces. The processor is configured to write a microcode instruction to the first memory. The controller is configured to read the microcode instruction in the first memory and as a result access one of the plurality of dedicated memory blocks. Next, the controller processes the configuration data in the dedicated memory block according to the microcode instruction. As a result, the controller is configured to communicate with one of the plurality of external device interfaces. This process may be repeated as needed to configure the controller to communicate with different device interfaces using different communication protocols.

Abstract: An operational optical transceiver configured to initiate operation in loop back mode. The optical transceiver includes transmit and receive signal paths, a memory capable of having microcode written to it, and a configurable switch array that is used to connect and disconnect the two signal paths as appropriate for a desired loop back mode. The microcode is structured to cause the optical transceiver to control the configurable switch array. This allows for analysis and diagnostics of the signal data.

Abstract: Two or more optical transceivers coupled to each other by an optical link to optimize communication over the optical link. A first transceiver generates electrical data that represents an operational parameter for optimization. The transceiver then converts the electrical data into an optical signal and transmits the optical signal over the optical link to a second transceiver. The second transceiver recovers the electrical data from the optical signal and uses the recovered electrical data to change characteristics of the optical signal transmitted by the second transceiver.

Abstract: A method for dynamically updating an optical transceiver (or optical transmitter or optical receiver) that has at least one processor, a persistent memory, and a microcode loader mechanism. The persistent memory includes microcode comprising instructions that, when executed by the at least one processor, control at least one component of the optical transceiver, transmitter, or receiver. In order to implement the invention, data is written to the persistent memory of the optical transceiver to indicate that an updating of microcode currently stored on the persistent memory is to occur. The optical transceiver processes received microcode, which contains instructions that are structured such that when executed by the at least one processor of the optical transceiver, the execution of the instructions affects the operation of the optical transceiver. Then, the processed representation of the received microcode is written to the persistent memory.

Abstract: A microcode configurable frequency clock that may be used to control the speed of high speed comparison in an operational optical transceiver. The frequency clock includes a memory and a logic circuit. The memory receives microcode generated data relating to the desired speed of comparison. The logic circuit is configured to receive an input clock signal and to produce an output clock signal by frequency dividing the input signal based on the microcode generated data. The output clock is used to control the speed of comparison in the optical transceiver.

Abstract: An operational optical transceiver configured to self-validate a boot image loaded from the persistent memory early in the boot process. The optical transceiver includes a persistent memory, a controller, and a system memory. The controller initializes the boot process and begins to load information from the persistent memory to the system memory. Next, the controller detects early in the boot process boot image verification data in the information being sent to the system memory. The controller then determines if the boot image verification data has an expected value. If the verification data includes the expected value, the controller continues the boot process. If the verification data does not include the expected value, the controller will retry the boot process a predetermined number of times and will enter a default operational state if the expected value is not detected while retrying the boot process the predetermined number of times.

Abstract: A method for two or more optical transceivers coupled to each other by an optical link to optimize communication over the optical link. A first transceiver generates electrical data that represents an operational parameter for optimization. The transceiver then converts the electrical data into an optical signal and transmits the optical signal over the optical link to a second transceiver. The second transceiver recovers the electrical data from the optical signal and uses the recovered electrical data to change characteristics of the optical signal transmitted by the second transceiver.

Abstract: An optical transmit and receive circuit that includes a single control module that controls the transmit and receive operational behaviors in multiple transmit and receive data paths of the optical transmit and receive circuit. By having a single control module control operational behaviors of multiple electro-optic transducer drivers, and multiple post-amplifiers, the size of the overall combination may be reduced.

Abstract: A microcode configurable frequency clock that may be used to control the speed of high speed comparison in an operational optical transceiver. The frequency clock includes a memory and a logic circuit. The memory receives microcode generated data relating to the desired speed of comparison. The logic circuit is configured to receive an input clock signal and to produce an output clock signal by frequency dividing the input signal based on the microcode generated data. The output clock is used to control the speed of comparison in the optical transceiver.

Abstract: An optical transceiver (or optical transmitter or optical receiver) that is coupled to a host computing system. The optical transceiver includes a system memory and at least one processor. The optical transceiver operates at least in part by the processor executing microcode from system memory. In order to change operation, the optical transceiver pages microcode segments from the host computing system to the system memory of the optical transceiver to adjust for changing operational circumstances. For example, by this paging, microcode segments that are more likely to be used given the current operational circumstances are loaded into the system memory of the optical transceiver, while microcode segments that are less likely to be used given the current operational circumstances are retained at the host computing system.

Abstract: A telecommunications system and constituent two-wire interface module. The two wire interface module includes a logic component configured to communicate over the same pair of wires using different two-wire interface protocols depending on an input signal presented on a configuration input. This configurability allows the two-wire interface module to use the same two wires to communicate with a variety of other two-wire interface modules, even if those two-wire interface modules communicate using different two-wire interface protocols.

Abstract: An optical transceiver host computing system (hereinafter simply referred as the “host”) printed circuit board has multiple optical transceivers directly mounted to it. Each optical transceiver is configured to convert an electrical signal into an optical signal and to transmit the optical signal and to receive an optical signal and convert the received signal into an electrical signal. By directly mounting the optical transceivers to the host printed circuit board, an increased number of transceivers may be supported by a single host without increasing the overall size of the host.

Abstract: An operational optical transceiver configured to self-validate a boot image loaded from the persistent memory early in the boot process. The optical transceiver includes a persistent memory, a controller, and a system memory. The controller initializes the boot process and begins to load information from the persistent memory to the system memory. Next, the controller detects early in the boot process boot image verification data in the information being sent to the system memory. The controller then determines if the boot image verification data has an expected value. If the verification data includes the expected value, the controller continues the boot process. If the verification data does not include the expected value, the controller will retry the boot process a predetermined number of times and will enter a default operational state if the expected value is not detected while retrying the boot process the predetermined number of times.

Abstract: An optical transceiver (or transmitter or receiver) that uses microcode that represents a formulaic relation between temperature and an appropriate value for an operational parameter given the temperature. The microcode is further structured such that when loaded into system memory and executed by the optical transceiver, the optical transceiver accesses the temperature as measured by a temperature sensor, calculates an appropriate value for the operational parameter given the accessed temperature using the formulaic relation, and adjusts the operational parameter according to the calculation. This allows the optical transceiver to adjust temperature-dependent operational parameters using less memory than required to perform a table-based representation of temperature versus the operational parameter.

Abstract: Mechanisms for configuring an integrated circuit to select one of multiple external device interfaces at a time to use during communication with external devices. The integrated circuit includes a control mechanism, a selection mechanism, and a plurality of external device interfaces. The plurality of device interfaces allow the integrated circuit to communicate with various external devices that support different communication protocols. The control mechanism is configured to designate the selection of one of the plurality of device interfaces for use in communicating with an external device. The control mechanism makes use of the selection mechanism to select the designated device interface to communicate with using the communication protocol supported by the selected interface. The communication may be receiving data from the interface or providing data to the interface. Non-selected interfaces are put in an inactive state.

Abstract: An optical transceiver that custom logs information based on input from a host computing system (hereinafter referred to as a “host”). The optical transceiver receives input from the host concerning which operational information to log; the operational information may include statistical data about system operation, or measured parameters, or any other measurable system characteristic. The input from the host may also specify one or more storage locations corresponding to the identified operational information. If one or more storage locations are specified, the optical transceiver logs the information to the corresponding storage locations, which may be an on-transceiver persistent memory, the memory of the host or any other accessible logging location. Additionally, the input from the host may specify one or more actions to be performed when the identified information is logged. If one or more actions are specified, the optical transceiver performs the specified actions when the information is logged.

Abstract: An operational optical transceiver microcontroller configured to initiate a self-test using internalized loop backs. The microcontroller includes a memory, at least one processor and a number of input and output terminals. The output terminals are coupled to internally corresponding input terminals by a configurable switch. The memory receives microcode that, when executed by the processor, causes the microcontroller to close the switches so as to internally connect the output and input terminals. A signal is then asserted on the output terminal. This signal loops back and is received by the input terminal. The processor may then detect the microcontroller's response to the signal.

Abstract: An optical transceiver (or optical transmitter or optical receiver) that has at least one processor and a memory. The optical transceiver receives encrypted microcode from a source. The optical transceiver may then decrypt the received microcode to create decrypted microcode. The decrypted microcode is then written to the memory, where it may be executed by the at least one processor. The microcode, when executed by the at least one processor, controls one or more functions of the optical transceiver.

Abstract: An optical transceiver (or optical transmitter or optical receiver) that has at least one processor, and a memory. The optical transceiver is capable of implementing any one of a number of protocols depending on how the optical transceiver is configured in microcode. In order to so configure the optical transceiver, the optical transceiver is provided with one of a particular set of microcode, each of the set of microcode being capable of implementing a different protocol when received into the memory and executed. To implement the protocol, the provided microcode is then executed by the optical transceiver. To implement a different protocol, different microcode may be provided to the optical transceiver and executed.