Patents by Inventor Glenn Rinne
Glenn Rinne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6418033Abstract: Microelectronic packages include a first microelectronic substrate, a second microelectronic substrate that is oriented at an acute angle relative to the first microelectronic substrate, and first solder bumps between the first and second microelectronic substrates, adjacent an edge of the second microelectronic substrate, that connect the second microelectronic substrate to the first microelectronic substrate and that are confined to within the edge of the second microelectronic substrate. The edge of the second microelectronic substrate is adjacent the vertex of the acute angle. A third microelectronic substrate also may be provided on the first microelectronic substrate that laterally overlaps the second microelectronic substrate. Second solder bumps connect the third microelectronic substrate to the first microelectronic substrate. The second and third microelectronic substrates may be oriented parallel to one another at the acute angle relative to the first microelectronic substrate.Type: GrantFiled: November 16, 2000Date of Patent: July 9, 2002Assignee: Unitive Electronics, Inc.Inventor: Glenn A. Rinne
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Publication number: 20020074381Abstract: Methods of bonding two components may include positioning the components relative to one another to obtain a desired orientation. Once the desired orientation is obtained, the components can be bonded in the desired orientation with metal wherein a temperature of both components is maintained below a melting temperature of the metal while bonding. Related structures are also discussed.Type: ApplicationFiled: December 14, 2001Publication date: June 20, 2002Applicant: Unitive International LimitedInventors: Glenn A. Rinne, Krishna K. Nair
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Patent number: 6392163Abstract: A controlled-shaped solder reservoir provides additional solder to a bump in the step for increasing the volume of solder forming the solder bump. The controlled shaped reservoirs can be shaped and sized to provide predetermined amounts of solder to the solder bump. Thus, the height of the resulting solder bump can be predetermined. The solder reservoirs can be shaped to take a minimum amount of space, such as by at least partially wrapping around the solder bump. Consequently, the solder bumps may have increased height without adding to the space requirements of the solder bump, or without increasing the fabrication cost. In addition, due to the finite time required for solder flow, a means of sequencing events during soldering is provided.Type: GrantFiled: February 22, 2001Date of Patent: May 21, 2002Assignee: Unitive International LimitedInventors: Glenn A. Rinne, Paul A. Magill
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Patent number: 6389691Abstract: A method for forming routing conductors and solder bumps on a microelectronic substrate includes the steps of forming an under bump metallurgy layer on the substrate and forming a solder structure on the under bump metallurgy layer where the solder structure includes an elongate portion and an enlarged width portion. The portions of the under bump metallurgy layer not covered by the solder structure can be selectively removed using the solder structure as a mask. In addition, the solder is caused to flow from the elongate portion of the solder structure to the enlarged width solder portion thereby forming a raised solder bump. This step is preferably performed by heating the solder structure above its liquidus temperature allowing surface tension induced internal pressures to affect the flow. Various solder structures are also disclosed.Type: GrantFiled: April 5, 1999Date of Patent: May 21, 2002Assignee: Unitive International LimitedInventors: Glenn A. Rinne, Joseph Daniel Mis
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Publication number: 20020056742Abstract: A first substrate is attached to a second substrate by providing solder structures that include a first portion adjacent the second substrate that has a first melting point, and a second portion adjacent the first substrate that has a second melting point that is lower than the first melting point. The solder structures then are heated to a first temperature that is at or above the second melting point but below the first melting point, to melt the second portions. Simultaneous with the heating of the solder structures to the first temperature, the first substrate is attached to the second substrate while the second portions are melted. Finally, the solder structures are heated to a second temperature that is above the first temperature, to alloy at least some of the first portions and the second portions.Type: ApplicationFiled: November 2, 2001Publication date: May 16, 2002Inventor: Glenn A. Rinne
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Patent number: 6388203Abstract: A controlled-shaped solder reservoir provides additional solder to a bump in the flow step for increasing the volume of solder forming the solder bump. The controlled shaped reservoirs can be shaped and sized to provide predetermined amounts of solder to the solder bump. Thus, the height of the resulting solder bump can be predetermined. The solder reservoirs can be shaped to take a minimum amount of space, such as by at least partially wrapping around the solder bump. Consequently, the solder bumps may have increased height without adding to the space requirements of the solder bump, or without increasing the fabrication cost. In addition, due to the finite time required for solder flow, a means of sequencing events during soldering is provided.Type: GrantFiled: July 24, 1998Date of Patent: May 14, 2002Assignee: Unitive International LimitedInventors: Glenn A. Rinne, Paul A. Magill
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Publication number: 20020020551Abstract: A controlled-shaped solder reservoir provides additional solder to a bump in the flow step for increasing the volume of solder forming the solder bump. The controlled shaped reservoirs can be shaped and sized to provide predetermined amounts of solder to the solder bump. Thus, the height of the resulting solder bump can be predetermined. The solder reservoirs can be shaped to take a minimum amount of space, such as by at least partially wrapping around the solder bump. Consequently, the solder bumps may have increased height without adding to the space requirements of the solder bump, or without increasing the fabrication cost. In addition, due to the finite time required for solder flow, a means of sequencing events during soldering is provided.Type: ApplicationFiled: February 22, 2001Publication date: February 21, 2002Applicant: MCNCInventors: Glenn A. Rinne, Paul A. Magill
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Patent number: 6329608Abstract: A flip-ship structure having a semiconductor substrate including an electronic device formed thereon, a contact pad on said semiconductor substrate electrically connected to said electronic device, a passivation layer on said semiconductor substrate and on said contact pad wherein said passivation layer defines a contact hole therein exposing a portion of said contact pad, an under-bump metallurgy structure on said passivation layer electrically contacting said portion of said contact pad that is exposed; and a solder structure on said under-bump metallurgy structure opposite said semiconductor substrate, said solder structure including an elongate portion on said elongate portion of said metallurgy structure opposite said contact pad and an enlarged width portion on said enlarged width portion of said metallurgy structure opposite said passivation layer.Type: GrantFiled: April 5, 1999Date of Patent: December 11, 2001Assignee: Unitive International LimitedInventors: Glenn A. Rinne, Joseph Daniel Mis
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Patent number: 6233088Abstract: A reflector having a mechanically deformable portion of at least one reflective surface is disclosed. By deforming the portion of the reflective surface, discontinuity is introduced in that portion of the reflective surface. The discontinuity in the reflective surface scatters incident radiation signals so as to cause attenuation in the reflected signal. By selectively deforming the portion of the reflective surface, the reflected signal can be modulated to encode data thereon. The mechanically deformable portion of the reflective surface preferably comprises plates integrally formed therein.Type: GrantFiled: August 10, 2000Date of Patent: May 15, 2001Assignee: MCNCInventors: Mark W. Roberson, Glenn A. Rinne, Philip A. Deane, Karen W. Markus
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Patent number: 6137623Abstract: A reflector having a mechanically deformable portion of at least one reflective surface is disclosed. By deforming the portion of the reflective surface, discontinuity is introduced in that portion of the reflective surface. The discontinuity in the reflective surface scatters incident radiation signals so as to cause attenuation in the reflected signal. By selectively deforming the portion of the reflective surface, the reflected signal can be modulated to encode data thereon. The mechanically deformable portion of the reflective surface preferably comprises plates integrally formed therein.Type: GrantFiled: March 17, 1998Date of Patent: October 24, 2000Assignee: MCNCInventors: Mark W. Roberson, Glenn A. Rinne, Philip A. Deane, Karen W. Markus
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Patent number: 6117299Abstract: Methods of electroplating solder bumps of uniform height on integrated circuit substrates include the steps of drawing plating current through an integrated circuit wafer by electrically shorting an integrated circuit's ground, power and signal pads together using an ultra-thin plating base layer (e.g., <0.075 .mu.m thick) and then using a backside wafer contact to draw electroplating current along parallel paths which extend through the ground and signal pads and into the substrate. The ground pads are preferably electrically coupled to the substrate at substrate contact regions (e.g., N + or P + diffusion regions) and the signal pads are preferably electrically coupled to the substrate through active semiconductor devices (e.g., FETs, BJTs, . . . ) to which the signal pads are attached. Plating current is preferably drawn in parallel through an integrated circuit's active semiconductor devices and substrate contact regions.Type: GrantFiled: May 9, 1997Date of Patent: September 12, 2000Assignee: MCNCInventors: Glenn A. Rinne, Christine Lizzul
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Patent number: 6013381Abstract: A method for pretreating a solder surface for fluxless soldering is disclosed. The method uses a noble fluorine gas to remove surface oxides from solder surfaces, without the use of external stimulation. A noble fluorine gas is suffused across the solder surface to reduce or eliminate or chemically convert the surface oxides. The process can take place at atmospheric pressure and room temperature. A simple belt driven transport may be used to move the parts past a nozzle which emits the vapor in a system similar to a conventional solder reflow machine.Type: GrantFiled: September 15, 1997Date of Patent: January 11, 2000Assignee: MCNCInventors: Stephen M. Bobbio, Glenn A. Rinne
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Patent number: 5990472Abstract: A radiation detector includes a microelectronic frustum structure that defines an inner cavity and is mounted to a base structure such as a microelectronic substrate. In particular, at least two microelectronic sections or substrates are attached to one another to form the frustum structure. A radiation sensor can be fabricated on one or more of the sections. In addition, a radiation sensor can be mounted to the base so as to be concentrically aligned with the longitudinal axis of the cavity of the frustum structure. The substrates forming the frustum structure are preferably attached to one another using arched solder interconnects. The frustum structure may also be attached to the base using arched solder interconnects.Type: GrantFiled: September 29, 1997Date of Patent: November 23, 1999Assignee: MCNCInventor: Glenn A. Rinne
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Patent number: 5963793Abstract: Microelectronic packages are formed wherein solder bumps on one or more substrates are expanded, to thereby extend and contact the second substrate and form a solder connection. The solder bumps are preferably expanded by reflowing additional solder into the plurality of solder bumps. The additional solder may be reflowed from an elongated, narrow solder-containing region adjacent the solder bump, into the solder bump. After reflow, the solder bump which extends across a pair of adjacent substrates forms an arched solder column or partial ring of solder between the two substrates.Type: GrantFiled: June 12, 1998Date of Patent: October 5, 1999Assignee: MCNCInventors: Glenn A. Rinne, Philip A. Deane
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Patent number: 5892179Abstract: A solder bump structure on a microelectronic substrate including an electrical contact having an exposed portion. This solder bump structure includes an under bump metallurgy structure on the microelectronic substrate, and a solder structure on the under bump metallurgy structure opposite the microelectronic substrate. The metallurgy structure includes an elongate portion having a first end which electronically contacts the exposed portion of the electrical contact and an enlarged width portion connected to a second end of the elongate portion. The solder structure includes an elongate portion on the metallurgy structure and an enlarged width portion on the enlarged width portion of the metallurgy structure. Accordingly, the enlarged width portion of the solder structure can be formed on a portion of the microelectronic substrate other than the contact pad and still be electronically connected to the pad.Type: GrantFiled: November 24, 1997Date of Patent: April 6, 1999Assignee: MCNCInventors: Glenn A. Rinne, Joseph Daniel Mis
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Patent number: 5793116Abstract: Microelectronic packages are formed wherein solder bumps on one or more substrates are expanded, to thereby extend and contact the second substrate and form a solder connection. The solder bumps are preferably expanded by reflowing additional solder into the plurality of solder bumps. The additional solder may be reflowed from an elongated, narrow solder-containing region adjacent the solder bump, into the solder bump. After reflow, the solder bump which extends across a pair of adjacent substrates forms an arched solder column or partial ring of solder between the two substrates.Type: GrantFiled: May 29, 1996Date of Patent: August 11, 1998Assignee: MCNCInventors: Glenn A. Rinne, Philip A. Deane
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Patent number: 5615825Abstract: A method for pretreating a solder surface for fluxless soldering is disclosed. The method uses a noble fluorine gas to remove surface oxides from solder surfaces, without the use of external stimulation. A noble fluorine gas is suffused across the solder surface to reduce or eliminate or chemically convert the surface oxides. The process can take place at atmospheric pressure and room temperature. A simple belt driven transport may be used to move the parts past a nozzle which emits the vapor in a system similar to a conventional solder reflow machine.Type: GrantFiled: May 12, 1995Date of Patent: April 1, 1997Assignee: MCNCInventors: Stephen M. Bobbio, Glenn A. Rinne
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Patent number: 5447264Abstract: A temporary substrate for solder bumps may be used to transfer solder bumps to a microelectronic device. The temporary substrate includes a solder nonwettable surface and a plurality of conductive vias therein. A solder bump is formed on each of the conductive vias and is electrically and mechanically connected thereto. The solder bump extends over the solder nonwettable surface to produce a solder bump cross-sectional area which is greater than the cross-sectional area of the conductive via. A microelectronic device is placed adjacent the temporary substrate with each input/output pad adjacent a respective solder bump. An electrical and mechanical connection is formed between the solder bump and the input/output pad, and the microelectronic device is separated from the temporary substrate with the solder bump remaining connected to the input/output pad. The temporary substrate can also be used for burn-in and testing of microelectronic devices and rework on multichip modules.Type: GrantFiled: July 1, 1994Date of Patent: September 5, 1995Assignee: MCNCInventors: Nicholas G. Koopman, Glenn A. Rinne, Iwona Turlik
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Patent number: 5412537Abstract: An electrical connector includes a housing and a row of connector contacts coupled to the housing. The row of connector contacts has a predetermined center-to-center spacing between adjacent contacts, with the predetermined center-to-center spacing being relatively large relatively far from an imaginary reference point in the row of connector contacts, and being relatively small relatively near the imaginary reference point in the row of connector contacts. The imaginary reference point is preferably at the center of the row of contacts, and the center-to-center contact spacing preferably progressively increases from the center of the row to the ends of the row. The size of the connector contacts may also progressively increase as well. The electrical connector is preferably adapted for use with a multilayer ceramic substrate which includes a row of capture pads of the same predetermined center-to-center spacing at the edge thereof.Type: GrantFiled: February 28, 1994Date of Patent: May 2, 1995Assignees: MCNC, Northern Telecom LimitedInventors: Paul A. Magill, Nicholas G. Koopman, Glenn A. Rinne
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Patent number: 5381946Abstract: An integrated circuit chip having solder bumps thereon may be tested using a temporary substrate having substrate pads corresponding to locations of the input/output pads on the chip and having a sacrificial conductor layer on the temporary substrate pads. The solder bumps are placed adjacent the corresponding sacrificial metal layer and heated to form an electrical and mechanical connection between the chip and the temporary substrate. The chip is then tested and/or burned-in on the temporary substrate. After testing/burn-in, the sacrificial metal layer is dissolved into the solder bumps by heating. The integrated circuit chip, including a solder bump having the dissolved sacrificial metal layer therein, may be easily removed from the temporary substrate. Solder bumps may also be formed on the temporary substrate and transferred to unbumped chips.Type: GrantFiled: September 27, 1993Date of Patent: January 17, 1995Assignee: MCNCInventors: Nicholas G. Koopman, Glenn A. Rinne, Iwona Turlik, Edward K. Yung