Abstract: A general object of the present invention is to make a maximum controllable current large without exerting adverse effect on other characteristics. In a surface of an n.sup.- layer 2 formed on a p.sup.+ substrate 1, p diffusion regions 3a, 3b and 3c are formed separated by n.sup.+ diffusion regions 4a, 4b and an oxidation film 9. Above the p diffusion regions 3b and 3c, gate electrodes 5a and 5b are formed insulated from the surrounding by an oxidation film 6. An Al-Si electrode 7 is in contact with the p diffusion region 3a and the n.sup.+ diffusion region 4a while a metal electrode 8 is in contact with the p.sup.+ substrate 1. By virtue of interposition of the oxidation film 9, a thyristor consisting of the n.sup.+ diffusion region 4a, p diffusion region 3a, n.sup.- layer 2 and p.sup.+ substrate 1 is prevented from being actuated.

Abstract: On the p.sup.- substrate, the n.sup.- epitaxial layer is surrounded and isolated by the p well. In the surface of the n.sup.- epitaxial layer, there is provided the p floating region in the vicinity of the p well, on which the sense electrode is provided. The insulation film and the conductive film are formed on the n.sup.- epitaxial layer between the p well and the p floating region to overlap them. The conductive film and the p floating region serve as a composite field plate, which makes it hard that the surface electric field distribution is influenced by the state of electric charge in the surface and relieves the surface electric field by expanding the depletion layer, which extends from the pn junction between the n.sup.- epitaxial layer and the p well into the n.sup.- epitaxial layer in current blocking state, toward the center of the n.sup.- epitaxial layer.

Abstract: On the p.sup.- substrate, the n.sup.- epitaxial layer is surrounded and isolated by the p well. In the surface of the n.sup.- epitaxial layer, there is provided the p floating region in the vicinity of the p well, on which the sense electrode is provided. The insulation film and the conductive film are formed on the n.sup.- epitaxial layer between the p well and the p floating region to overlap them. The conductive film and the p floating region serve as a composite field plate, which makes it hard that the surface electric field distribution is influenced by the state of electric charge in the surface and relieves the surface electric field by expanding the depletion layer, which extends from the pn junction between the n.sup.- epitaxial layer and the p well into the n.sup.- epitaxial layer in current blocking state, toward the center of the n.sup.- epitaxial layer.

Abstract: On the p.sup.- substrate, the n.sup.- epitaxial layer is surrounded and isolated by the p well. In the surface of the n.sup.- epitaxial layer, there is provided the p floating region in the vicinity of the p well, on which the sense electrode is provided. The insulation film and the conductive film are formed on the n.sup.- epitaxial layer between the p well and the p floating region to overlap them. The conductive film and the p floating region serve as a composite field plate, which makes it hard that the surface electric field distribution is influenced by the state of electric charge in the surface and relieves the surface electric field by expanding the depletion layer, which extends from the pn junction between the n.sup.31 epitaxial layer and the p well into the n.sup.- epitaxial layer in current blocking state, toward the center of the n.sup.- epitaxial layer.

Abstract: A MOS transistor (Q.sub.M) detects an increase of the collector current (I.sub.C) of an IGBT device (Q.sub.O). When an excess current passes, the transistor (Q.sub.M) turns on, which restricts the gate voltage (V.sub.G) of the IGBT device (Q.sub.O) to decrease the collector current (I.sub.C). This protects the IGBT device (Q.sub.O) from the excess current. A Zener diode (D.sub.Z) placed on a path which is for detecting the excess current of the IGBT device (Q.sub.O) restricts the current passing through the path. This decreases reactive power which is consumed in protecting the device (Q.sub.O) from the excess current while protecting a drive circuit from an erroneous operation.

Abstract: The present invention relates to a semiconductor device employed for high power use and a method of manufacturing the same. According to the present invention, a temperature detecting device is formed on the same substrate with a power device. Thus, there is no need to add an external temperature sensor, whereby the device can be reduced in size. Further, an abnormal temperature of the power device is accurately detected by the temperature detecting device, whereby thermal breakdown of the power device is reliably prevented.

Abstract: A semiconductor device in which, in a planar type bipolar transistor having a collector layer (22) in a substrate side, a base layer (23) formed on the collector layer (22) and an emitter island (24) formed in the base layer (23), a groove (25) is provided in the emitter island (24) to reach at least the interface between the base layer (23) and the collector layer (22) to form a conductive film (27) through a dielectric film (26) in the groove to be employed as a gate electrode of a MOS-FET thereby to implement a monolithic parallel Bi-MOS device, while the base electrode (28) of the bipolar transistor (40) and the gate electrode (29) of the MOS-FET (50) are connected with a help of diodes including a zener diode (10) thereby to implement a monolithic three-terminal parallel Bi-MOS switching device of small chip size.

Abstract: Voltage-dividing resistors, being connected in parallel to a switching element to be protected, create control voltage which is responsive to voltage applied to the switching element, to supply the same to a gate of a field effect transistor. The field effect transistor is connected in parallel to the switching element, to conduct when the control voltage exceeds a threshold value for passing overvoltage absorbing current, while causing high-frequency shorting across the switching element by its parasitic capacitance.

Abstract: The present invention relates to a semiconductor device employed for high power use and a method of manufacturing the same. According to the present invention, a temperature detecting device is formed on the same substrate with a power device. Thus, there is no need to add an external temperature sensor, whereby the device can be reduced in size. Further, an abnormal temperature of the power device is accurately detected by the temperature detecting device, whereby thermal breakdown of the power device is reliably prevented.

Abstract: The drive circuit for driving a cascode bipolar MOS circuit (1) has a bipolar transistor (21) coupled to a bipolar transistor (11) in the bipolar MOS circuit (1) through a Darlington connection. A base current for the bipolar transistor (11) is supplied through the other bipolar transistor (21), without a transformer.

Abstract: A driver circuit for driving a switching element in response to a driving signal from a driving signal generator includes an electrical isolation circuit for generating an electrically isolated signal from the driving signal in response to the driving signal; a first signal generator which receives the electrically isolated signal, and generates a first signal which level-changes from a second level to a third level in response to the level change of the electrically isolated signal from a first level to the second level; a second signal generator which receives the electrically isolated signal, and generates a second signal synchronous with the electrically isolated signal; a third signal generator which receives the signal from the first signal generator, and generates a third signal synchronous with the first signal; a fourth signal generator which receives the signals from the second and the third signal generators, and generates a fourth signal having a signal level equal to the sum of the second and the

Abstract: A cascode BiMOS driving circuit according to the present invention has an IBGBT (9) connected between a first output terminal (3) and the base of a bipolar transistor (Q1). An IGBT generally has a low on-state resistance, and hence a chip area for the IGBT (9) is not so increased, even if the breakdown voltage of the IGBT (9) is made about equal to that of the bipolar transistor (Q1). Thus, a cascode BiMOS driving circuit of low cost and low input capacitance can be implemented. Further, the IGBT (9) is gently turned off due to a so-called tail phenomenon, to prevent an abrupt turn off of the bipolar transistor (Q1), to whereby prevent an occurrence of a surge voltage.

Abstract: A planar vertical diffusion self aligned conductivity modulated MOSFET comprising a semiconductor island region (70) of a first conductivity type having a high impurity concentration and formed in an island shape in a predetermined region on the surface on the side of a electrode (8) of a semiconductor substrate layer (10) of a second conductivity type having a high impurity concentration.

Abstract: A driver circuit for a bipolar Darlington power transistor includes a current clamping device which is provided between the base and emitter of said transistor and makes the base-emitter path of said transistor operate at a shallow saturated region; and a cut off device which is provided at the side of said emitter and cuts-off said transistor in response to a signal given from a driving power source.

Abstract: Provided is a power semiconductor device operable to be switched at high frequencies. The semiconductor device according to the present invention is applied to a three-terminal BIMOS power semiconductor device in which a MOS-FET (2) is connected in parallel with a bipolar transistor (3) while the gate of the MOS-FET (2) is connected with the base of the bipolar transistor (3) through a reference-voltage diode (6) and a fast switching diode (7) so that the operation of the semiconductor device can be controlled by one driving circuit (1).