Patents by Inventor Gourab Majumdar

Gourab Majumdar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6452365
    Abstract: It is an object to enhance a breakdown voltage without requiring a complicated manufacturing process while maintaining a stable operation. A control signal (A) output from an MCU (11) is transmitted to a driving circuit (3a) for driving a power switching element (1a) of an upper arm through two-stage level shift circuits. The level shift circuit in a first stage is constituted by a series circuit of a switching element (13) and a resistive element (14), and the level shift circuit in a second stage is constituted by a series circuit of a switching element (16) and a resistive element (17).
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: September 17, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Shinji Hatae, Kousuke Yoshimura
  • Publication number: 20020079519
    Abstract: It is an object of the present invention to provide an inverter circuit including a power arm ensuring a high breakdown voltage and having low probability of malfunction. In a power arm element consisting of a switching element and a diode connected in inverse-parallel connection thereto, n free wheeling diodes (n≧2) connected in series are connected in inverse-parallel connection to a switching element (1b). A breakdown voltage between an anode and a cathode of each free wheeling diode is defined to be 1/n of a breakdown voltage of the switching element (1b). That is, the breakdown voltage of each free wheeling diode is reduced to 1/n to reduce a thickness of a n− drift region. A transient voltage characteristic during flow of a free wheeling current can be thereby kept low. The drop in the breakdown voltage is compensated with the n free wheeling diodes connected in series, to thereby ensure breakdown voltage of a degree approximately the same as that of the switching element.
    Type: Application
    Filed: June 15, 2001
    Publication date: June 27, 2002
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Gourab Majumdar, Shinji Hatae
  • Publication number: 20020030532
    Abstract: A power module is provided with an insulating substrate with a heat sink being bonded to one surface thereof and a circuit pattern being formed on the other surface. The circuit pattern is formed by an electrode layer. A switching semiconductor element and a free wheeling diode that is connected to a switching semiconductor element in anti-parallel therewith are placed on the circuit pattern. A controlling IC for controlling the switching semiconductor element is placed on the free wheeling diode. Thus, it is possible to make the entire power module compact, and it becomes possible to provide an inexpensive power module which can prevent the controlling IC from malfunctioning due to heat generated by the switching semiconductor element.
    Type: Application
    Filed: January 23, 2001
    Publication date: March 14, 2002
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Gourab Majumdar, Mitsutaka Iwasaki, Shinji Hatae, Fumitaka Tametani, Toru Iwagami, Akihisa Yamamoto
  • Patent number: 6291826
    Abstract: A first diode part (1B) for sensing junction temperature and a second diode part (1C) for absorbing static electricity that are included in a semiconductor element (1) for electric power are formed within the same substrate together with a semiconductor element part (1A) for electric power. Moreover, the number of a plurality of second diodes (1CD) constituting the second diode part (1C) is equal to the number of a plurality of first diodes (1BD) constituting the first diode part (1B). In addition, a capacitor (11) for reducing the impedance is disposed between the input terminals of a forward direction voltage fall operating amplifying circuit part (4) of a controlling circuit part (8). Here, it is effective to form an LC low pass filter as well by covering a forward path side relay lead part (9A) and a backward path side relay lead part (9B) with one tubular ferrite core.
    Type: Grant
    Filed: November 6, 2000
    Date of Patent: September 18, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsunori Kub{overscore (o)}, Takeshi Ohmaru, Takaaki Shirasawa, Gourab Majumdar
  • Patent number: 6208041
    Abstract: Current sense voltages (VCSl˜VCSn), which are the detected values of n (≧2) IGBTs connected in parallel, are converted into digital form, and thereafter, are subjected to an operation processing. After the current sense voltages (VCSl˜VCSn) are converted into collector currents (Il˜In) by use of constants (Gl˜Gn and VOFFSETl˜VOFFSETn)(step 103), current deviations (&Dgr;Il˜&Dgr;In) respectively defined as differences of the collector currents (Il˜In) from the average (IAVG) thereof are calculated (step 104, 105). Drive control voltages (VDl˜VDn) are renewed by changes (&Dgr;VDl˜&Dgr;VDn) which are respectively obtained by multiplying the current deviations (&Dgr;Il˜&Dgr;In) by factors (Kij)(step 106, 107). The drive control voltage (VDl˜VDn) are converted into analogue form, and thereafter, supplied to n IGBTs as their gate voltages (VGE).
    Type: Grant
    Filed: February 4, 1999
    Date of Patent: March 27, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Khalid Hassan Hussein, Mitsutaka Iwasaki
  • Patent number: 6005366
    Abstract: A controller for power devices which is not required to individually insulate high and low potential portions and to include an insulated power supply is disclosed. An external controller (6) is connected to a second internal control circuit (4) which is in turn connected to a level shift circuit (5) and a gate electrode of a transistor (Q2). Power supply voltage (V1) is applied to the second internal control circuit (4) for operation thereof. The level shift circuit (5) is connected to a first internal control circuit (3) which is in turn connected to a gate electrode of a transistor (Q1) and a charge pump circuit (7). Control of a first semiconductor circuit is made through the level shift means in response to an input signal generated on the basis of a second main power supply potential, thereby achieving increased responsiveness of the power devices to a control signal and improved integration.
    Type: Grant
    Filed: January 17, 1995
    Date of Patent: December 21, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Shinji Hatae, Tatsuo Oota, Masanori Fukunaga
  • Patent number: 5834842
    Abstract: A groove (21) is formed on an upper surface of sealing resin (2) in the form of a strip. A device (101) is pressed against a flat surface of a radiating fin (55) by a band plate shaped clamper (61) which is engaged with the groove (21). Due to the engagement of the clamper (61) and the groove (21), movement of the device (101) is limited. Namely, the device (101) is stably fixed to the radiating fin (55). Since the device (101) is fixed to the radiating fin (55) by the clamper (61), no hole for receiving a fastening screw is provided in the sealing resin (2). Therefore, the sealing resin (2) is reduced, whereby miniaturization of the device (101) is implemented. Thus, the device is miniaturized at no sacrifice of radiation efficiency.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: November 10, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji
  • Patent number: 5786973
    Abstract: A semiconductor power module is configured to prevent concentration of load in a certain semiconductor power switching element. A diagnosis circuit (PC) of a module (10a or 10b) compares a sensing signal (SSE) for example, which is sent out from a sensing circuit (Se) and is proportional to the collector current of an IGBT element, with a reference voltage, and judges presence or absence of abnormality in the collector current. If abnormal, a shutdown signal (S.sub.SD) is sent out to a shutdown circuit (SD), and the IGBT element is cut off, and simultaneously an abnormality detection signal (S.sub.F01 or S.sub.F02) is sent out to the other module (10b or 10a). The diagnosis circuit (PC of the module (10b or 10a) receives the abnormality detection signal (S.sub.F01 or S.sub.F02), and sends out the shutdown signal (S.sub.SD) to the shutdown circuit (SD), thereby shutting down the IGBT element. Since the transmission timing of both shutdown signals (S.sub.
    Type: Grant
    Filed: April 9, 1996
    Date of Patent: July 28, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Takashi Marumo
  • Patent number: 5773883
    Abstract: In a device (101) formed as an invertor, terminals connected to floating source pins (VS) which are provided in control circuits (31 to 33) are limited to output terminals (U, V, W). In order to hold voltages across floating source pins (VD, VS), capacitive elements (51 to 53) which are provided around the device (101) are connected to the output terminals (U, V, W). Thus, the terminals which are connected with the floating source pins (VS) are shared by the output terminals (U, V, W), whereby the numbers of the terminals and wiring patterns are reduced. Thus, the device (101) is miniaturized.
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: June 30, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji
  • Patent number: 5747876
    Abstract: It is an object to facilitate assembly of an application device. A device (101) is provided with a heat sink (51) to radiate loss heat of an IGBT element (11) as a power semiconductor element to an external radiation fin. External terminals (5 and 6) connected to an external circuit substrate protrude in the direction in which the exposed surface of the heat sink (51) is directed. Accordingly, when assembling an application device by mounting the device (101) on the external circuit substrate together with other circuit elements, it is possible to mount the device (101) and other circuit elements together on the common main surface of the circuit substrate, i.e., on its main surface on the side opposite to the side where the radiation fin is attached. Accordingly, it is possible to collectively apply solder on the common main surface of the circuit substrate and collectively solder the device (101) and the other circuit elements.
    Type: Grant
    Filed: July 16, 1996
    Date of Patent: May 5, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji
  • Patent number: 5706189
    Abstract: Disclosed is a method of driving a power converter which can simplify a charging sequence of a charge pump capacitor to reduce the time required to design the device without using a voltage protective circuit and optimum design required to determine the capacitance of the charge pump capacitor. A charging pulse signal for a capacitor (CP) is provided as an input signal from an external control device (EC) substantially simultaneously as a control power source (PS) is switched on to provide a predetermined control power source voltage (V.sub.PS). A driver circuit (DR20) outputs a control signal (V.sub.D) to turn on a transistor (Q2) in a pulse-like manner, starting charging the capacitor (CP). The charging pulse signal continues being provided after completion of the charging of the capacitor (CP) and stops being provided immediately before a PWM signal is provided.
    Type: Grant
    Filed: July 2, 1996
    Date of Patent: January 6, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Shinji Hatae
  • Patent number: 5703399
    Abstract: A blanked lead frame serves both as an interconnection pattern for a control circuit and a power circuit and as external terminals. Highly heat conducting resin having an electric insulating property is put between the lead frame and the heat sink arranged to face each other to maintain good thermal conductivity therebetween. The heat sink and the lead frame are coupled easily and fixedly by performing a simple process of sealing with the highly heat conducting resin. Accordingly, no expensive circuit boards are required, which have been necessary in conventional devices, nor a process of patterning the interconnection pattern and a process of connecting the external terminals to the interconnection pattern when manufacturing the device required. That is to say, the manufacturing cost is reduced without deteriorating the heat radiating characteristic.
    Type: Grant
    Filed: May 15, 1996
    Date of Patent: December 30, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Tooru Iwagami, Sukehisa Noda
  • Patent number: 5686859
    Abstract: When an IGBT element (9) is turned off and an IGBT element (19) is turned on, capacitors (1, 2) are charged by a current successively passing through the capacitor (1), a resistive element (4), a diode (5), the capacitor (2) and an intermediate wire (32) from a high-potential dc bus (30). At the same time, a capacitor (11) is discharged by a current successively passing through a diode (17), a resistive element (16) and the capacitor (11) from a low-potential dc bus (31) to flow to the intermediate wire (32). When the IGBT element (9) is turned on and the IGBT element (19) is turned off, on the other hand, the capacitors (11, 12) are charged and the capacitor (1) is discharged. The above is so repeated as to maintain source voltages of driving circuits (8, 18) at values exceeding constant levels. Thus, a power circuit for a driving circuit is formed by a simple circuit element.
    Type: Grant
    Filed: February 6, 1996
    Date of Patent: November 11, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Shinji Hatae, Masayuki Koura
  • Patent number: 5672910
    Abstract: It is an object to downsize a device while maintaining a high breakdown voltage. An external terminal (7) protrudes to the outside from the side wall of a sealing resin (2) and a heat sink (1) is exposed in the bottom of the sealing resin (2). A step surface (21) retracted from the exposed surface of the heat sink (1) is formed in the part of the sealing resin (2) surrounding the periphery of the heat sink (1). When using this semiconductor device, the exposed surface of the heat sink (1) is brought into surface contact with the flat surface (41a) of the radiation fin (41) and an insulation sheet (31) is interposed between the step surface (21) and the flat surface (41a), and which is pressed therebetween. The insulation sheet (31) is disposed to cover the region facing the external terminal (7) in the flat surface (41a).
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: September 30, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji
  • Patent number: 5623152
    Abstract: An insulated gate semiconductor device includes a gate trench having a gate electrode formed therein on a gate insulating film, and an emitter trench having an emitter electrode formed therein on a silicon oxide layer, to form a capacitance of a capacitor in a main current path by using the silicon oxide layer in the emitter trench, whereby a transient voltage upon switching is decreased and an application system including a snubber circuit is reduced in size.
    Type: Grant
    Filed: November 21, 1995
    Date of Patent: April 22, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Touru Iwagami
  • Patent number: 5460981
    Abstract: A general object of the present invention is to make a maximum controllable current large without exerting adverse effect on other characteristics. In a surface of an n.sup.- layer 2 formed on a p.sup.+ substrate 1, p diffusion regions 3a, 3b and 3c are formed separated by n.sup.+ diffusion regions 4a, 4b and an oxidation film 9. Above the p diffusion regions 3a and 3b, gate electrodes 5a and 5b are formed insulated from the surrounding by an oxidation film 6. An Al--Si electrode 7 is in contact with the p diffusion region 3a and the n.sup.+ diffusion region 4a while a metal electrode 8 is in contact with the p.sup.+ substrate 1. By virtue of interposition of the oxidation film 9, a thyristor consisting of the n.sup.+ diffusion region 4a , p diffusion region 3a, n.sup.- layer 2 and p.sup.+ substrate 1 is prevented from being actuated.
    Type: Grant
    Filed: October 7, 1994
    Date of Patent: October 24, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tomohide Terashima, Gourab Majumdar
  • Patent number: 5432471
    Abstract: In order to prevent a malfunction caused by an electrical noise and limit an excessive main current at a high speed while cutting off the same to a value close to zero, the main current is regulated by an IGBT (1) which is connected with a load. A part of this main current is shunted to another IGBT (2). The as-shunted current flows through a resistor (3), to be converted to a voltage across the resistor (3). When the main current is excessively increased by shorting of the load or the like, this voltage exceeds a prescribed value so that a transistor (5) and a thyristor (7) enter conducting states. Consequently, a voltage across a gate (G) and an emitter (E) of the IGBT (1) is so reduced as to cut off the main current. The transistor (5) prevents the main current from excessive increase since the same has a high speed of response, while the thyristor (7) cuts off the main current to zero since the same has lower resistance in conduction.
    Type: Grant
    Filed: August 31, 1993
    Date of Patent: July 11, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Gourab Majumdar, Shinji Hatae, Mitsuharu Tabata, Takashi Marumo
  • Patent number: D418485
    Type: Grant
    Filed: February 17, 1999
    Date of Patent: January 4, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hisashi Kawafuji, Mitsutaka Iwasaki, Gourab Majumdar, Toshiaki Shinohara
  • Patent number: D421969
    Type: Grant
    Filed: February 17, 1999
    Date of Patent: March 28, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hisashi Kawafuji, Mitsutaka Iwasaki, Gourab Majumdar, Toshiaki Shinohara
  • Patent number: D428859
    Type: Grant
    Filed: June 15, 1999
    Date of Patent: August 1, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hisashi Kawafuji, Mitsutaka Iwasaki, Gourab Majumdar, Toshiaki Shinohara