Abstract: An exemplary system and method for providing an acoustic plate wave apparatus is disclosed as comprising inter alia: a monocrystalline silicon substrate (200); an amorphous oxide material (220); a monocrystalline perovskite oxide material (230); a monocrystalline piezoelectric material (240); and a flexural plate wave component (250, 270) having an input interdigitated transducer (270), an output interdigitated transducer (250) and an optional support layer (260). Deposition or removal of material on or from an absorptive thin film sensor surface (210), or changes in the mechanical properties of the thin film (210) in contact with various chemical species, or changes in the electrical characteristics of a solvent solution exposed to the thin film (210) generally operate to produce measurable perturbations in the vector quantities (e.g., velocity, etc.) and scalar quantities (e.g., attenuation, etc.) of the acoustic plate modes.

Abstract: An exemplary system and method for providing an acoustic plate wave apparatus is disclosed as comprising inter alia: a monocrystalline silicon substrate (200); an amorphous oxide material (220); a monocrystalline perovskite oxide material (230); a monocrystalline piezoelectric material (240); and a flexural plate wave component (250, 270) having an input interdigitated transducer (270), an output interdigitated transducer (250) and an optional support layer (260). Deposition or removal of material on or from an absorptive thin film sensor surface (210), or changes in the mechanical properties of the thin film (210) in contact with various chemical species, or changes in the electrical characteristics of a solvent solution exposed to the thin film (210) generally operate to produce measurable perturbations in the vector quantities (e.g., velocity, etc.) and scalar quantities (e.g., attenuation, etc.) of the acoustic plate modes.

Abstract: A method for forming an embedded low profile capacitor in a multilayer printed circuit board. The method entails providing a first metal plate on a dielectric substrate. A dielectric layer of a photopolymeric material is applied onto a first region of the first metal plate, surrounded by a second region that is exposed. A second metal plate is deposited onto the dielectric layer and the second region of the first metal plate. The second plate is then patterned to decline an upper electrode on the dielectric layer that is electrically isolated from the first metal plate. This may be accomplished by forming a trench in the second metal plate above the dielectric layer. In one aspect, the resulting capacitor thus comprises a lower electrode structure derived mainly from the first metal plate, a dielectric layer overlying the first region of the first metal plate and an upper electrode overlying the dielectric layer.

Abstract: A dielectric film is formed on a free-standing conductive metal layer to form a multi-layer foil comprising a conductive metal layer, a barrier layer and a dielectric oxide layer. Such multi-layer foils are mechanically flexible, and useful for the manufacture of capacitors. Examples of barrier layers include Ni—P or Ni—Cr alloys. After a second layer of conductive metal is deposited on a dielectric oxide surface opposing the first conductive metal layer, the resulting capacitor foil is processed into a capacitor. The resulting capacitor is a surface mounted capacitor or is formed as a integrated or embedded capacitor within a circuit board.

Abstract: A dielectric film is formed on a free-standing conductive metal layer to form a multi-layer foil comprising a conductive metal layer, a barrier layer and a dielectric oxide layer. Such multi-layer foils are mechanically flexible, and useful for the manufacture of capacitors. Examples of barrier layers include Ni—P or Ni—Cr alloys. After a second layer of conductive metal is deposited on a dielectric oxide surface opposing the first conductive metal layer, the resulting capacitor foil is processed into a capacitor. The resulting capacitor is a surface mounted capacitor or is formed as a integrated or embedded capacitor within a circuit board.

Abstract: A thin-film metal resistor (44) suitable for a multilayer printed circuit board (12), and a method for its fabrication. The resistor (44) generally has a multilayer construction, with the individual layers (34, 38) of the resistor (44) being self-aligned with each other so that a negative mutual inductance is produced that very nearly cancels out the self-inductance of each resistor layer (34, 38). As a result, the resistor (44) has a very low net parasitic inductance. In addition, the multilayer construction of the resistor (44) reduces the area of the circuit board (12) required to accommodate the resistor (44), and as a result reduces the problem of parasitic interactions with other circuit elements on other layers of the circuit board (12).

Abstract: A method for manufacturing a microelectronic assembly to have aligned conductive regions and dielectric regions with desirable processing and dimensional characteristics. The invention is particularly useful for producing integral capacitors, with the desired processing and dimensional characteristics achieved with the invention yielding predictable electrical characteristics for the capacitors. The method generally entails providing a substrate with a first conductive layer, forming a dielectric layer on the first conductive layer, and then forming a second conductive layer on the dielectric layer. A first region of the second conductive layer is then removed to expose a first region of the dielectric layer, which in turn is removed to expose a first region of the first conductive layer that is also removed.

Abstract: Printed circuit boards with integral high and low value resistors are efficiently produced. The method of their manufacture entails applying a first layer of a low resistance material onto a dielectric substrate in a predetermined thickness and pattern. The pattern defines the electrical lengths and widths of low value resistors, as well as pairs of terminal electrode pads for the high value resistors. A second layer of a high resistance material is applied between and in contact with the top surfaces of the facing ends of each member of the terminal pad pairs. The fixed lengths, widths and thicknesses of the patterned high resistance material determine the values of the high value resistors. Conductive metal terminals are provided at the ends of the low value resistors and at the distal ends of the high value resistor pad pairs to complete the resistors.

Abstract: A method for producing a pinhole-free dielectric film comprising applying a photopolymer to a first dielectric surface of a dielectric film having pinholes, exposing a second and opposing surface to an amount of radiation effective to polymerize the photopolymer exposed by the pinholes, and removing unpolymerized photopolymer.

Abstract: A method for manufacturing a microelectronic assembly to have a resistor, and particularly a metal resistive film, with desirable processing and dimensional characteristics. The method generally entails applying a photosensitive dielectric to a substrate to form a dielectric layer. The dielectric layer is photoimaged to polymerize a first portion of the dielectric layer on a first region of the substrate, leaving the remainder of the dielectric layer unpolymerized. An electrically resistive film is then applied to the dielectric layer, and the dielectric layer is developed to remove concurrently the unpolymerized portion thereof and the portion of the resistive film overlying the unpolymerized portion, so that a portion of the resistive film remains over the second portion to form the resistor. An alternative process order is to apply the resistive film prior to exposing the dielectric layer to radiation, and then exposing the dielectric layer through the resistive film.

Abstract: A process for forming a thick-film resistor whose dimensions can be accurately obtained, thereby yielding a precise resistance value. The method includes providing on a substrate a photoimageable layer that preferably forms a permanent dielectric layer of a multilayer structure. An opening is photodefined in the surface of the photoimageable layer, and then overfilled with an electrically-resistive material to form a resistive mass having an excess portion that lies on the surface of the photoimageable layer surrounding the opening. Following curing which causes the surface of the resistive material to become recessed below the surface of the photoimageable layer, the excess portion of the resistive mass is removed, preferably by abrading or a similar operation, such that the lateral dimensions of the resistive mass are determined by the lateral dimensions of the opening in the photoimageable layer.

Abstract: A thin-film metal resistor (44) suitable for a multilayer printed circuit board (12), and a method for its fabrication. The resistor (44) generally has a multilayer construction, with the individual layers (34, 38) of the resistor (44) being self-aligned with each other so that a negative mutual inductance is produced that very nearly cancels out the self-inductance of each resistor layer (34, 38). As a result, the resistor (44) has a very low net parasitic inductance. In addition, the multilayer construction of the resistor (44) reduces the area of the circuit board (12) required to accommodate the resistor (44), and as a result reduces the problem of parasitic interactions with other circuit elements on other layers of the circuit board (12).

Abstract: A process for forming a thick-film resistor whose dimensions can be accurately obtained, thereby yielding a precise resistance value. The method includes providing on a substrate a photoimageable layer that preferably forms a permanent dielectric layer of a multilayer structure. An opening is photodefined in the surface of the photoimageable layer, and then overfilled with an electrically-resistive material to form a resistive mass having an excess portion that lies on the surface of the photoimageable layer surrounding the opening. Following curing which causes the surface of the resistive material to become recessed below the surface of the photoimageable layer, the excess portion of the resistive mass is removed, preferably by abrading or a similar operation, such that the lateral dimensions of the resistive mass are determined by the lateral dimensions of the opening in the photoimageable layer.

Abstract: A thick-film resistor and a process for forming the resistor to have accurate dimensions, thereby yielding a precise resistance value. The resistor generally includes an electrically resistive layer and a pair of terminals, a first of which is surrounded by the second terminal, so as to form a region therebetween that surrounds the first terminal and separates the first and second terminals. The terminals are preferably concentric, with the second terminal and the region therebetween being annular-shaped. The resistive layer electrically connects the first and second terminals to complete the resistor. Each of the terminals has a surface that is substantially parallel to an upper and/or lower surface of the resistive layer and contacts the resistive layer. The surfaces of the terminals may be embedded in the resistive layer by printing the resistive material over the terminals, or may contact the upper or lower surface of the resistive layer by locating the terminals above or below the resistive layer.

Abstract: The surface-mount device package comprises a pad located on a face of the surface-mount device, a solder bump bonded to the pad, and a terminal spaced radially apart from the pad. A terminal surrounds the pad in at least one common plane that bisects the pad and the terminal. An electrically resistive volume intervenes between the pad and the terminal. The pad is electrically coupled to the terminal through the resistive volume. The terminal, the pad, and the electrically resistive volume cooperate to form a passive component associated with at least one device interconnection. The passive component preferable comprises an integral resistor. The integral resistor serves to eliminate or at least substantially reduce electrical resonances and reflections that may otherwise degrade the signal integrity.

Abstract: A method for fabricating circuit board conductors with desirable processing and reduced self and mutual capacitance. The method generally entails forming a metal layer on a positive-acting photodielectric layer formed on a substrate, and then etching the metal layer to form at least two conductor traces that cover two separate regions of the photodielectric layer while exposing a third region of the photodielectric layer between the two regions. The third region of the photodielectric layer is then irradiated and developed using the two traces as a photomask, so that the third region of the photodielectric layer is removed. The two remaining regions of the photodielectric layer masked by the traces remain on the substrate and are separated by an opening formed by the removal of the third dielectric region.

Abstract: A thick-film resistor and a process for forming the resistor to have accurate dimensions, thereby yielding a precise resistance value. The resistor generally includes an electrically resistive layer and a pair of terminals, a first of which is surrounded by the second terminal, so as to form a region therebetween that surrounds the first terminal and separates the first and second terminals. The terminals are preferably concentric, with the second terminal and the region therebetween being annular-shaped. The resistive layer electrically connects the first and second terminals to complete the resistor. Each of the terminals has a surface that is substantially parallel to an upper and/or lower surface of the resistive layer and contacts the resistive layer. The surfaces of the terminals may be embedded in the resistive layer by printing the resistive material over the terminals, or may contact the upper or lower surface of the resistive layer by locating the terminals above or below the resistive layer.

Abstract: A microelectronic assembly, such as a surface-mount device or a ball-grid array (BGA) package, has one or more integral resistors. The integral resistors are incorporated into one or more of the microelectronic assembly's electrical leads or connections. The integral resistors preferably terminate in a solderable pad. For example, the BGA package may include an IC chip and interposer. A terminal is located on a surface of the IC chip, on a surface of the interposer, or on the surface of the substrate to which the BGA is mounted. An electrically-resistive material overlies the terminal and electrically couples the terminal to a bond pad, thereby defining an integral resistor. The integral resistors reduce electrical resonances and reflections that may otherwise degrade the signal integrity and reliability of the electrical system employing the device; hence, reduce or eliminate the requirement for discrete resistors for the microelectronic assembly.

Abstract: A method of fabricating a field-effect device having a gate dielectric of reoxidized nitrided oxide (RNO) provides an inversion layer mobility much higher than that of conventional RNO devices. A conductivity structure such as a metal oxide semiconductor field-effect transistor (MOSFET) is formed in a semiconductor substrate and provided with a gate dielectric of RNO. The formation of the device may or may not make use of rapid thermal processing techniques. Once formed, the device is irradiated with ionizing radiation. A voltage potential may be maintained across the gate dielectric during irradiation to further improve the inversion layer mobility. Post-radiation annealing is then performed at a controlled temperature.

Abstract: Accurately altering a precisely located site on a substrate by: (a) providing a vacuum chamber; (b) providing an energy beam; (c) providing a source of a hydrocarbon and a conduit extending between the source and the chamber, the hydrocarbon being capable of being adsorbed in the substrate and of interacting with the energy beam to alter the substrate; (d) positioning the substrate in the chamber to be exposed to hydrocarbon delivered by the conduit; (e) introducing into the conduit a carrier having a vapor pressure above the vapor pressure of the hydrocarbon, the carrier being in vapor form under conditions existing in the conduit and having a bulk velocity that transports the hydrocarbon by molecular collisions into the chamber, the hydrocarbon being adsorbed on the surface of the substrate, free carrier molecules being drawn off sufficiently rapidly to maintain low pressure in the chamber; and (e) while maintaining the low chamber pressure, directing the energy beam to the site in the presence of the absor