Patents by Inventor Gregory M. Chrysler

Gregory M. Chrysler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9406582
    Abstract: A method and apparatus to minimize thermal impedance using copper on the die or chip backside. Some embodiments use deposited copper having a thickness chosen to complement a given chip thickness, in order to reduce or minimize wafer warpage. In some embodiments, the wafer, having a plurality of chips (e.g., silicon), is thinned (e.g., by chemical-mechanical polishing) before deposition of the copper layer, to reduce the thermal resistance of the chip. Some embodiments further deposit copper in a pattern of bumps, raised areas, or pads, e.g., in a checkerboard pattern, to thicken and add copper while reducing or minimizing wafer warpage and chip stress.
    Type: Grant
    Filed: July 24, 2008
    Date of Patent: August 2, 2016
    Assignee: Intel Corporation
    Inventors: Fay Hua, Gregory M. Chrysler, James G. Maveety, Kramadhati V. Ravi
  • Patent number: 8518750
    Abstract: An embodiment of the present invention is a technique to fabricate a metal interconnect. A first metal trace is printed on a die attached to a substrate or a cavity of a heat spreader in a package to electrically connect the first metal trace to a power contact in the substrate. A device is mounted on the first metal trace. The device receives power from the substrate when the package is powered.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: August 27, 2013
    Assignee: Intel Corporation
    Inventors: Yoshihiro Tomita, David Chau, Gregory M. Chrysler, Devendra Natekar
  • Patent number: 8505613
    Abstract: A structure including a die with at least one via within a semiconductor portion of the die, the via being proximate to a hot spot. The via is at least partially filled with a heat-dissipating material and is also capable of absorbing heat from the hot spot.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: August 13, 2013
    Assignee: Intel Corporation
    Inventors: Gregory M. Chrysler, James G. Maveety
  • Publication number: 20130122656
    Abstract: An embodiment of the present invention is a technique to fabricate a metal interconnect. A first metal trace is printed on a die attached to a substrate or a cavity of a heat spreader in a package to electrically connect the first metal trace to a power contact in the substrate. A device is mounted on the first metal trace. The device receives power from the substrate when the package is powered.
    Type: Application
    Filed: January 4, 2013
    Publication date: May 16, 2013
    Inventors: Yoshihiro Tomita, David Chau, Gregory M. Chrysler, Devendra Natekar
  • Patent number: 8409924
    Abstract: An embodiment of the present invention is a technique to fabricate a metal interconnect. A first metal trace is printed on a die attached to a substrate or a cavity of a heat spreader in a package to electrically connect the first metal trace to a power contact in the substrate. A device is mounted on the first metal trace. The device receives power from the substrate when the package is powered.
    Type: Grant
    Filed: July 23, 2012
    Date of Patent: April 2, 2013
    Assignee: Intel Corporation
    Inventors: Yoshihiro Tomita, David Chau, Gregory M Chrysler, Devendra Natekar
  • Patent number: 8404519
    Abstract: A carbon nanotube (CNT) array is patterned on a substrate. The substrate can be a microelectronic die or a heat sink for a die. The patterned CNT array is patterned by using a patterned catalyst on the substrate to form the CNT array by growing. The patterned CNT array can also be patterned by using a patterned mask on the substrate to form the CNT array by growing. A computing system that uses the CNT array for heat transfer from the die is also used.
    Type: Grant
    Filed: May 16, 2011
    Date of Patent: March 26, 2013
    Assignee: Intel Corporation
    Inventors: Gregory M. Chrysler, Thomas S. Dory, James G. Maveety, Edward Prack, Unnikrishnan Vadakkanmaruveedu
  • Patent number: 8333569
    Abstract: A method and apparatus for removing vapor inside a liquid pump at the start up operation of the pump. In addition, a method and apparatus for removing liquid inside a compressor at the start up operation of the compressor. The pump and compressor each include a sensor attached to them that determines the physical state (i.e., liquid or vapor) of a material inside the pump or compressor. If vapor is detected inside the pump, a thermoelectric module connected to the pump is powered to condense the vapor into a liquid. Likewise, if liquid is detected inside the compressor a heater connected to the compressor is powered to evaporate the liquid into a vapor. After the state of the material inside the pump or compressor is changed, the pump or compressor is powered up for operation in a cooling system.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: December 18, 2012
    Assignee: Intel Corporation
    Inventors: Ioan Sauciuc, Gregory M. Chrysler
  • Patent number: 8313282
    Abstract: Disclosed is a compact and integrated fan, pump, and heat exchanger system where air-cooling is performed via the fan, liquid cooling is performed via a pump, and heat exchange fins in thermal contact with a fluid channel act as a heat exchanger. Heated fluid is carried inside the fluid channel, where heat therein is conducted to the fins. The air flows around the outside surfaces of the fins so that the heat transfers from the heated fluid into the air stream.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: November 20, 2012
    Assignee: Minebea Co., Ltd.
    Inventors: Yousef Jarrah, Gregory M Chrysler, Patrick Harper, Shen Zhao, Glen Meadows, Christopher Best, Hirofumi Shoji, Thang Ngugen
  • Publication number: 20120289002
    Abstract: An embodiment of the present invention is a technique to fabricate a metal interconnect. A first metal trace is printed on a die attached to a substrate or a cavity of a heat spreader in a package to electrically connect the first metal trace to a power contact in the substrate. A device is mounted on the first metal trace. The device receives power from the substrate when the package is powered.
    Type: Application
    Filed: July 23, 2012
    Publication date: November 15, 2012
    Applicant: Intel Corporation
    Inventors: Yoshihiro Tomita, David Chau, Gregory M. Chrysler, Devendra Natekar
  • Patent number: 8227907
    Abstract: An embodiment of the present invention is a technique to fabricate a metal interconnect. A first metal trace is printed on a die attached to a substrate or a cavity of a heat spreader in a package to electrically connect the first metal trace to a power contact in the substrate. A device is mounted on the first metal trace. The device receives power from the substrate when the package is powered.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: July 24, 2012
    Assignee: Intel Corporation
    Inventors: Yoshihiro Tomita, David Chau, Gregory M. Chrysler, Devendra Natekar
  • Patent number: 8164169
    Abstract: An embodiment of the present invention is a technique to fabricate a cover assembly. A cover has a base plate and sidewalls attached to perimeter of the base plate. The sidewalls have a height. A plurality of devices is attached to underside of the base plate. The devices have length corresponding to the height such that the devices are sealed within the cover when the cover is attached to a surface.
    Type: Grant
    Filed: November 1, 2010
    Date of Patent: April 24, 2012
    Assignee: Intel Corporation
    Inventors: Gregory M. Chrysler, Tony A. Opheim
  • Patent number: 8125075
    Abstract: A method, apparatus and system with a semiconductor package including a microchimney or thermosiphon using carbon nanotubes to modify the effective thermal conductivity of an integrated circuit die.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: February 28, 2012
    Assignee: Intel Corporation
    Inventors: James G. Maveety, Gregory M. Chrysler, Unnikrishnan Vadakkanmaruveedu
  • Publication number: 20120021566
    Abstract: A method, apparatus and system with a semiconductor package including a microchimney or thermosiphon using carbon nanotubes to modify the effective thermal conductivity of an integrated circuit die.
    Type: Application
    Filed: January 15, 2008
    Publication date: January 26, 2012
    Inventors: James G. Maveety, Gregory M. Chrysler, Unnikrishnan Vadakkanmaruveedu
  • Publication number: 20110297362
    Abstract: A method and arrangement for dissipating heat from a localized area within a semiconductor die is presented. A semiconductor die is constructed and arranged to have at least one conduit portion therein. At least a portion of the conduit portion is proximate to the localized area. The conduit portion is at least partially filled with a heat-dissipating material. The conduit portion absorbs heat from the localized area and dissipates at least a portion of the heat away from the localized area. As such, thermal stress on the die is reduced, and total heat from the die is more readily dissipated.
    Type: Application
    Filed: August 12, 2011
    Publication date: December 8, 2011
    Inventors: Gregory M. Chrysler, James G. Maveety
  • Publication number: 20110214285
    Abstract: A carbon nanotube (CNT) array is patterned on a substrate. The substrate can be a microelectronic die or a heat sink for a die. The patterned CNT array is patterned by using a patterned catalyst on the substrate to form the CNT array by growing. The patterned CNT array can also be patterned by using a patterned mask on the substrate to form the CNT array by growing. A computing system that uses the CNT array for heat transfer from the die is also used.
    Type: Application
    Filed: May 16, 2011
    Publication date: September 8, 2011
    Inventors: Gregory M. Chrysler, Thomas S. Dory, James G. Maveety, Edward Prack, Unnikrishnan Vadakkanmaruveedu
  • Patent number: 8006747
    Abstract: A semiconductor die is constructed and arranged to have at least one conduit portion therein. At least a portion of the conduit portion is proximate to the localized area. The conduit portion is at least partially filled with a heat-dissipating material. The conduit portion absorbs heat from the localized area and dissipates at least a portion of the heat away from the localized area.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: August 30, 2011
    Assignee: Intel Corporation
    Inventors: Gregory M. Chrysler, James G. Maveety
  • Patent number: 7964447
    Abstract: A carbon nanotube (CNT) array is patterned on a substrate. The substrate can be a microelectronic die or a heat sink for a die. The patterned CNT array is patterned by using a patterned catalyst on the substrate to form the CNT array by growing. The patterned CNT array can also be patterned by using a patterned mask on the substrate to form the CNT array by growing. A computing system that uses the CNT array for heat transfer from the die is also used.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: June 21, 2011
    Assignee: Intel Corporation
    Inventors: Gregory M. Chrysler, Thomas S. Dory, James G. Maveety, Edward Prack, Unnikrishnan Vadakkanmaruveedu
  • Publication number: 20110135015
    Abstract: An embodiment of the present invention is a technique to fabricate a cover assembly. A cover has a base plate and sidewalls attached to perimeter of the base plate. The sidewalls have a height. A plurality of devices is attached to underside of the base plate. The devices have length corresponding to the height such that the devices are sealed within the cover when the cover is attached to a surface.
    Type: Application
    Filed: November 1, 2010
    Publication date: June 9, 2011
    Inventors: Gregory M. Chrysler, Tony A. Opheim
  • Publication number: 20110103438
    Abstract: An embodiment of the present invention is a technique to fabricate a metal interconnect. A first metal trace is printed on a die attached to a substrate or a cavity of a heat spreader in a package to electrically connect the first metal trace to a power contact in the substrate. A device is mounted on the first metal trace. The device receives power from the substrate when the package is powered.
    Type: Application
    Filed: January 11, 2011
    Publication date: May 5, 2011
    Applicant: INTEL CORPORATION
    Inventors: Yoshihiro Tomita, David Chau, Gregory M. Chrysler, Devendra Natekar
  • Patent number: 7915081
    Abstract: An embodiment of the present invention is a technique to fabricate a metal interconnect. A first metal trace is printed on a die attached to a substrate or a cavity of a heat spreader in a package to electrically connect the first metal trace to a power contact in the substrate. A device is mounted on the first metal trace. The device receives power from the substrate when the package is powered.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: March 29, 2011
    Assignee: Intel Corporation
    Inventors: Yoshihiro Tomita, David Chau, Gregory M. Chrysler, Devendra Natekar