Abstract: An impedance compensation circuit and method for an input/output buffer provides dynamic impedance compensation by using programmable impedance arrays and a dynamically adjustable on-chip load. Accordingly, among other advantages, only a single off-chip or external calibrated impedance resistor is used and only a single test pad is necessary.

Abstract: A voltage supply discriminator circuit senses multiple logic voltage supply levels and produces a plurality of control signals to select either or both of an output buffer circuit and/or an input buffer circuit that is coupled to a pad or pin. The discriminator circuit utilizes an input/output ring voltage supply and a reference voltage, such as a core voltage supply, to determine the appropriate circuitry to be used for the I/O pad. The appropriate circuitry is then automatically activated.

Abstract: A pre-buffer voltage level shifting circuit includes a multi-supply voltage level shifting circuit having single gate oxide devices coupled to produce a pre-buffer output signal to an output buffer. The pre-buffer output signal has a level within normal gate voltage operating levels of the single gate oxide devices for each of the least a plurality of supply voltages. In one embodiment, the multi-supply voltage level shifting circuit includes a current mirror coupled to at least one of the first or second power supply voltage and also uses a non-linear device, such as a transistor configured as a diode, which is coupled to the output of current mirror. The non-linear device is coupled to receive a digital input signal from a signal source, such as from a section of core logic. A switching circuit coupled to the non-linear device selectively activates the non-linear device based on a level of the digital input signal.

Abstract: An electrostatic discharge circuit utilizes a cascaded transistor configuration and a dual ESD protection circuit configuration. Preferably, the ESD protection circuits are made as a single gate oxide circuit. The protection circuit is effectively disabled during normal operation and allows a variable level voltage input to be applied during normal operation without damage to the cascaded transistors.

Abstract: A pre-buffer voltage level shifting circuit includes a multi-supply voltage level shifting circuit having single gate oxide devices coupled to produce a pre-buffer output signal to an output buffer. The pre-buffer output signal has a level within normal gate voltage operating levels of the single gate oxide devices for each of the least a plurality of supply voltages. In one embodiment, the multi-supply voltage level shifting circuit includes a current mirror coupled to at least one of the first or second power supply voltage and also uses a non-linear device, such as a transistor configured as a diode, which is coupled to the output of current mirror. The non-linear device is coupled to receive a digital input signal from a signal source, such as from a section of core logic. A switching circuit coupled to the non-linear device selectively activates the non-linear device based on a level of the digital input signal.

Abstract: An I/O pad voltage protection circuit and method tracks a bias voltage of cascaded stages in order to avoid overvoltage stress in I/O transistors. An overshoot protection circuit controls overshoot current sinking to provide a clamp voltage equal to an I/O pad supply voltage, or other suitable reference voltage, during overshoot conditions, as a function of a reference voltage generated by a reference voltage generating circuit. An undershoot protection circuit includes a reference voltage generating circuit and controls undershoot current sinking to provide a clamp voltage approximately equal to an I/O pad ground voltage, or other suitable reference voltage, during undershoot conditions as a function of a reference voltage generated by the second reference voltage generating circuit.

Abstract: An extraneous voltage protection circuit and method transforms an overvoltage input signal or undervoltage input signal to a suitable voltage level for a protected circuit. An input voltage dependent variable reference voltage is used to protect overvoltage protection circuitry against unsuitable undervoltage conditions. In one embodiment, an overvoltage protection circuit, an undervoltage protection circuit, and an input voltage dependent variable reference voltage source is made of single gate oxide MOS devices.

Abstract: An integrated circuit and method utilizes a differential input receiver having a first input that receives an input signal. A reference voltage adjustment circuit produces a variable reference signal for the second input of a differential input receiver. A feedback path is provided from the output of the differential input receiver to an input of the reference voltage adjustment circuit. The reference voltage adjustment circuit dynamically varies the variable reference voltage signal to facilitate hysteresis. The variable reference voltage signal is lowered in the case of a high input signal, and raised in the case of a low input signal.

Abstract: A circuit and method for providing a reference voltage includes controlling a plurality of current sources which are passive during generation of a reference voltage within a suitable operating range, but which are active during corrective portions when the reference voltage varies outside of a suitable operating range. A plurality of sensing elements is used in connection with the current sources to provide feedback to maintain the reference voltage within a suitable operating range. In one embodiment, all circuit elements are made of a single gate oxide thickness.

Abstract: An input stage circuit and method provides voltage level conversion and overvoltage protection for an input stage circuit using a single gate oxide pass circuit and a single gate oxide voltage level shifting circuit. In one embodiment, the circuit and method includes receiving an input signal through the single gate oxide voltage pass circuit wherein the input signal can have a voltage level higher and lower than a first reference voltage for the voltage pass circuit. An output signal from the voltage pass circuit is provided to a single gate oxide voltage level shifting circuit that shifts a voltage level of the input signal from a first logic high level to a second lower logic high level when the input signal is above a reference voltage.

Abstract: A voltage supply discriminator circuit senses multiple logic voltage supply levels and produces a plurality of control signals to select either or both of an output buffer circuit and/or an input buffer circuit that is coupled to a pad or pin. The discriminator circuit utilizes an input/output ring voltage supply and a reference voltage, such as a core voltage supply, to determine the appropriate circuitry to be used for the I/O pad. The appropriate circuitry is then automatically activated.

Abstract: A voltage supply discriminator circuit senses multiple logic voltage supply levels and produces a plurality of control signals to select either or both of an output buffer circuit and/or an input buffer circuit that is coupled to a pad or pin. The discriminator circuit utilizes an input/output ring voltage supply and a reference voltage, such as a core voltage supply, to determine the appropriate circuitry to be used for the I/O pad. The appropriate circuitry is then automatically activated.

Abstract: An extraneous voltage protection circuit and method transforms an overvoltage input signal or undervoltage input signal to a suitable voltage level for a protected circuit. An input voltage dependent variable reference voltage is used to protect overvoltage protection circuitry against unsuitable undervoltage conditions. In one embodiment, an overvoltage protection circuit, an undervoltage protection circuit, and an input voltage dependent variable reference voltage source is made of single gate oxide MOS devices.

Abstract: A buffer circuit utilizes a single gate oxide pre-buffer voltage level shifting circuit on, for example, an output buffer of an I/O pad, to accommodate different I/O pad supply voltages while maintaining normal operating voltages (degradation levels) across boundaries of single gate oxide devices that form the buffer. The single gate oxide output buffer can operate at several different supply voltages. A pre-buffer voltage level shifting circuit includes a multi-supply voltage level shifting circuit having signal gate oxide devices coupled to produce a pre-buffer output signal to an output buffer. A single gate oxide cross coupled active load is coupled to the multi-supply voltage level shifting circuit and provides suitable drive voltages to at least one of cascaded buffer transistors.

Abstract: A deceleration circuit is operatively coupled to a first and second voltage to reduce noise on each of the voltage lines. For example, one voltage may be a supply voltage and the other voltage may be at a ground potential. The deceleration circuit may be coupled, for example, to each circuit that need not operate at a maximum or high operational speed within an integrated circuit that has other circuits that require high speed operation.

Abstract: A powerup sequencing circuit and method generates an artificial supply voltage until the actual supply voltage is at a suitable level. An artificial supply source, such as a pull up circuit, is coupled to a node that receives a first supply voltage, such as an I/O buffer voltage. The pull up circuit is also coupled to an isolatable source voltage node. The isolatable source voltage node is the node that causes the actual second supply voltage. A temporary isolation circuit is operatively coupled to the pull up circuit and is operatively interposed between the node that receives the first supply voltage and the isolatable source voltage node. The pull up circuit provides a temporary or artificial second supply voltage level to an on chip circuit, such as an I/O buffer circuit or other suitable circuit that may, for example, be multi-voltage supply dependent.

Abstract: An integrated circuit and method utilizes a differential input receiver having a first input that receives an input signal. A reference voltage adjustment circuit produces a variable reference signal for the second input of a differential input receiver. A feedback path is provided from the output of the differential input receiver to an input of the reference voltage adjustment circuit. The reference voltage adjustment circuit dynamically varies the variable reference voltage signal to facilitate hysteresis. The variable reference voltage signal is lowered in the case of a high input signal, and raised in the case of a low input signal.

Abstract: A buffer circuit utilizes a single gate oxide pre-buffer voltage level shifting circuit on, for example, an output buffer of an I/O pad, to accommodate different I/O pad supply voltages while maintaining normal operating voltages (degradation levels) across boundaries of single gate oxide devices that form the buffer. The single gate oxide output buffer can operate at several different supply voltages. A pre-buffer voltage level shifting circuit includes a multi-supply voltage level shifting circuit having single gate oxide devices coupled to produce a pre-buffer output signal to an output buffer. A single gate oxide cross coupled active load is coupled to the multi-supply voltage level shifting circuit and provides suitable drive voltages to at least one of cascaded buffer transistors.