Abstract: An aircraft includes a wing that is extended through by a ducted fan having movable louvers.

Abstract: An aircraft includes a wing having an integrated ducted fan. The ducted fan is enclosed at least in sections by a feed lip. The feed lip has a flat curvature on the bow side and a comparatively strong curvature on the rear side.

Abstract: An aircraft includes a wing having an integrated ducted fan. The ducted fan is equipped with inlet louvers and outlet louvers. The inlet louvers are adjustable between an open position and a closed position by an actuating mechanism.

Abstract: An aircraft includes a wing having an integrated ducted fan. The ducted fan is optionally equipped with inlet louvers and outlet louvers. The inlet louvers and the outlet louvers are adjustable between an open position and a closed position.

Abstract: An aircraft includes a wing that is extended through by a ducted fan having movable louvers.

Abstract: A single wafer etching apparatus and various methods implemented in the single wafer etching apparatus are disclosed. In an example, etching a silicon nitride layer in a single wafer etching apparatus includes: heating a phosphoric acid to a first temperature; heating a sulfuric acid to a second temperature; mixing the heated phosphoric acid and the heated sulfuric acid; heating the phosphoric acid/sulfuric acid mixture to a third temperature; and etching the silicon nitride layer with the heated phosphoric acid/sulfuric acid mixture.

Abstract: A method for fabricating an interconnection structure in a complementary metal-oxide-semiconductor (CMOS) includes forming an opening in a dielectric layer over a substrate and forming a dummy electrode in a first portion of the opening in the dielectric layer. The method further includes filling a second portion of the opening with a second work-function metal layer, wherein a top surface of the second work-function metal layer is below a top surface of the opening and removing the dummy electrode. The method further includes depositing a first work-function metal layer in the first and second portions, whereby the first work-function metal layer is over the second work-function metal layer in the opening and depositing a signal metal layer over the first work-function metal layer in the first and second portions.

Abstract: A pouch-cell battery arrangement has a shrink sleeve covering (50), that surrounds the pouch (22) at least in places in an interlocking manner.

Abstract: An electric energy store (10) of a motor vehicle, in particular a high voltage energy store of a hybrid vehicle or an electric vehicle, has a housing (11) and storage modules (12) accommodated in the housing. The housing (11) has a supporting element (17) with an annular supporting frame (18) made from a fiber reinforced plastic and via which the electric energy store (10) can be connected to a body structure of a motor vehicle.

Abstract: A vehicle having an electric drive device and an energy storage device which is arranged in a housing is disclosed. The energy storage device is formed from a plurality of cells. The housing includes a plurality of partitioning devices, with the result that at least one partitioning device is positioned between two cells. The housing of the energy storage device is connected both to a cooling air intake duct, having an inlet opening, and to a cooling air outflow duct, having an outlet opening. At least one partitioning device is configured in such a way that a plurality of cooling ducts are formed between the cells, and cooling air can flow through the cooling ducts in order to cool the energy storage device.

Abstract: The present disclosure provides a method of fabricating a semiconductor device that includes providing a semiconductor substrate, forming a gate structure on the substrate, the gate structure including a dummy gate, removing the dummy gate from the gate structure thereby forming a trench, forming a work function metal layer partially filling the trench, forming a fill metal layer filling a remainder of the trench, performing a chemical mechanical polishing (CMP) to remove portions of the metal layers outside the trench, and implanting Si, C, or Ge into a remaining portion of the fill metal layer.

Abstract: A drive arrangement for an electric vehicle has an axle drive device of a portal design with two electric machines for driving the wheels of an axle of the electric vehicle, and at least one electric energy store that can be discharged when an electric machine is operated as a motor and/or can be charged when an electric machine is operated as a generator. The drive arranged is characterized in that the two electric machines (11) of the axle drive device (10) are combined with a respectively assigned transmission (12) in an electric axle to drive the individually suspended wheels (2) of the axle by means of, in each case, one articulated shaft flange (13) via a respective articulated shaft. Frequency converters assigned respectively to the two electric machines are combined in a converter unit.

Abstract: A motor vehicle has an electrical drive machine that is supplied with electrical energy by an electrical energy storage device, and has an underbody region or surface (5). The electrical energy storage device is accessible for maintenance and/or installation work via a maintenance cover (10) in the underbody surface (5) to reduce time required for maintenance and/or installation work.

Abstract: A method of forming a discrete nanostructured element at one or more predetermined locations on a substrate is presented. The method includes forming a mask member over the substrate. A window is formed in the mask member at each of one or more locations at which it is required to form the nanostructured element thereby to expose a portion of a surface of the substrate. A portion of the substrate exposed by the window at the one or more locations is removed to form one or more recesses in the substrate. The method further includes forming a layer of a nanostructure medium over a surface of the recess and annealing the structure thereby to form the nanostructured element in each of the one or more recesses. The nanostructured element includes a portion of the nanostructure medium and has an external dimension along at least two substantially orthogonal directions of less than substantially 100 nm.

Abstract: The disclosure relates to integrated circuit fabrication, and more particularly to a method for fabricating a semiconductor device. An exemplary method for fabricating the semiconductor device comprises providing a substrate; forming pad oxide layers over a frontside and a backside of the substrate; forming hardmask layers over the pad oxide layers on the frontside and the backside of the substrate; and thinning the hardmask layer over the pad oxide layer on the frontside of the substrate.

Abstract: A method for fabricating an interconnection structure in a complementary metal-oxide-semiconductor (CMOS) includes forming an opening in a dielectric layer over a substrate and forming a dummy electrode in a first portion of the opening in the dielectric layer. The method further includes filling a second portion of the opening with a second work-function metal layer, wherein a top surface of the second work-function metal layer is below a top surface of the opening and removing the dummy electrode. The method further includes depositing a first work-function metal layer in the first and second portions, whereby the first work-function metal layer is over the second work-function metal layer in the opening and depositing a signal metal layer over the first work-function metal layer in the first and second portions.

Abstract: The present disclosure provides a method of fabricating a semiconductor device that includes providing a semiconductor substrate, forming a metal gate on the substrate, the metal gate having a first gate resistance, removing a portion of the metal gate thereby forming a trench; and forming a conductive structure within the trench such that a second gate resistance of the conductive structure and remaining portion of the metal gate is lower than the first gate resistance.

Abstract: This description relates to a method for fabricating an interconnection structure in a complementary metal-oxide-semiconductor (CMOS). The method includes forming a first opening in a dielectric layer over a substrate and partially filling the first opening with a second work-function metal layer, wherein a top surface of the second work-function metal layer is below a top surface of the first opening. The method further includes forming a second opening adjoining the first opening in the dielectric layer over the substrate and depositing a first work-function metal layer in the first and second openings, whereby the first work-function metal layer is over the second work-function metal layer in the first opening. The method further includes depositing a signal metal layer over the first work-function metal layer in the first and second openings and planarizing the signal metal layer.

Abstract: An energy store for a motor vehicle for storage and emission of electrical energy as required, having a multiplicity of cells which are positioned one above the other and/or alongside one another like an array, wherein each cell is surrounded by a first material, wherein a second material is positioned between the cells which are surrounded by the first material and form a cell array, and wherein heat exchanging ribs are positioned at edges of the cell array.