Patents by Inventor Guan Wang

Guan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220158756
    Abstract: This application provides a data transmission method. The method includes: An electronic device first establishes an MPTCP connection to an application server, where the MPTCP connection includes two TCP connections. Then, the electronic device receives indication information from an application server, where the indication information includes a type identifier and a parameter. When the type identifier indicates a low data transmission delay requirement, the electronic device receives, in a first time period after the electronic device receives the indication information, the data stream by using a first TCP connection. When an accumulated data amount actually received by the electronic device in the first time period is less than a product of the parameter and duration corresponding to the first time period, the electronic device receives the data stream in a second time period by using both the two TCP connections.
    Type: Application
    Filed: December 10, 2019
    Publication date: May 19, 2022
    Inventors: Hao WANG, Chenren XU, Shuo CHEN, Jianfeng QI, Henghui LIANG, Xiaojin LI, Lili LIU, Guan WANG
  • Patent number: 11336265
    Abstract: Several embodiments of electrical circuit devices and systems with clock distortion calibration circuitry are disclosed herein. In one embodiment, an electrical circuit device includes an electrical circuit die having clock distortion calibration circuitry to calibrate a clock signal. The clock distortion calibration circuitry is configured to compare a first duty cycle of a first voltage signal of the clock signal to a second duty cycle of a second voltage signal of the clock signal. Based on the comparison, the clock distortion calibration circuitry is configured to adjust a trim value associated with at least one of the first and the second duty cycles of the first and the second voltage signals, respectively, to calibrate at least one of the first and the second duty cycles and account for duty cycle distortion encountered as the clock signal propagates through a clock tree of the electrical circuit device.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: May 17, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Guan Wang, Qiang Tang, Ali Feiz Zarrin Ghalam
  • Publication number: 20220148721
    Abstract: An analysis method for the causal inference of human physiological network in multiscale time series signals includes the following steps: S1: decomposing physiological signals u1, u2, . . . , um to be analyzed by using a noise-assisted multivariate empirical mode decomposition (NA-MEND) algorithm; S2: carrying out a causal analysis between two different physiological signals ui, uj, where i=1, 2, . . . , m, j=1, 2, . . . , m, and i?j, to obtain a causality between the two signals; and S3: repeating step S2 for any two signals in u1, u2, . . . , um until a causality between each two signals in u1, u2, . . . , um is obtained to form the causal network. The present invention can effectively analyze the causal network of the physiological signals, thereby facilitating the application of the physiological signals.
    Type: Application
    Filed: August 9, 2021
    Publication date: May 12, 2022
    Applicant: University of Electronic Science and Technology of China
    Inventors: Yi Zhang, Lifu Zhang, Guan Wang, Mingjun Xie, Ziwen Li, Denan Lin, Xiaohong Fan, Banghua Wu, Jipeng Fan, Lixin Pu, Mingjie He, Steven Su, Branko Celler, Peng Xu, Dezhong Yao
  • Publication number: 20220138120
    Abstract: An electrical circuit device includes a signal bus comprising a plurality of parallel signal paths and a calibration circuit, operatively coupled with the signal bus. The calibration circuit can perform operations including determining a representative duty cycle for a plurality of signals transferred via the plurality of parallel signal paths, the plurality of signals comprising a plurality of duty cycles and comparing the representative duty cycle for the plurality of signals transferred via the plurality of parallel signal paths to a reference value to determine a comparison result. The calibration circuit can perform further operations including adjusting, based on the comparison result, a trim value associated with the plurality of duty cycles of the plurality of signals to compensate for distortion in the plurality of duty cycles and calibrating the plurality of duty cycles of the plurality of signals using the adjusted trim value.
    Type: Application
    Filed: October 30, 2020
    Publication date: May 5, 2022
    Inventors: Guan Wang, Ali Feiz Zarrin Ghalam, Chin-Yu Chen, Jongin Kim
  • Publication number: 20220108777
    Abstract: The present disclosure provides a group of diagnostic biomarkers usable for diagnosis of colorectal cancer or colorectal adenoma. A method for detecting colorectal cancer or colorectal adenoma using the group of diagnostic biomarkers is also provided. For example, the method provided by the present disclosure is a non-invasive approach that may utilize serum samples for detecting colorectal cancer. Moreover, the method for detecting colorectal cancer may detect colorectal cancer of different stages (e.g., pre-cancer stage, early stage, middle stage, late stage).
    Type: Application
    Filed: October 15, 2021
    Publication date: April 7, 2022
    Applicant: PRECOGIFY PHARMACEUTICAL CHINA CO., LTD.
    Inventors: Kai LIN, Xudong DAI, Yu TIAN, Guan WANG
  • Publication number: 20220064672
    Abstract: Oncolytic viruses offer an in situ vaccination approach to activate tumor-specific T cell responses. However, the upregulation of PD-L1 expression on tumor cells and immune cells leads to tumor resistance to oncolytic immunotherapy. Herein, we generate an engineered oncolytic virus that coexpresses a PD-L1 inhibitor and GM-CSF. This oncolytic virus is capable of secreting the PD-L1 inhibitor that systemically binds and inhibits PD-L1 on tumor cells and immune cells. The intratumoral injection with the oncolytic virus overcomes PD-L1-mediated immunosuppression during both the priming and effector phases, provokes systemic T cell responses against dominant and subdominant neoantigen epitopes derived from mutations, and leads to an effective rejection of both virus-injected and distant tumors.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 3, 2022
    Applicant: University of Southern California
    Inventors: Siyi CHEN, Xue F. HUANG, Guan WANG
  • Patent number: 11214561
    Abstract: The invention relates to a histone methyltransferase EZH2 inhibitor, a preparation method and pharmaceutical use thereof. In particular, the invention relates to a compound represented by the general formula (I), a preparation method thereof, a pharmaceutical composition containing the same, and a use thereof as a histone methyltransferase EZH2 inhibitor for treating diseases associated with the histone methyltransferase EZH2, especially cancer. The definition of each substituents in the general formula (I) is same as the definition in the specification.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: January 4, 2022
    Assignee: Ancureall Pharmaceutical (Shanghai) Co., Ltd.
    Inventors: Jutong Si, Guan Wang, Meifeng Jiang, Zhihe Yang, Chentao Zhou
  • Patent number: 11201611
    Abstract: An input/output (I/O) circuit provides a direct current (DC) bias between I/O stages to control duty cycle of the I/O. The I/O circuit can include one or more predriver stages and one or more output stages. The predriver stages can collectively be referred to as a predriver stage, and the output stages can collectively be referred to an output stage. The output stage for a transmitter drives the signal line. The output stage for an input buffer provides a receive signal for processing by the receiver. The I/O circuit includes a control circuit to control the DC bias between the stages to provide trim adjustment of a duty cycle for the output stage.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: December 14, 2021
    Assignee: Intel Corporation
    Inventors: Guan Wang, Qiang Tang, Agatino Massimo Maccarrone
  • Patent number: 11142798
    Abstract: Disclosed are for monitoring tumor load in a patient by selecting a predetermined number of biomarker genes from DNA extracted from a tumor tissue sample from the patient to form a panel of biomarker genes (“customized genes”); isolating circulating cell-free DNA from a bodily fluid (body fluid) sample of the patient; enriching DNA sequences containing the biomarker genes in the cell-free DNA fragments; sequencing the enriched DNA; counting the number of mutated DNA and normal DNA sequencing reads in enriched DNA; and obtaining a tumor load of the patient. Optionally, the detection of mutations in genes related to therapeutic treatments (“medicine genes”) are carried out simultaneously with the testing of customized genes.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: October 12, 2021
    Assignee: GENOMICARE BIOTECHNOLOGY (SHANGHAI) CO. LTD
    Inventors: Qiang Xu, Guan Wang, Chun Dai
  • Publication number: 20210263660
    Abstract: A memory device includes a plurality of input/output (I/O) nodes, a circuit, a latch, a memory, and control logic. The plurality of I/O nodes receive a predefined data pattern. The circuit adjusts a delay for each I/O node as the predefined data pattern is received. The latch latches the data received on each I/O node. The memory stores the latched data. The control logic compares the stored latched data to an expected data pattern and sets the delay for each I/O node based on the comparison.
    Type: Application
    Filed: May 11, 2021
    Publication date: August 26, 2021
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Luigi Pilolli, Ali Feiz Zarrin Ghalam, Guan Wang, Qiang Tang
  • Patent number: 11079946
    Abstract: A memory device includes a plurality of input/output (I/O) nodes, a circuit, a latch, a memory, and control logic. The plurality of I/O nodes receive a predefined data pattern. The circuit adjusts a delay for each I/O node as the predefined data pattern is received. The latch latches the data received on each I/O node. The memory stores the latched data. The control logic compares the stored latched data to an expected data pattern and sets the delay for each I/O node based on the comparison.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: August 3, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Luigi Pilolli, Ali Feiz Zarrin Ghalam, Guan Wang, Qiang Tang
  • Publication number: 20210224645
    Abstract: Systems and methods for a predicting power usage effectiveness (PUE) of a computer room with an optimized parameter using a Deep Concept Aggregation Neural Network (DCANN) algorithm based on hierarchical concept include receiving input feature parameters of a plurality of components associated with a computer room, and predicting the PUE of the computer room using a trained neural network, which comprises a hierarchical concept layer having embedded domain knowledge of the plurality of components placed between an input layer and a hidden layer.
    Type: Application
    Filed: May 28, 2018
    Publication date: July 22, 2021
    Inventors: Zhan Li, Li Chen, Feng Zeng, Guan Wang
  • Publication number: 20210218388
    Abstract: Several embodiments of electrical circuit devices and systems with clock distortion calibration circuitry are disclosed herein. In one embodiment, an electrical circuit device includes an electrical circuit die having clock distortion calibration circuitry to calibrate a clock signal. The clock distortion calibration circuitry is configured to compare a first duty cycle of a first voltage signal of the clock signal to a second duty cycle of a second voltage signal of the clock signal. Based on the comparison, the clock distortion calibration circuitry is configured to adjust a trim value associated with at least one of the first and the second duty cycles of the first and the second voltage signals, respectively, to calibrate at least one of the first and the second duty cycles and account for duty cycle distortion encountered as the clock signal propagates through a clock tree of the electrical circuit device.
    Type: Application
    Filed: March 26, 2021
    Publication date: July 15, 2021
    Inventors: Guan Wang, Qiang Tang, Ali Feiz Zarrin Ghalam
  • Publication number: 20210206917
    Abstract: The present invention relates to a carboxyl group containing perfluoropolyether compound of formula (I): Rf—X1—X2(I). In the formula Rf—X1—X2(I), Rf represents F—(CF2)m—(OC4F8)p—(OC3F6)q—(OC2F4)r—(OCF2)s—OC(Z)F—(CF2)n—, wherein p, q, r and s are each independently an integer of 0 or more and 200 or less, and the sum of p, q, r and s is at least 1; in the formula, the occurrence order and number of the respective repeating units in parentheses with the subscript p, q, r or s are arbitrary in the formula; m and n are each independently an integer of 0 or more and 30 or less, Z is F or CF3; X1 represents a divalent organic group; and X2 represents a COOH group.
    Type: Application
    Filed: May 7, 2019
    Publication date: July 8, 2021
    Applicant: Guangzhou ur Materials Technology Co., Ltd.
    Inventors: Yi-Jing CHEN, Qi-Guan WANG, Gong-Zhou CHEN
  • Patent number: 11054503
    Abstract: The present invention discloses a radar target spherical projection method for maritime formation. The method comprises the steps of converting the height of a radar target into an altitude and converting the position of the radar target into a spherical position, can be used for pre-processing radar data, supports multi-platform composite tracking based on a data chain, and contribute to generating a sharable single integrated picture (SIP) among formation members. The present invention can be widely applied to oceanic area formation operations such as coastguard patrol, sea escort, deep sea far sighting and maritime formation fight.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: July 6, 2021
    Assignee: THE 28TH RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION
    Inventors: Yi Mao, Yunru Li, Ping Chen, Guan Wang, Daqing Huang, Bo Wang
  • Publication number: 20210173094
    Abstract: A method of mapping and localization, comprising, reconstructing a point cloud and a camera pose based on VSLAM, synchronizing the camera pose and a GPS timestamp at a first set of GPS coordinate points, transforming the first set of GPS coordinate points corresponding to the GPS timestamp into a first set of ECEF coordinate points, determining a translation and a rotation between the camera pose and the first set of ECEF coordinate points, transforming the point cloud and the camera pose into a second set of ECEF coordinates based on the translation and the rotation, transforming the point cloud and the camera pose into a second set of GPS coordinate points constructing and storing a key-frame image, a key-frame timestamp and a key-frame GPS based on the second set of GPS coordinate points.
    Type: Application
    Filed: December 6, 2019
    Publication date: June 10, 2021
    Inventors: Yu Chen, Guan Wang
  • Patent number: 11001961
    Abstract: The disclosure relates to a method for decolorization of a dye-colored synthetic polymer, which includes the steps of treating a dye-colored synthetic polymer, such as polyester, with a treatment composition at pH 4 or less, the treatment composition comprising hydrogen peroxide, an iron catalyst, water, and a ketone. The resulting decolorized synthetic polymer is then separated from the treatment composition.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: May 11, 2021
    Assignee: North Carolina State University
    Inventors: David Hinks, Maqbool Hussain, Guan Wang
  • Patent number: 10982968
    Abstract: Embodiments of the present disclosure are directed to providing an Augmented Reality (AR) navigation display in a vehicle. More specifically, embodiments are directed to rendering AR indications of a navigation route over a camera video stream in perspective. According to one embodiment, visual tracking can be performed on features in the video data and camera pose, i.e., a matrix encapsulating position and orientation, can be determined for each frame of video based on both the visual tracking and navigation sensor data. These separately determined camera poses can then be merged or fused into a single camera pose that is more accurate and more stable and which can then be used in rendering more realistic AR route indicators onto the video of the real-world route captured by the camera.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: April 20, 2021
    Assignee: NIO USA, INC.
    Inventors: Vidya Elangovan, Prashant Jain, Anthony Tao Liang, Guan Wang
  • Patent number: 10972078
    Abstract: Several embodiments of electrical circuit devices and systems with clock distortion calibration circuitry are disclosed herein. In one embodiment, an electrical circuit device includes an electrical circuit die having clock distortion calibration circuitry to calibrate a clock signal. The clock distortion calibration circuitry is configured to compare a first duty cycle of a first voltage signal of the clock signal to a second duty cycle of a second voltage signal of the clock signal. Based on the comparison, the clock distortion calibration circuitry is configured to adjust a trim value associated with at least one of the first and the second duty cycles of the first and the second voltage signals, respectively, to calibrate at least one of the first and the second duty cycles and account for duty cycle distortion encountered as the clock signal propagates through a clock tree of the electrical circuit device.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: April 6, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Guan Wang, Qiang Tang, Ali Feiz Zarrin Ghalam
  • Patent number: 10902607
    Abstract: A method of instance segmentation, comprising, defining a bounding box, depth mapping the bounding box, sorting the depth map, estimating stability due to noise of the sorted depth map, detecting low frequency jumps of the sorted depth map based on the estimated stability, detecting high frequency jumps of the sorted depth map, comparing the detected low frequency jumps and the detected high frequency jumps, detecting at least one of a largest object and a closest object based on the comparison and pixel masking the at least one of the largest object and the closest object.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: January 26, 2021
    Assignee: Black Sesame International Holding Limited
    Inventors: Jeff Lee, Guan Wang