Abstract: A A molar toy contains: a body and an annular member. The body is made of flexible material and is formed in a capsule shape, and the body includes a hollow cavity defined therein, a first opening and a second opening which communicate with the hollow cavity and exterior environment. The annular member is inserted into the first opening and the second opening of the body so that a part of the annular member is accommodated in the hollow cavity of the body.

Abstract: A method, computer program product, and computer system are provided for running an application over a host kernel. The method intercepts a system call initiated by a container instance running on a host kernel, then determines whether the initiating container instance is tagged with a mapping to a virtual machine (VM) also running on the host kernel. The method further redirects the system call to the mapped VM responsive to the initiating container instance being tagged with a mapping to a VM, wherein the system call is to be processed by the VM.

Abstract: A resource management method, system, and computer program product for creating a dummy virtual machine (VM) in a Virtual Machine (VM) hypervisor and a dummy container in a container engine for a resource management purpose, adding hooks for each of the VM and the container, and calling the container engine to update a resource allocation in the dummy container when the hook of the VM is started and the VM hypervisor to update a resource allocation in the dummy VM when the hook of the container is started.

Abstract: A wafer bonding method includes providing a first wafer including a first wafer surface, forming a first metal layer on the first wafer surface, and forming a first annular retaining wall structure including a first annular retaining wall and a second annular retaining wall surrounded by the first annular retaining wall. The first metal layer is formed between the first annular retaining wall and the second annular retaining wall. The method includes providing a second wafer including a second wafer surface, forming a second metal layer on the second wafer surface, and forming a second annular retaining wall structure including a third annular retaining wall and a fourth annular retaining wall surrounded by the third annular retaining wall. The second metal layer is formed between the third annular retaining wall and the fourth annular retaining wall. The method further includes bonding the first metal layer to the second metal layer.

Abstract: Examples of techniques for running kernel dependent applications in containers are disclosed. In one example implementation, a method includes initiating, by a processing system, a user mode Linux (UML) kernel in a container of a host. The method further includes initiating, by the processing system, an agent inside the UML, the agent configured to handle system call redirection from a host kernel of the host. The method further includes enabling, by the processing system, a system call hook kernel module on the host to hook a system call received from the container. The method further includes determining, by the processing system, whether the UML kernel is running inside the container. The method further includes, based at least in part on determining that the UML is running inside the container, passing, by the processing system, the system call to the UML kernel inside the container.

Abstract: Examples of techniques for running kernel dependent applications in containers are disclosed. In one example implementation, a method includes initiating, by a processing system, a user mode Linux (UML) kernel in a container of a host. The method further includes initiating, by the processing system, an agent inside the UML, the agent configured to handle system call redirection from a host kernel of the host. The method further includes enabling, by the processing system, a system call hook kernel module on the host to hook a system call received from the container. The method further includes determining, by the processing system, whether the UML kernel is running inside the container. The method further includes, based at least in part on determining that the UML is running inside the container, passing, by the processing system, the system call to the UML kernel inside the container.

Abstract: A method and system for detecting and locating trapped people are provided. The method includes the following steps: (a) transmitting a first wireless signal based on a transmission power, and recording the transmission power; (b) when a first mobile device registers to the system for detecting and locating trapped people in response to the first wireless signal, recording identity information of the first mobile device; (c) determining whether the transmission power is a maximum transmission power; (d) if no, increasing the transmission power, and repeating the steps (a) to (d); if yes, calculating a relative location between the first mobile device and the system for detecting and locating trapped people based on the recorded transmission power and the recorded identity information.

Abstract: One or more systems and techniques for communicating a signal between a first chip and a second chip using one or more circuits are provided. If the signal corresponds to a first voltage, one or more voltages are provided to one or more locations and a capacitive load is charged using a pull-up driver that is connected to a power supply. If the signal corresponds to a second voltage, one or more voltages are provided to one or more locations and the capacitive load is discharged using a pull-down driver that is connected to ground. When the first chip is powered off, a fail-safe mode is provided by configuring a cross control circuit to generate a bias to control one or more transistors.

Abstract: A positive and negative voltage generating circuit includes a first rectification circuit, a first voltage stabilizing circuit, a boost circuit, a second rectification circuit, and a second voltage stabilizing circuit. The first rectification circuit rectifies input voltage signals. The first voltage stabilizing circuit stabilizes the rectified input voltage signals to output a negative voltage needed by an LCD module. The boost circuit up-converts the input voltage signals to output a first voltage. The second rectification circuit rectifies the first voltage. The second voltage stabilizing circuit stabilizes the rectified first voltage to output a positive voltage needed by the LCD module. An LCD module driving system and a VOIP phone are also provided.

Abstract: A multiple device voltage electrostatic discharge (ESD) clamp includes a trigger circuit, first and second inverters, and an ESD discharge path. The trigger circuit includes a resistor having a first terminal electrically connected to a first voltage supply node, and a capacitor having a first terminal electrically connected to a second voltage supply node. The first inverter has an input terminal electrically connected to second terminals of the resistor and the capacitor. The second inverter has a power terminal electrically connected to an output terminal of the first inverter. The ESD discharge path has a first end electrically connected to the first voltage supply node, and a second end electrically connected to a third voltage supply node, and includes a first transistor controlled by the first inverter, and a second transistor controlled by the second inverter.

Abstract: This present invention discloses a heterocyclic substituted acardite derivate and application thereof, namely compounds in the general formula (1) or the general formula (2) or pharmaceutically acceptable salts thereof, wherein A is monosubstituted or polysubstituted quinoline, isoquinoline, quinazoline, pyrrole or pyrimidine, and the substituent is halogen, C1-5alkyl, C1-5haloalkyl, C1-5alkoxy, C1-5haloalkoxy, C1-5alkylamino, C1-5haloalkylamino, amino or nitryl; R1 is C1-5alkyl; R2 is one or more selected from hydrogen, halogen, alkyl, alkoxy, haloalkyl or haloalkoxy; and R3 is one or more selected from hydrogen, halogen, alkyl, alkoxy, haloalkyl or haloalkoxy. The compound of the present invention and the pharmaceutically acceptable salt thereof can be used for treating tumor or leukemia.

Abstract: A dynamic resource allocation method is introduced herein. The method is adapted to a base station. The method includes the following steps. A number of contending devices in the random access slot is estimated. A reference value is calculated according to the number of the contending devices and a resource allocation parameter. A number of specific resources is calculated according to the number of the contending devices, a number of acknowledgeable machine-type communication devices of the base station at the random access slot and a preamble detection probability. A number of reserved random access opportunities is determined according to a maximum number of the random access opportunities, the number of the specific resources and the reference value. The resources are allocated to the at least one machine-type communication device according to the number of the reserved random access opportunities.

Abstract: One or more systems and techniques for communicating a signal between a first chip and a second chip using one or more circuits are provided. If the signal corresponds to a first voltage, one or more voltages are provided to one or more locations and a capacitive load is charged using a pull-up driver that is connected to a power supply. If the signal corresponds to a second voltage, one or more voltages are provided to one or more locations and the capacitive load is discharged using a pull-down driver that is connected to ground. When the first chip is powered off, a fail-safe mode is provided by configuring a cross control circuit to generate a bias to control one or more transistors.

Abstract: A method for optimizing control circuit for FC HDDs in a system includes determining the number of subsystems supported in a FC loop and the number of HDDs to be supported in each of the subsystems, analyzing binary values of address of all HDDs for each of the subsystems, enumerating logical variations of the address selection signals according to the analyzed binary values to obtain logic combinations for the address selection signals, analyzing logic relations between these logic combinations and a system address signal, selecting logic components required according to the found logic relations, and calculating the total number of required logic components and the number of address selections signals that can share an output pin of each of the required logic components based on properties of output pins of the logic components and maximum input current of the address selection signals.

Abstract: A threshold voltage detection apparatus comprises a voltage level up-shifter and a voltage level down-shifter. The threshold voltage detection apparatus is placed at a circuit fabricated in a low voltage semiconductor process. The threshold voltage detection apparatus receives an input signal having a wide range and generates output signals comprising the logic of the input signal, but having a voltage range suitable for the low voltage circuit. The threshold voltage detection apparatus ensures that the low voltage circuit operates in a range to which the low voltage semiconductor process is specified.

Abstract: A multiple device voltage electrostatic discharge (ESD) clamp includes a trigger circuit, first and second inverters, and an ESD discharge path. The trigger circuit includes a resistor having a first terminal electrically connected to a first voltage supply node, and a capacitor having a first terminal electrically connected to a second voltage supply node. The first inverter has an input terminal electrically connected to second terminals of the resistor and the capacitor. The second inverter has a power terminal electrically connected to an output terminal of the first inverter. The ESD discharge path has a first end electrically connected to the first voltage supply node, and a second end electrically connected to a third voltage supply node, and includes a first transistor controlled by the first inverter, and a second transistor controlled by the second inverter.

Abstract: A voltage tolerant input/output circuit coupled to an input/output pad, and is able to support a voltage overdrive operation of approximately twice an operational voltage, and have an input tolerance of approximately three times the operational voltage. The circuit includes a pull-up driver, a P-shield, an N-shield, a pull-down driver and a cross-control circuit. The pull-up driver is coupled to a power supply. The P-shield has an N-well and is coupled to the pull-up driver at a node C, and coupled to the input/output pad. An N-shield is also coupled to the input/output pad. A pull-down driver is coupled between ground and the N-shield at a node A. A cross-control circuit is configured to detect voltages at: the node A, the node C, and the input/output pad. The cross-control circuit is configured to output control signals to the P-shield and the N-shield based on the detected voltages.

Abstract: An amplifier drives the gate of a master source follower and of at least one slave source follower to form a low-dropout (LDO) regulator. Alternatively, a charge pump drives the master source follower to form the regulator. Additional slave source followers may be used in conjunction with the charge pump and the master source follower to improve the regulator performance.

Abstract: A support apparatus for supporting a device includes a fixing portion detachably secured to the device, and a rotating portion rotatably coupled to the fixing portion. The fixing portion defines an opening for allowing the support apparatus to be hand-held, and, when placed on a supporting surface, is capable of being rotated to form different viewing angles for the device. A device assembly using the support apparatus is also provided.

Abstract: A method for optimizing control circuit for FC HDDs in a system includes determining the number of subsystems supported in a FC loop and the number of HDDs to be supported in each of the subsystems, analyzing binary values of address of all HDDs for each of the subsystems, enumerating logical variations of the address selection signals according to the analyzed binary values to obtain logic combinations for the address selection signals, analyzing logic relations between these logic combinations and a system address signal, selecting logic components required according to the found logic relations, and calculating the total number of required logic components and the number of address selections signals that can share an output pin of each of the required logic components based on properties of output pins of the logic components and maximum input current of the address selection signals.