Patents by Inventor Gun Yong Sung

Gun Yong Sung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090242913
    Abstract: Provided is a highly efficient silicon-based light emitting diode (LED) including a Distributed Bragg Reflector (DBR), an n-type doping layer, and a p-type substrate structure. The silicon-based LED includes: a substrate having a p-type mesa substrate structure; an active layer that is formed on the substrate and has a first surface and a second surface opposite the first surface; a first reflective layer facing the first surface of the active layer; a second reflective layer that is located on either side of the p-type substrate structure and faces the second surface of the active layer; an n-type doping layer sandwiched between the active layer and the first reflective layer; a first electrode electrically connected to the n-type doping layer; and a second electrode electrically connected to the p-type substrate structure.
    Type: Application
    Filed: November 14, 2005
    Publication date: October 1, 2009
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Tae-Youb Kim, Nae-Man Park, Kyung-Hyun Kim, Gun-Yong Sung
  • Publication number: 20090101928
    Abstract: Provided are a light emitting diode and a method of fabricating the same. In an inorganic light emitting diode, at least one layer selected from a group consisting of an oxide layer, a nitride layer, and a metal layer is formed on an upper doping layer which is in contact with a transparent electrode, and the plasma treatment is performed on the resultant structure to form a plasma etching layer, thereby enhancing adhesion between the upper doping layer and the transparent electrode. In an organic light emitting diode, at least one layer selected from a group consisting of an oxide layer, a nitride layer, and a metal layer is formed on a plastic substrate which is in contact with a transparent electrode, and the plasma treatment is performed on the resultant structure to form a plasma etching layer, thereby enhancing adhesion between the substrate and the transparent electrode.
    Type: Application
    Filed: December 7, 2005
    Publication date: April 23, 2009
    Inventors: Kyung Hyun Kim, Rae Man Park, Tae Youb Kim, Gun Yong Sung
  • Publication number: 20090032836
    Abstract: Provided is a semiconductor light emitting diode that uses a silicon nano dot and a method of manufacturing the same. The semiconductor light emitting diode includes a light emitting layer that emits light; a hole injection layer formed on the light emitting layer; an electron injection layer formed on the light emitting layer to face the hole injection layer; a metal layer that comprises a metal nano dot and is formed on the electron injection layer; and a transparent conductive electrode formed on the metal layer. Amorphous silicon nitride that includes the silicon nano dot is used as the light emitting layer.
    Type: Application
    Filed: June 27, 2008
    Publication date: February 5, 2009
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chul Huh, Rae-Man Park, Jae-Heon Shin, Kyung-Hyun Kim, Tae-Youb Kim, Kwan-Sik Cho, Gun-Yong Sung
  • Publication number: 20090001401
    Abstract: Provided is a semiconductor light emitting diode, in which a plurality of upper electrodes is formed on a surface of an upper doping layer or an emission layer and at least one lower electrode is formed on a surface of a lower doping layer or a substrate in a silicon-based light emitting diode or a nitride-based light emitting diode to enhance a spreading characteristic of current applied to the electrodes, thereby maximizing an emitting area of the emission layer and inducing an emission having a uniform intensity on an entire surface of the emission layer to further enhance the luminous efficiency of the light emitting diode.
    Type: Application
    Filed: August 5, 2005
    Publication date: January 1, 2009
    Inventors: Nae Man Park, Kyung Hyun Kim, Tae Youb Kim, Gun Yong Sung
  • Publication number: 20080303018
    Abstract: Due to the indirect transition characteristic of silicon semiconductors, the light extraction efficiency of a silicon-based light emitting diode is lower than that of a compound semiconductor-based light emitting diode. For this reason, there are difficulties in practically using and commercializing silicon-based light emitting diodes developed so far.
    Type: Application
    Filed: March 14, 2006
    Publication date: December 11, 2008
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTIT
    Inventors: Kyung Hyun Kim, Nae Man Park, Chul Huh, Tae Youb Kim, Jae Heon Shin, Kwan Sik Cho, Gun Yong Sung
  • Publication number: 20080296593
    Abstract: Provided is a highly-efficient silicon light emitting device including an improved structure by which more light of the light emitted toward the lateral side of the light emitting device is emitted toward the front side thereof than conventional light emitting devices so as to improve the brightness. The silicon light emitting device includes a substrate, a plurality of light emitting structures formed on the substrate, each of the light emitting structures comprising an active layer, and a metal electrode comprising a lower metal electrode formed below the substrate and an upper metal electrode formed on the light emitting structures. The light emitting structures have column shapes whose vertical cross-sections are inverse trapezoid.
    Type: Application
    Filed: June 16, 2006
    Publication date: December 4, 2008
    Inventors: Nae Man Park, Tae Youb Kim, Gun Yong Sung
  • Publication number: 20080290360
    Abstract: A silicon light emitting diode capable of effectively utilizing light radiated toward the lateral side of a substrate by including a side reflecting mirror is provided. The silicon-based light emitting diode includes a p-type silicon substrate having a plurality of grooves, a light emitting diode layer formed on each of the grooves of the silicon substrate, the light emitting diode layer including an active layer, an n-type doped layer, and a transparent electrode layer, and a metal electrode including a lower metal electrode formed on the bottom surface of the p-type silicon substrate and an upper metal electrode formed on the top surface of the transparent electrode layer. The lateral surface of each of the grooves is separated from the light emitting diode layer and used as a reflecting mirror The lateral surface is referred to as the side reflecting mirror.
    Type: Application
    Filed: April 25, 2006
    Publication date: November 27, 2008
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Tae-Youb Kim, Nae-Man Park, Gun-Yong Sung, Jong-Heon Yang
  • Patent number: 6998643
    Abstract: A silicon-based light emitting diode simultaneously adopts doping layers and Distributed Bragg Reflector (DBR). The silicon-based light emitting diode includes an active layer having mutually opposing a first side and a second side. A first reflecting portion faces with the first side of the active layer, and a second reflecting portion faces with the second side of the active layer. A first doping layer is interposed between the active layer and the first reflecting portion. A second doping layer is interposed between the active layer and the second reflecting portion. A first electrode is electrically connectable to the first doping layer, and a second electrode is electrically connectable to the second doping layer. Here, At least one of the first reflecting portion and the second reflecting portion has the DBR that is formed by alternately stacking two kinds of differently composed silicon-containing insulating layers and a gate.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: February 14, 2006
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Taeyoub Kim, Nae Man Park, Gun Yong Sung
  • Patent number: 6773836
    Abstract: The present invention utilizes magnesium diboride (MgB2) or (Mg1-xMx)B2 as a superconductivity thin film which can be applied to a rapid single flux quantum (RSFQ) circuit. A method for manufacturing a superconductor incorporating therein a superconductivity thin film, begins with preparing a single crystal substrate. Thereafter, a template film is formed on top of the substrate, wherein the template has a hexagonal crystal structure. The superconductivity thin film of MgB2 or (Mg1-xMx)B2 is formed on top of the template film. If Mg amount in the superconductivity thin film is insufficient, Mg vapor is flowed on the surface of the superconductivity thin film while a post annealing process is carried out at the temperature ranging from 400° C. to 900° C.
    Type: Grant
    Filed: June 5, 2003
    Date of Patent: August 10, 2004
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jun Ho Kim, Sang Hyeob Kim, Gun Yong Sung
  • Publication number: 20040046499
    Abstract: There is provided a light-emitting device that increases an emissivity in a light emission layer so as to improve luminous efficiency. The light-emitting device includes a cover layer formed by depositing a material having a high refractive index that is higher than that of the light emission layer. The light-emitting device increases a ratio of the light reflected internally into the light-emitting device to increase a light absorption in the light emission layer, thereby enhancing emissivity in the light emission layer. Therefore, the light-emitting device can enhance the efficiency of it, even when the light emission layer is made of a conventional material, and can satisfy the commercial requirement for a display that is very bright.
    Type: Application
    Filed: December 11, 2002
    Publication date: March 11, 2004
    Inventors: Nae-Man Park, Sang-Hyeob Kim, Gun-Yong Sung
  • Publication number: 20030207767
    Abstract: The present invention utilizes magnesium diboride (MgB2) or (Mg1−xMx)B2 as a superconductivity thin film which can be applied to a rapid single flux quantum (RSFQ) circuit. A method for manufacturing a superconductor incorporating therein a superconductivity thin film, begins with preparing a single crystal substrate. Thereafter, a template film is formed on top of the substrate, wherein the template has a hexagonal crystal structure. The superconductivity thin film of MgB2 or (Mg1−xMx)B2 is formed on top of the template film. If Mg amount in the superconductivity thin film is insufficient, Mg vapor is flowed on the surface of the superconductivity thin film while a post annealing process is carried out at the temperature ranging from 400° C. to 900° C.
    Type: Application
    Filed: June 5, 2003
    Publication date: November 6, 2003
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE.
    Inventors: Jun Ho Kim, Sang Hyeob Kim, Gun Yong Sung
  • Patent number: 6626995
    Abstract: The present invention utilizes magnesium diboride (MgB2) or (Mg1−xMx)B2 as a superconductivity thin film which can be applied to a rapid single flux quantum (RSFQ) circuit. A method for manufacturing a superconductor incorporating therein a superconductivity thin film, begins with preparing a single crystal substrate. Thereafter, a template film is formed on top of the substrate, wherein the template has a hexagonal crystal structure. The superconductivity thin film of MgB2 or (Mg1−xMx)B2 is formed on top of the template film. If Mg amount in the superconductivity thin film is insufficient, Mg vapor is flowed on the surface of the superconductivity thin film while a post annealing process is carried out at the temperature ranging from 400° C. to 900° C.
    Type: Grant
    Filed: November 28, 2001
    Date of Patent: September 30, 2003
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jun Ho Kim, Sang Hyeob Kim, Gun Yong Sung
  • Publication number: 20020189533
    Abstract: The present invention utilizes magnesium diboride (MgB2) or (Mg1−xMx)B2 as a superconductivity thin film which can be applied to a rapid single flux quantum (RSFQ) circuit. A method for manufacturing a superconductor incorporating therein a superconductivity thin film, begins with preparing a single crystal substrate. Thereafter, a template film is formed on top of the substrate, wherein the template has a hexagonal crystal structure. The superconductivity thin film of MgB2 or (Mg1−xMx)B2 is formed on top of the template film. If Mg amount in the superconductivity thin film is insufficient, Mg vapor is flowed on the surface of the superconductivity thin film while a post annealing process is carried out at the temperature ranging from 400° C. to 900° C.
    Type: Application
    Filed: November 28, 2001
    Publication date: December 19, 2002
    Inventors: Jun Ho Kim, Sang Hyeob Kim, Gun Yong Sung
  • Patent number: 6423473
    Abstract: A method for fabricating a high temperature superconducting step-edge Josephson junction includes the steps of: (i) preparing a step-edge on an SrTiO3 (STO) substrate; (ii) depositing a YBa2Cu3O7−x (YBCO) thin film on the step-edge substrate obtained; and (iii) forming a micro-bridge pattern on the, deposited metal thin film by photolithography and ion milling and then performing a heat treatment. This makes it possible to fabricate a step edge having a linear portion inclined at a large angle with good reproducibility during the ion-milling step. Furthermore, the two-stepped process of post heat treatment is carried out after the metal electrode of the junction is formed so that the high temperature superconducting step-edge junction can have its own characteristics enhanced.
    Type: Grant
    Filed: September 3, 1999
    Date of Patent: July 23, 2002
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Gun Yong Sung, Jun Sik Hwang, Kwang Yong Kang
  • Publication number: 20020074544
    Abstract: The invention relates generally to high-temperature superconducting Josephson junction devices necessary in implementing an advanced a single flux quantum circuit for a digital electronic device using superconductors. More particularly, the invention relates to ramp-edge Josephson junction devices and methods for fabricating the same, using copper-series oxide super-conducting thin films. According to the present invention, the ramp-edge Josephson junction device comprises a substrate, a first electrode layer having a ramp-edge and a first insulating layer formed on the substrate sequentially, a transformation layer formed at the ramp-edge of the first electrode layer by illumination of excimer laser and by annealing process, and a second electrode layer and a second electrode layer and a second insulating layer formed on the first electrode layer including the transformation layer and the first insulating layer sequentially.
    Type: Application
    Filed: December 19, 2000
    Publication date: June 20, 2002
    Inventors: Gun Yong Sung, Chi Hong Choi, Kwang Yong Kang
  • Patent number: 6004907
    Abstract: The present invention forms a superconducting junction using a cubic YBa.sub.2 Cu.sub.3 Ox thin film as a barrier layer. The present invention forms a first YBCO superconducting thin film, a SrTiO.sub.3 insulating layer thin film on the substrate, etches a side of them in the form of inclination, subsequently integrates a non-superconducting cubic YBCO barrier thin film, a second YBCO superconducting thin film, a SrTiO.sub.3 protecting layer thin film in series on the whole surface of the substrate, etches an opposite side of the etched part of the SrTiO.sub.3 insulating layer thin film in the form of inclination, fabricates a superconducting junction by forming a metal electrode to said aperture after forming apertures which expose said first YBCO superconducting thin film, the second YBCO superconducting thin film, fabricates a superconducting junction upon forming the metallic electrode to the apertures, and deposits a cubic YBa.sub.2 Cu.sub.3 Ox barrier thin film at a temperature of 600-650.degree. C.
    Type: Grant
    Filed: July 21, 1998
    Date of Patent: December 21, 1999
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jeong Dae Suh, Gun Yong Sung
  • Patent number: 5851843
    Abstract: A method of manufacturing super conduction field effect transistor having a bi-crystal boundary junction is disclosed. According to the present invention, it is constituted such that on a SrTiO.sub.3 bi-crystal substrate, a bi-crystal super conductive thin films for source and drain electrode having a compound of YBa.sub.2 Cu.sub.3 O.sub.7-x, a non-super conductive oxide layer having a compound of PrBa.sub.2 Cu.sub.3 O.sub.7-x interposed between the bi-crystal super conductive thin films for source and drain electrode and the SrTiO.sub.3 bi-crystal substrate, a boundary channel interposed therebetween, a amorphous insulating layer for gate electrode having a compound of SrTiO.sub.
    Type: Grant
    Filed: October 16, 1997
    Date of Patent: December 22, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jeong Dae Suh, Gun Yong Sung
  • Patent number: 5846846
    Abstract: Disclosed is a method for making a superconducting field-effect device with a grain boundary channel, the method comprising the steps of depositing a first superconducting thin film on a substrate; patterning the first superconducting thin film to form a patterned superconducting thin film having an opening; depositing a template layer thereon; selectively etching back the template layer to form a patterned template layer; growing a second superconducting thin film to form a grain boundary therebetween; depositing an insulating layer on the second superconducting thin film to protect the second superconducting thin film from degrading in property in the air; selectively etching back the insulating layer to form a patterned insulating layer; forming a gate insulating layer on the patterned insulating layer; and coating metal electrodes thereon, source/drain being formed respectively on the etched portions, and a gate electrode being formed on the deposited portion of the gate insulating layer directly above th
    Type: Grant
    Filed: November 20, 1995
    Date of Patent: December 8, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jeong-Dae Suh, Gun-Yong Sung
  • Patent number: 5820682
    Abstract: A laser deposition apparatus for a large area oxide thin film which can enable thin films of a large area to be deposited by varying a target affixing method when performing a pulse laser deposition which most effectively deposits various oxide thin films of a complex chemical composition. The apparatus in accordance with the present invention comprises a tilted target affixed to a rotatable target plate by a target frame such that the target is tilted with respect to the target plate; a substrate heater on which the substrate can be mounted and which can be rotated on its own axis; and an eximer laser installed within a vacuum chamber for irradiating a laser beam to said tilted target.
    Type: Grant
    Filed: November 7, 1997
    Date of Patent: October 13, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Gun Yong Sung, Jeong Dae Suh
  • Patent number: 5801393
    Abstract: A superconductor-insulator-superconductor Josephson tunnel junction, comprising: a single crystalline substrate having a perovskite crystal structure; a template layer formed of a b-axis oriented PBCO thin film on the substrate; and a trilayer structure consisting of a lower electrode, a barrier layer and an upper electrode, which serve as a superconductor, an insulator and a superconductor, respectively, the lower electrode and the upper electrode each being formed of an a-axis oriented YBCO superconducting thin film and having an oblique junction edge at an angle of 30.degree. to 70.degree., the barrier layer being formed of an insulating thin film between the two superconducting electrodes, can be operated at a low power with an exceptional speed in calculation and data processing.
    Type: Grant
    Filed: April 24, 1997
    Date of Patent: September 1, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Gun-Yong Sung, Jeong-Dae Suh