Abstract: One greatest advantage of the three-dimensional memory (3D-M) is its integratibility. In a electrically programmable three-dimensional integrated memory (EP-3DiM), an electrically programmable 3D-M (EP-3DM) is integrated with an embedded RWM and/or an embedded processor. Collectively, the EP-3DiM excels in speed, density/cost, programmability and data security.

Abstract: The present invention discloses a smart hardisk drive (sHDD). It can store data for and directly (i.e. without using a computer as an intermediary) communicate with at least two types of multimedia devices. A single sHDD can accommodate almost all on-the-go multimedia storage needs. With a large capacity, small size and reasonable price, the sHDD will become a universal multimedia storage platform.

Abstract: The electrically programmable three-dimensional memory (EP-3DM) can be used to carry the test data and/or test-data seeds for the circuit-under-test (CUT). When integrated with the CUT, EP-3DM has minimum impact to the layout of the CUT. Apparently, CUT with integrated EP-3DM supports IC self-test. Moreover, with a large bandwidth with the CUT, EP-3DM-based IC self-test enables at-speed test.

Abstract: The electrically programmable three-dimensional memory (EP-3DM) can be used to carry the test data and/or test-data seeds for the circuit-under-test (CUT). When integrated with the CUT, EP-3DM has minimum impact to the layout of the CUT. Apparently, CUT with integrated EP-3DM supports IC self-test. Moreover, with a large bandwidth with the CUT, EP-3DM-based IC self-test enables at-speed test.

Abstract: The three-dimensional memory (3D-M) can be used to carry the test data and/or test-data seeds for the circuit-under-test (CUT). When integrated with the CUT, 3D-M has minimum impact to the layout of the CUT. The CUT with integrated 3D-M supports IC self-test. Moreover, with a large bandwidth with the CUT, 3DM-based IC self-test enables at-speed test.

Abstract: The present invention discloses an nF-opening-based mask-programmable read-only memory. Because its openings can be nx (n>1) wider than its address-selection lines, this memory can use less expensive opening mask. Other mask-programmable 3-D memory (3D-M) structures are also disclosed. The present invention makes further improvements to the 3D-M's peripheral circuits. Full-read mode and self-timing can be used to improve the speed and reduce the power consumption.

Abstract: The present invention provides a smart hard-disk drive (sHDD). It can act as a host and directly communicate with multimedia devices. The sHDD offers true portability and provides a universal multimedia exchange platform (i.e. communicating directly with digital camera, mp3 player, camcorder, movie-playing device, etc.) The HDD integration breaks the traditional design barrier by integrating at least a portion of the HDD electronics onto the system motherboard.

Abstract: One greatest advantage of the three-dimensional memory (3D-M) is its integratibility. In a three-dimensional integrated memory (3DiM), the 3D-M is integrated with an embedded RWM and/or an embedded processor. Collectively, the 3DiM excels in speed, density/cost, programmability and data security. The present invention makes further improvements to three-dimensional mask-programmable read-only memory. Another 3D-M application of great importance is in the area of IC-testing. The 3D-M carrying test vectors can be integrated with the circuit-under-test, thus supporting field self-test and at-speed test.

Abstract: The present invention makes improvements to the peripheral circuits of the electrically programmable three-dimensional memory (EP-3DM). Full-read mode and self-timing are used to improve the speed and lower the power consumption. Cached EP-3DM is disclosed to reduce the latency. Redundancy can be employed to improve the yield of the EP-3DM.

Abstract: One greatest advantage of the three-dimensional memory (3D-M) is its integratibility. In a electrically programmable three-dimensional integrated memory (EP-3DiM), an electrically programmable 3D-M (EP-3DM) is integrated with an embedded RWM and/or an embedded processor. Collectively, the EP-3DiM excels in speed, density/cost, programmability and data security.

Abstract: The electrically programmable three-dimensional memory (EP-3DM) can be used to carry the test data and/or test-data seeds for the circuit-under-test (CUT). When integrated with the CUT, EP-3DM has minimum impact to the layout of the CUT. Apparently, CUT with integrated EP-3DM supports IC self-test. Moreover, with a large bandwidth with the CUT, EP-3DM-based IC self-test enables at-speed test.

Abstract: The present invention relates to a high performance, high reliability antifuse using conductive electrodes. According to first and second embodiments, the problem of switch-off in conductor-to-conductor antifuses is solved by utilizing conductive electrode materials having a relatively lower thermal conductivity than prior art electrode materials and by utilizing relatively thin electrodes, thus increasing their thermal resistance. According to a third embodiment, a relatively thin barrier layer is placed between one or both of the low thermal conductivity electrodes and the antifuse material to prevent reaction between the conductive electrodes and the antifuse material, or the materials used in manufacturing. According to a fourth embodiment, low thermal conductivity conductors are used for both electrodes in the conductor-to-conductor antifuse to achieve enhanced reliability and freedom from switch-off.

Abstract: One greatest advantage of the three-dimensional memory (3D-M) is its integratibility. In a three-dimensional integrated memory (3DiM), the 3D-M is integrated with an embedded RWM and/or an embedded processor. Collectively, the 3DiM excels in speed, density/cost, programmability and data security. The present invention makes further improvements to three-dimensional mask-programmable read-only memory. Another 3D-M application of great importance is in the area of IC-testing. The 3D-M carrying test vectors can be integrated with the circuit-under-test, thus supporting field self-test and at-speed test.

Abstract: The low-cost lithography disclosed in the present invention is based on two approaches: 1. Use a low-precision nF-opening mask to implement high-precision opening-related patterns (e.g. inter-level connections and segmented-lines); 2. Improve the mask re-usability with programmable litho-system and/or logic litho-system. Pattern distribution enables the mask-repair through redundancy. It further enables highly-corrected masks, which provide higher-order correction to clear patterns on wafer.

Abstract: An antifuse structure of the present invention comprises an antifase layer and a bottom electrode which are immune to the damages caused by harmful processing environment. The three major components of the antifuse—the bottom electrode, the antifuse layer and the top buffer layer are formed consecutively in a friendly manufacturing environment. This antifuse structure can substantially improve the antifuse manufacturability.

Abstract: An antifuse structure of the present invention comprises an antifuse layer and a bottom electrode which are immune to the damages caused by harmful processing environment. The three major components of the antifuse—the bottom electrode, the antifuse layer and the top buffer layer—are formed consecutively without any photolithography or etching step in-between. The top buffer layer is defined before the bottom electrode. This antifuse structure can substantially improve the antifuse manufacturability.

Abstract: The present invention relates to a high performance, high reliability antifuse using conductive electrodes. The problem of switch-off of the programmed antifuses is solved by reducing the thermal conductivity of the conductive electrodes. This is achieved by using lower thermal conductivity conductors for the electrodes or by using thinner electrodes to increase thermal resistance. According to a first aspect of the present invention, the problem of switch-off in conductor-to-conductor antifuses is solved by utilizing conductive electrode materials having a relatively lower thermal conductivity than prior art electrode materials. According to a second aspect of the present invention, the problem of switch-off in conductor-to-conductor antifuses is solved by utilizing relatively thin electrodes, thus increasing their thermal resistance.

Abstract: It is beneficial for an FPGA, PROM, DRAM and superconductive circuit to use a protective ceramic as its insulating material. This protective ceramic can densely cover metal surface and is free of defects. As a result, a high yield can be ensured. The Pilling-Bedworth ratio is a good indicator of the protective nature of an insulating material. It is desirable to limit the Pilling-Bedworth ratio larger than 1 and preferably smaller than 2. Multiple layers of ceramics can be used to further reduce the defect density and improve yield.

Abstract: A read-only memory structure, having a three dimensional arrangement of memory elements, is disclosed. The memory elements are partitioned into multiple memory levels. Each memory level is stacked on top of another. Within each memory level, there are a plurarity of memory elements and address select lines. The memory elements can be either mask programmable or electrical programmable.

Abstract: An antifuse structure of the present invention comprises an antifuse layer and a bottom electrode which are immune to the damages caused by harmful processing environment. The three major components of the antifuse--the bottom electrode, the antifuse layer and the top buffer layer--are formed consecutively without any photolithography or etching step in-between. The top buffer layer is defined before the bottom electrode. This antifuse structure can substantially improve the antifuse manufacturability.