Abstract: A method, computer program product and system for protecting content includes a mobile device screen including a plurality of pixels, whereby each of the plurality of pixels have first sub-pixel units that include a first viewing angle and second sub-pixel units that include a second viewing angle. Within each of the plurality of pixels, the first sub-pixel units are adjacent to the second sub-pixel units. A processing unit is coupled to the mobile device screen and determines a portion of the mobile device screen that displays sensitive content. The processing unit obscures the sensitive content displayed on the portion of the mobile device screen by deactivating the first sub-pixel units at the portion of the mobile device screen that displays the sensitive content and activates the second sub-pixel units at the portion of the mobile device screen that displays the sensitive content.

Abstract: A method of protecting content displayed on a mobile device screen is provided. The mobile device screen may receive both sensitive and non-sensitive content. An image of one or more authorized users viewing the mobile device screen is detected, whereby, based on the detected image of the one or more authorized users, the received content is generated on the mobile device screen using a plurality of pixels. The plurality of pixels have both first sub-pixel units that include a first viewing angle and second sub-pixel units that include a second viewing angle. The first sub-pixel units generate an image of the non-sensitive content on the mobile device screen at the first viewing angle and the second sub-pixel units generate an image of the sensitive content at the second viewing angle, such that, the second viewing angle is smaller relative to the first viewing angle for obscuring the sensitive content.

Abstract: A system for protecting content includes a mobile device screen including a plurality of pixels, whereby each of the plurality of pixels have first sub-pixel units that include a first viewing angle and second sub-pixel units that include a second viewing angle. Within each of the plurality of pixels, the first sub-pixel units are adjacent to the second sub-pixel units. A processing unit is coupled to the mobile device screen and determines a portion of the mobile device screen that displays sensitive content. The processing unit obscures the sensitive content displayed on the portion of the mobile device screen by deactivating the first sub-pixel units at the portion of the mobile device screen that displays the sensitive content and activates the second sub-pixel units at the portion of the mobile device screen that displays the sensitive content.

Abstract: Fin mask structures are formed over a semiconductor material portion on a crystalline insulator layer. A disposable gate structure and a gate spacer are formed over the fin mask structures. Employing the disposable gate structure and the gate spacer as an etch mask, physically exposed portions of the fin mask structures and the semiconductor material portion are removed by an etch. A source region and a drain region are formed by selective epitaxy of a semiconductor material from physically exposed surfaces of the crystalline insulator layer. The disposable gate structure is removed selective to the source region and the drain region. Semiconductor fins are formed by anisotropically etching portions of the semiconductor material portion, employing the gate spacer and the fin mask structures as etch masks. A gate dielectric and a gate electrode are formed within the gate cavity.

Abstract: A method for fabricating a III-V nanowire. The method may include providing a semiconductor substrate, which includes an insulator, with a wide-bandgap layer on the top surface of the semiconductor substrate; etching the insulator to suspend the wide-bandgap layer; growing a compositionally-graded channel shell over the wide-bandgap layer; forming a gate structure forming spacers on the sidewalls of the gate structure; and forming a doped raised source drain region adjacent to the spacers.

Abstract: A device that includes: a substrate layer; a first set of source/drain component(s) defining an nFET (n-type field-effect transistor) region; a second set of source/drain component(s) defining a pFET (p-type field-effect transistor) region; a first suspended nanowire, at least partially suspended over the substrate layer in the nFET region and made from III-V material; and a second suspended nanowire, at least partially suspended over the substrate layer in the pFET region and made from Germanium-containing material. In some embodiments, the first suspended nanowire and the second suspended nanowire are fabricated by adding appropriate nanowire layers on top of a Germanium-containing release layer, and then removing the Germanium-containing release layers so that the nanowires are suspended.

Abstract: Silicided nanowires as nanobridges in Josephson junctions. A superconducting silicided nanowire is used as a weak-link bridge in a Josephson junction, and a fabrication process is employed to produce silicided nanowires that includes patterning two junction banks and a rough nanowire from a silicon substrate, reshaping the nanowire through hydrogen annealing, and siliciding the nanowire by introduction of a metal into the nanowire structure.

Abstract: Techniques for reducing nanowire dimension and pitch are provided. In one aspect, a pitch multiplication method for nanowires includes the steps of: providing an SOI wafer having an SOI layer separated from a substrate by a BOX, wherein the SOI layer includes Si; patterning at least one nanowire in the SOI layer, wherein the at least one nanowire as-patterned has a square cross-sectional shape with flat sides; growing epitaxial SiGe on the outside of the at least one nanowire using an epitaxial process selective for growth of the epitaxial SiGe on the flat sides of the at least one nanowire; removing the at least one nanowire selective to the epitaxial SiGe, wherein the epitaxial SiGe that remains includes multiple epitaxial SiGe wires having been formed in place of the at least one nanowire that has been removed.

Abstract: A system for protecting content includes a mobile device screen including a plurality of pixels, whereby each of the plurality of pixels have first sub-pixel units that include a first viewing angle and second sub-pixel units that include a second viewing angle. Within each of the plurality of pixels, the first sub-pixel units are adjacent to the second sub-pixel units. A processing unit is coupled to the mobile device screen and determines a portion of the mobile device screen that displays sensitive content. The processing unit obscures the sensitive content displayed on the portion of the mobile device screen by deactivating the first sub-pixel units at the portion of the mobile device screen that displays the sensitive content and activates the second sub-pixel units at the portion of the mobile device screen that displays the sensitive content.

Abstract: Semiconductor structures including parallel graphene nanoribbons or carbon nanotubes oriented along crystallographic directions are provided from a template of silicon carbide (SiC) fins or nanowires. The SiC fins or nanowires are first provided and then graphene nanoribbons or carbon nanotubes are formed on the exposed surfaces of the fin or the nanowires by annealing. In embodiments in which closed carbon nanotubes are formed, the nanowires are suspended prior to annealing. The location, orientation and chirality of the graphene nanoribbons and the carbon nanotubes that are provided are determined by the corresponding silicon carbide fins and nanowires from which they are formed.

Abstract: A method includes steps of: receiving a first energy and a second energy emitted from within close proximity to a computer; powering a portable unit using the first energy; determining a position and status of the portable unit using the second energy; and transmitting a user identifier from the portable unit to the computer for verification.

Abstract: A system for protecting content includes a mobile device screen including a plurality of pixels, whereby each of the plurality of pixels have first sub-pixel units that include a first viewing angle and second sub-pixel units that include a second viewing angle. Within each of the plurality of pixels, the first sub-pixel units are adjacent to the second sub-pixel units. A processing unit is coupled to the mobile device screen and determines a portion of the mobile device screen that displays sensitive content. The processing unit obscures the sensitive content displayed on the portion of the mobile device screen by deactivating the first sub-pixel units at the portion of the mobile device screen that displays the sensitive content and activates the second sub-pixel units at the portion of the mobile device screen that displays the sensitive content.

Abstract: Techniques for device isolation for III-V semiconductor substrates are provided. In one aspect, a method of fabricating a III-V semiconductor device is provided. The method includes the steps of: providing a substrate having an indium phosphide (InP)-ready layer; forming an iron (Fe)-doped InP layer on the InP-ready layer; forming an epitaxial III-V semiconductor material layer on the Fe-doped InP layer; and patterning the epitaxial III-V semiconductor material layer to form one or more active areas of the device. A III-V semiconductor device is also provided.

Abstract: A device that includes: a substrate layer; a first set of source/drain component(s) defining an nFET (n-type field-effect transistor) region; a second set of source/drain component(s) defining a pFET (p-type field-effect transistor) region; a first suspended nanowire, at least partially suspended over the substrate layer in the nFET region and made from III-V material; and a second suspended nanowire, at least partially suspended over the substrate layer in the pFET region and made from Germanium-containing material. In some embodiments, the first suspended nanowire and the second suspended nanowire are fabricated by adding appropriate nanowire layers on top of a Germanium-containing release layer, and then removing the Germanium-containing release layers so that the nanowires are suspended.

Abstract: A method for fabricating a III-V nanowire. The method may include providing a semiconductor substrate, which includes an insulator, with a wide-bandgap layer on the top surface of the semiconductor substrate; etching the insulator to suspend the wide-bandgap layer; growing a compositionally-graded channel shell over the wide-bandgap layer; forming a gate structure forming spacers on the sidewalls of the gate structure; and forming a doped raised source drain region adjacent to the spacers.

Abstract: A semiconductor structure and formation thereof. The semiconductor structure has a first semiconductor layer with a first lattice structure and a second epitaxial semiconductor layer that is lattice-matched with the first semiconductor layer. At least two source/drain regions, which have a second lattice structure, penetrate the second semiconductor layer and contact the first semiconductor layer. A portion of the second semiconductor layer is between the source/drain regions and has a degree of uniaxial strain that is based, at least in part, on a difference between the first lattice structure and the second lattice structure.

Abstract: Techniques for reducing nanowire dimension and pitch are provided. In one aspect, a pitch multiplication method for nanowires includes the steps of: providing an SOI wafer having an SOI layer separated from a substrate by a BOX, wherein the SOI layer includes Si; patterning at least one nanowire in the SOI layer, wherein the at least one nanowire as-patterned has a square cross-sectional shape with flat sides; growing epitaxial SiGe on the outside of the at least one nanowire using an epitaxial process selective for growth of the epitaxial SiGe on the flat sides of the at least one nanowire; removing the at least one nanowire selective to the epitaxial SiGe, wherein the epitaxial SiGe that remains includes multiple epitaxial SiGe wires having been formed in place of the at least one nanowire that has been removed.

Abstract: A semiconductor device comprising a suspended semiconductor nanowire inner gate and outer gate. A first epitaxial dielectric layer surrounds a nanowire inner gate. The first epitaxial dielectric layer is surrounded by an epitaxial semiconductor channel. The epitaxial semiconductor channel surrounds a second dielectric layer. A gate conductor surrounds the second dielectric layer. The gate conductor is patterned into a gate line and defines a channel region overlapping the gate line. The semiconductor device contains source and drain regions adjacent to the gate line.

Abstract: A semiconductor device comprising a suspended semiconductor nanowire inner gate and outer gate. A first epitaxial dielectric layer surrounds a nanowire inner gate. The first epitaxial dielectric layer is surrounded by an epitaxial semiconductor channel. The epitaxial semiconductor channel surrounds a second dielectric layer. A gate conductor surrounds the second dielectric layer. The gate conductor is patterned into a gate line and defines a channel region overlapping the gate line. The semiconductor device contains source and drain regions adjacent to the gate line.

Abstract: A semiconductor structure can be created by forming an insulator layer over a surface of a substrate. An intermediate layer can be formed on top of the insulator layer, wherein openings in the intermediate layer may expose regions of the insulator. Openings may be formed in the exposed regions of the insulator layer to create exposed areas of the substrate. A first element of a multi-element semiconductor can be deposited onto the exposed regions of the insulator layer, into the openings in the exposed regions of the insulator layer, and onto the exposed areas of the substrate. A capping layer can be formed over the first element of the multi-element semiconductor. The first element can be melted. A liquid solution can be created by dissolving a second element of the multi-element semiconductor into first element. A multi-element semiconductor, seeded off the substrate, can be formed from the liquid solution.