Patents by Inventor Gyu-hwan An
Gyu-hwan An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12246880Abstract: The present invention provides a receptacle molding apparatus, a receptacle and a receptacle molding method. The receptacle molding apparatus, which is for molding a receptacle by means of heat molding, comprises: a first mold portion comprising a body molding part, which is for molding a body of a receptacle, a skirt molding part, which extends upward from the body molding part so as to mold a skirt of the receptacle, and a flange molding part which extends in the direction from the upper end of the skirt molding part toward the outside so as to mold the lower surface of a flange of the receptacle; and a second mold portion which is provided above the first mold portion, can move vertically and enable pressure-molding of the upper surface of the flange, and has a pressing surface for pressing a sheet which is to be molded into the flange from above at a position corresponding to the flange molding part.Type: GrantFiled: September 21, 2018Date of Patent: March 11, 2025Assignee: CJ CHEILJEDANG CORPORATIONInventors: Byung Kook Lee, Kwang Soo Park, Hui Jae Song, Gyu Hwan Cha
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Publication number: 20250081445Abstract: A semiconductor memory device includes a bit line extending in a first direction on a substrate, an active pattern on the bit line, a word line on a first sidewall of the active pattern and extending in a second direction, a back gate electrode on a second sidewall of the active pattern and extending in the second direction, a gate isolation pattern on the first sidewall of the active pattern and including a low-k pattern extending in the second direction, and a data storage pattern connected to the second surface of the active pattern. The word line is between the active pattern and the gate isolation pattern, and a vertical distance between the bit line and the word line is greater than a vertical distance between the bit line and the low-k pattern.Type: ApplicationFiled: May 10, 2024Publication date: March 6, 2025Inventors: Bo Won Yoo, Seok Han Park, Keun Ui Kim, Yu Jin Kim, Joong Chan Shin, Gyu Hwan Oh, Eun Suk Jang, Jin Woo Han
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Patent number: 12239281Abstract: A cleaning apparatus including a vacuum cleaner and a docking station is provided. The cleaning apparatus includes a vacuum cleaner including a dust collecting chamber in which foreign substances are collected, and a docking station configured to be connected to the dust collecting chamber to remove the foreign substances collected in the dust collecting chamber. The dust collecting chamber is configured to collect foreign substances through centrifugation, and configured to be docked to the docking station, and the docking station includes a suction device configured to suction the foreign substances and air in the dust collecting chamber docked to the docking station.Type: GrantFiled: August 9, 2023Date of Patent: March 4, 2025Assignee: Samsung Electronics Co., Ltd.Inventors: See Hyun Kim, In Gyu Choi, Ki Hwan Kwon, Shin Kim, Hyeon Cheol Kim, Do Kyung Lee, Hyun Ju Lee, Yun Soo Jang, Seung Ryong Cha, Jung Gyun Han
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Patent number: 12237210Abstract: A semiconductor device includes a substrate, a first fin, and a second fin. The first and second fins are spaced apart from each other in a first direction on the substrate and extend in a second direction intersecting the first direction. The semiconductor device further includes a first shallow trench formed between the first and second fins, and a field insulating film which fills at least a part of the first shallow trench. The field insulating film includes a first portion, a second portion adjacent to the first portion, and a third portion adjacent to the second portion and adjacent to a side wall of the first shallow trench. The first portion includes a central portion of an upper surface of the field insulating film in the first direction. The upper surface of the field insulating film is in a shape of a brace recessed toward the substrate.Type: GrantFiled: May 9, 2022Date of Patent: February 25, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Chae Ho Na, Sung Soo Kim, Gyu Hwan Ahn, Dong Hyun Roh
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Patent number: 12228567Abstract: Disclosed are a colorimetric sensor kit for screening a therapeutic agent for a neurodegenerative disease, capable of easily detecting the degradation of amyloids by a drug, and a method for screening a therapeutic agent for a neurodegenerative disease.Type: GrantFiled: November 1, 2019Date of Patent: February 18, 2025Assignee: Korea University Research and Business FoundationInventors: Dae Sung Yoon, Dong Tak Lee, In Su Kim, Gyu Do Lee, Hyo Gi Jung, Yong Hwan Kim
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Publication number: 20250043060Abstract: A multifunctional biobased waterborne polyurethane composition includes, based on 100 parts by weight of the polyurethane composition, 40 to 50 parts by weight of a polyol, 34 to 42 parts by weight of an isocyanate, 8 to 14 parts by weight of a chain extender, 0.03 to 0.12 parts by weight of a catalyst, and 0.005 to 0.02 parts by weight of a neutralizing agent.Type: ApplicationFiled: May 28, 2024Publication date: February 6, 2025Applicant: KYUNGPOOK NATIONAL UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Jaehyeung PARK, Bo Min KIM, Hye Ji PARK, Gyu Hwan KIM, Sun Jin JANG, Jae Hyeon PARK
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Publication number: 20240014209Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.Type: ApplicationFiled: September 25, 2023Publication date: January 11, 2024Inventors: Gyu-Hwan Ahn, Sung-Soo Kim, Chae-Ho Na, Dong-Hyun Roh, Sang-Jin Hyun
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Patent number: 11804483Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.Type: GrantFiled: February 17, 2021Date of Patent: October 31, 2023Inventors: Gyu-Hwan Ahn, Sung-Soo Kim, Chae-Ho Na, Dong-Hyun Roh, Sang-Jin Hyun
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Publication number: 20230155159Abstract: A lamination apparatus configured to manufacture an electrode cell assembly may include a lamination part configured to manufacture the electrode cell assembly through lamination, an inspection part configured to detect a defective electrode cell assembly by measuring a thickness of the manufactured electrode cell assembly, a discharge part configured to separate and discharge the defective electrode cell assembly from a normal electrode cell assembly, and a control part configured to perform control so as to calculate a time point at which the defective electrode cell assembly reaches the discharge part on the basis of distance data between a point at which the defective electrode cell assembly is detected and the discharge part and separate and discharge the defective electrode cell assembly when the defective electrode cell assembly reaches the discharge part. A method of discharging a defective electrode cell assembly by the lamination apparatus is also disclosed.Type: ApplicationFiled: January 28, 2022Publication date: May 18, 2023Applicant: LG Energy Solution, Ltd.Inventors: Hyun Jae Park, Ha Yong Jung, Jong Myung Lee, Gyu Hwan Choe, Kyu Sang Lee
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Patent number: 11600518Abstract: A semiconductor device includes a substrate having first fin and a second fin spaced apart and extending lengthwise in parallel. A fin remnant is disposed between the first fin and the second fin, extends lengthwise in parallel with the first and second fins, and has a height lower than a height of each of the first fin and the second fin. A first field insulation layer is disposed between a sidewall of the first fin and a first sidewall of the fin remnant and a second field insulating layer is disposed on a sidewall of the second fin. A blocking liner conforms to a sidewall and a bottom surface of a trench bounded by a second sidewall of the fin remnant and a sidewall of the second field insulating layer. A trench insulation layer is disposed on the blocking liner in the trench.Type: GrantFiled: May 5, 2021Date of Patent: March 7, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung Soo Kim, Chae Ho Na, Gyu Hwan Ahn, Dong Hyun Roh, Sang Jin Hyun
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Publication number: 20220386607Abstract: The present invention relates to a novel nicotinamide compound, a method for preparing the same, and a herbicide comprising the compound. The compound of the present invention is useful as a herbicide for foliar treatment or soil treatment because it has high safety for wheat or corn and has excellent herbicidal activity against grassy weeds, sedge weeds or broadleaf weeds.Type: ApplicationFiled: October 21, 2020Publication date: December 8, 2022Inventors: Young Kwan KO, Eun Ae KIM, Ill Young LEE, Hee Nam LIM, Jung Sub CHOI, Jee Hee SUH, Nack Jeong KIM, Dong Wan KOO, Hyun Jin KIM, Gyu Hwan YON, Jae Deok KIM, Seungae OH, So-Young LEE, Chan Yong PARK, Yun Kyoung HWANG, Byung Hoon AHN, Ah Reum KIM, Hye Ji HAN, Sungjun PARK, Junhyuk CHOI, Jisoo LIM, Mi Sook HONG
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Publication number: 20220262673Abstract: A semiconductor device includes a substrate, a first fin, and a second fin. The first and second fins are spaced apart from each other in a first direction on the substrate and extend in a second direction intersecting the first direction. The semiconductor device further includes a first shallow trench formed between the first and second fins, and a field insulating film which fills at least a part of the first shallow trench. The field insulating film includes a first portion, a second portion adjacent to the first portion, and a third portion adjacent to the second portion and adjacent to a side wall of the first shallow trench. The first portion includes a central portion of an upper surface of the field insulating film in the first direction. The upper surface of the field insulating film is in a shape of a brace recessed toward the substrate.Type: ApplicationFiled: May 9, 2022Publication date: August 18, 2022Inventors: Chae Ho NA, Sung Soo KIM, Gyu Hwan AHN, Dong Hyun ROH
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Patent number: 11328949Abstract: A semiconductor device includes a substrate, a first fin, and a second fin. The first and second fins are spaced apart from each other in a first direction on the substrate and extend in a second direction intersecting the first direction. The semiconductor device further includes a first shallow trench formed between the first and second fins, and a field insulating film which fills at least a part of the first shallow trench. The field insulating film includes a first portion, a second portion adjacent to the first portion, and a third portion adjacent to the second portion and adjacent to a side wall of the first shallow trench. The first portion includes a central portion of an upper surface of the field insulating film in the first direction. The upper surface of the field insulating film is in a shape of a brace recessed toward the substrate.Type: GrantFiled: March 26, 2020Date of Patent: May 10, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Chae Ho Na, Sung Soo Kim, Gyu Hwan Ahn, Dong Hyun Roh
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Patent number: 11247823Abstract: One or more embodiments of the present disclosure relate to a pouch for packaging fermented foods, a method of packaging fermented foods using the same, and a pouch for packaging.Type: GrantFiled: December 17, 2018Date of Patent: February 15, 2022Assignee: CJ CHEILJEDANG CORPORATIONInventors: Dong Rag Son, Kyoung Sik Cho, Yoon Seung Nam, Kwang Soo Park, Hui Jae Song, Gyu Hwan Cha
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Publication number: 20210257250Abstract: A semiconductor device includes a substrate having first fin and a second fin spaced apart and extending lengthwise in parallel. A fin remnant is disposed between the first fin and the second fin, extends lengthwise in parallel with the first and second fins, and has a height lower than a height of each of the first fin and the second fin. A first field insulation layer is disposed between a sidewall of the first fin and a first sidewall of the fin remnant and a second field insulating layer is disposed on a sidewall of the second fin. A blocking liner conforms to a sidewall and a bottom surface of a trench bounded by a second sidewall of the fin remnant and a sidewall of the second field insulating layer. A trench insulation layer is disposed on the blocking liner in the trench.Type: ApplicationFiled: May 5, 2021Publication date: August 19, 2021Inventors: Sung Soo KIM, Chae Ho NA, Gyu Hwan AHN, Dong Hyun ROH, Sang Jin HYUN
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Patent number: 11083315Abstract: The present application relates to a disposable foldable eating utensil comprising: a body; a handle extending from the distal end of the body; and a bendable part formed between the body and the handle to be thinner than the other parts so as to allow the handle to be folded and unfolded, wherein the body comprises a protrusion protruding downward from the bottom surface of the distal end thereof, the protrusion comprises an engaging ledge protruding outward from the periphery thereof, and the handle comprises an extension piece extending at a predetermined thickness from the tip end thereof and having a through-hole passing through the upper surface and the bottom surface thereof.Type: GrantFiled: December 26, 2017Date of Patent: August 10, 2021Assignee: CJ CHEILJEDANG CORPORATIONInventors: Kwang Soo Park, Ki Pyo Kim, Ki Min Rhyu, Kyoung Sik Cho, Gyu Hwan Cha
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Publication number: 20210198007Abstract: The present invention provides a receptacle molding apparatus, a receptacle and a receptacle molding method. The receptacle molding apparatus, which is for molding a receptacle by means of heat molding, comprises: a first mold portion comprising a body molding part, which is for molding a body of a receptacle, a skirt molding part, which extends upward from the body molding part so as to mold a skirt of the receptacle, and a flange molding part which extends in the direction from the upper end of the skirt molding part toward the outside so as to mold the lower surface of a flange of the receptacle; and a second mold portion which is provided above the first mold portion, can move vertically and enable pressure-molding of the upper surface of the flange, and has a pressing surface for pressing a sheet which is to be molded into the flange from above at a position corresponding to the flange molding part.Type: ApplicationFiled: September 21, 2018Publication date: July 1, 2021Inventors: Byung Kook LEE, Kwang Soo PARK, Hui Jae SONG, Gyu Hwan CHA
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Publication number: 20210193656Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.Type: ApplicationFiled: February 17, 2021Publication date: June 24, 2021Inventors: Gyu-Hwan Ahn, Sung-Soo Kim, Chae-Ho Na, Dong-Hyun Roh, Sang-Jin Hyun
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Publication number: 20210162649Abstract: The present invention provides a container forming apparatus, a container forming method, a container, and an instant food packaging method using the container. The container forming apparatus, which is a container forming apparatus for forming a container by thermoforming, comprises: a bottom forming part for forming the bottom portion of the container; a side forming part extending upwardly inclined from the bottom forming part and configured to form a part of the side portion of the container; a first form part configured to rise upward and pressurize the container to separate and take out the formed container; and a second form part disposed outside the first form part and configured to form the remaining parts of the container except the part of the side portion.Type: ApplicationFiled: June 13, 2019Publication date: June 3, 2021Applicant: CJ CHEILJEDANG CORPORATIONInventors: Byung Kook LEE, Hui Jae SONG, Kyoung Sik CHO, Gyu Hwan CHA
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Patent number: 11018050Abstract: A semiconductor device includes a substrate having first fin and a second fin spaced apart and extending lengthwise in parallel. A fin remnant is disposed between the first fin and the second fin, extends lengthwise in parallel with the first and second fins, and has a height lower than a height of each of the first fin and the second fin. A first field insulation layer is disposed between a sidewall of the first fin and a first sidewall of the fin remnant and a second field insulating layer is disposed on a sidewall of the second fin. A blocking liner conforms to a sidewall and a bottom surface of a trench bounded by a second sidewall of the fin remnant and a sidewall of the second field insulating layer. A trench insulation layer is disposed on the blocking liner in the trench.Type: GrantFiled: April 17, 2019Date of Patent: May 25, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung Soo Kim, Chae Ho Na, Gyu Hwan Ahn, Dong Hyun Roh, Sang Jin Hyun