Patents by Inventor Gyu-hwan An

Gyu-hwan An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145268
    Abstract: A molding apparatus for fabricating a semiconductor package includes an upper mold including an upper cavity, a first side cavity at a first side of the upper cavity, a second side cavity formed at an opposite second side of the upper cavity, and a first driving part connected to the first side cavity and configured to move the first side cavity in a first direction, and a bottom mold including a bottom cavity configured to receive a molding target including a package substrate and at least one semiconductor chip. A width in the first direction between the first side cavity and the second side cavity may be smaller than a width of the package substrate in the first direction and greater than a width in the first direction between a first boundary and a second boundary of the at least one semiconductor chip.
    Type: Application
    Filed: September 15, 2023
    Publication date: May 2, 2024
    Inventors: Jun Woo Park, Gyu Hyeong Kim, Seung Hwan Kim, Jung Joo Kim, Jong Wan Kim, Yong Kwan Lee
  • Patent number: 11961775
    Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: April 16, 2024
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee, Sang Goo Kang, Kyung Rok Park
  • Patent number: 11937765
    Abstract: A cleaning apparatus including a vacuum cleaner and a docking station is provided. The cleaning apparatus includes a vacuum cleaner including a dust collecting chamber in which foreign substances are collected, and a docking station configured to be connected to the dust collecting chamber to remove the foreign substances collected in the dust collecting chamber. The dust collecting chamber is configured to collect foreign substances through centrifugation, and configured to be docked to the docking station, and the docking station includes a suction device configured to suction the foreign substances and air in the dust collecting chamber docked to the docking station.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: March 26, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: See Hyun Kim, In Gyu Choi, Ki Hwan Kwon, Shin Kim, Hyeon Cheol Kim, Do Kyung Lee, Hyun Ju Lee, Yun Soo Jang, Seung Ryong Cha, Jung Gyun Han
  • Publication number: 20240078967
    Abstract: Disclosed is an intelligent display board capable of increasing visibility by responding to external environmental factors in real time. The intelligent display board aims to improve a displayed image by minimizing differences in the characteristics of a display element (LED) according to the influence of external sunlight and artificial lighting and temperature. The white color of the display board is moved to be closed to a reference if deviating the reference so that low-level colors that are ignored by sunlight, etc. are darkened and the variance of recognizable colors is increased to make it easy to distinguish, thereby increasing the visibility of the display board. In addition, luminance varying according to temperature is adjusted to compensate for and adjust an image while automatically being applicable to a surrounding environment even with respect to temperature, thereby increasing the quality of an image displayed on the display board.
    Type: Application
    Filed: October 26, 2021
    Publication date: March 7, 2024
    Inventors: Jae Hwan LEE, Gyu Sang SHIM, Kwang Min KO
  • Publication number: 20240014209
    Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.
    Type: Application
    Filed: September 25, 2023
    Publication date: January 11, 2024
    Inventors: Gyu-Hwan Ahn, Sung-Soo Kim, Chae-Ho Na, Dong-Hyun Roh, Sang-Jin Hyun
  • Patent number: 11804483
    Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: October 31, 2023
    Inventors: Gyu-Hwan Ahn, Sung-Soo Kim, Chae-Ho Na, Dong-Hyun Roh, Sang-Jin Hyun
  • Publication number: 20230155159
    Abstract: A lamination apparatus configured to manufacture an electrode cell assembly may include a lamination part configured to manufacture the electrode cell assembly through lamination, an inspection part configured to detect a defective electrode cell assembly by measuring a thickness of the manufactured electrode cell assembly, a discharge part configured to separate and discharge the defective electrode cell assembly from a normal electrode cell assembly, and a control part configured to perform control so as to calculate a time point at which the defective electrode cell assembly reaches the discharge part on the basis of distance data between a point at which the defective electrode cell assembly is detected and the discharge part and separate and discharge the defective electrode cell assembly when the defective electrode cell assembly reaches the discharge part. A method of discharging a defective electrode cell assembly by the lamination apparatus is also disclosed.
    Type: Application
    Filed: January 28, 2022
    Publication date: May 18, 2023
    Applicant: LG Energy Solution, Ltd.
    Inventors: Hyun Jae Park, Ha Yong Jung, Jong Myung Lee, Gyu Hwan Choe, Kyu Sang Lee
  • Patent number: 11600518
    Abstract: A semiconductor device includes a substrate having first fin and a second fin spaced apart and extending lengthwise in parallel. A fin remnant is disposed between the first fin and the second fin, extends lengthwise in parallel with the first and second fins, and has a height lower than a height of each of the first fin and the second fin. A first field insulation layer is disposed between a sidewall of the first fin and a first sidewall of the fin remnant and a second field insulating layer is disposed on a sidewall of the second fin. A blocking liner conforms to a sidewall and a bottom surface of a trench bounded by a second sidewall of the fin remnant and a sidewall of the second field insulating layer. A trench insulation layer is disposed on the blocking liner in the trench.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: March 7, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Soo Kim, Chae Ho Na, Gyu Hwan Ahn, Dong Hyun Roh, Sang Jin Hyun
  • Publication number: 20220386607
    Abstract: The present invention relates to a novel nicotinamide compound, a method for preparing the same, and a herbicide comprising the compound. The compound of the present invention is useful as a herbicide for foliar treatment or soil treatment because it has high safety for wheat or corn and has excellent herbicidal activity against grassy weeds, sedge weeds or broadleaf weeds.
    Type: Application
    Filed: October 21, 2020
    Publication date: December 8, 2022
    Inventors: Young Kwan KO, Eun Ae KIM, Ill Young LEE, Hee Nam LIM, Jung Sub CHOI, Jee Hee SUH, Nack Jeong KIM, Dong Wan KOO, Hyun Jin KIM, Gyu Hwan YON, Jae Deok KIM, Seungae OH, So-Young LEE, Chan Yong PARK, Yun Kyoung HWANG, Byung Hoon AHN, Ah Reum KIM, Hye Ji HAN, Sungjun PARK, Junhyuk CHOI, Jisoo LIM, Mi Sook HONG
  • Publication number: 20220262673
    Abstract: A semiconductor device includes a substrate, a first fin, and a second fin. The first and second fins are spaced apart from each other in a first direction on the substrate and extend in a second direction intersecting the first direction. The semiconductor device further includes a first shallow trench formed between the first and second fins, and a field insulating film which fills at least a part of the first shallow trench. The field insulating film includes a first portion, a second portion adjacent to the first portion, and a third portion adjacent to the second portion and adjacent to a side wall of the first shallow trench. The first portion includes a central portion of an upper surface of the field insulating film in the first direction. The upper surface of the field insulating film is in a shape of a brace recessed toward the substrate.
    Type: Application
    Filed: May 9, 2022
    Publication date: August 18, 2022
    Inventors: Chae Ho NA, Sung Soo KIM, Gyu Hwan AHN, Dong Hyun ROH
  • Patent number: 11328949
    Abstract: A semiconductor device includes a substrate, a first fin, and a second fin. The first and second fins are spaced apart from each other in a first direction on the substrate and extend in a second direction intersecting the first direction. The semiconductor device further includes a first shallow trench formed between the first and second fins, and a field insulating film which fills at least a part of the first shallow trench. The field insulating film includes a first portion, a second portion adjacent to the first portion, and a third portion adjacent to the second portion and adjacent to a side wall of the first shallow trench. The first portion includes a central portion of an upper surface of the field insulating film in the first direction. The upper surface of the field insulating film is in a shape of a brace recessed toward the substrate.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: May 10, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chae Ho Na, Sung Soo Kim, Gyu Hwan Ahn, Dong Hyun Roh
  • Patent number: 11247823
    Abstract: One or more embodiments of the present disclosure relate to a pouch for packaging fermented foods, a method of packaging fermented foods using the same, and a pouch for packaging.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: February 15, 2022
    Assignee: CJ CHEILJEDANG CORPORATION
    Inventors: Dong Rag Son, Kyoung Sik Cho, Yoon Seung Nam, Kwang Soo Park, Hui Jae Song, Gyu Hwan Cha
  • Publication number: 20210257250
    Abstract: A semiconductor device includes a substrate having first fin and a second fin spaced apart and extending lengthwise in parallel. A fin remnant is disposed between the first fin and the second fin, extends lengthwise in parallel with the first and second fins, and has a height lower than a height of each of the first fin and the second fin. A first field insulation layer is disposed between a sidewall of the first fin and a first sidewall of the fin remnant and a second field insulating layer is disposed on a sidewall of the second fin. A blocking liner conforms to a sidewall and a bottom surface of a trench bounded by a second sidewall of the fin remnant and a sidewall of the second field insulating layer. A trench insulation layer is disposed on the blocking liner in the trench.
    Type: Application
    Filed: May 5, 2021
    Publication date: August 19, 2021
    Inventors: Sung Soo KIM, Chae Ho NA, Gyu Hwan AHN, Dong Hyun ROH, Sang Jin HYUN
  • Patent number: 11083315
    Abstract: The present application relates to a disposable foldable eating utensil comprising: a body; a handle extending from the distal end of the body; and a bendable part formed between the body and the handle to be thinner than the other parts so as to allow the handle to be folded and unfolded, wherein the body comprises a protrusion protruding downward from the bottom surface of the distal end thereof, the protrusion comprises an engaging ledge protruding outward from the periphery thereof, and the handle comprises an extension piece extending at a predetermined thickness from the tip end thereof and having a through-hole passing through the upper surface and the bottom surface thereof.
    Type: Grant
    Filed: December 26, 2017
    Date of Patent: August 10, 2021
    Assignee: CJ CHEILJEDANG CORPORATION
    Inventors: Kwang Soo Park, Ki Pyo Kim, Ki Min Rhyu, Kyoung Sik Cho, Gyu Hwan Cha
  • Publication number: 20210198007
    Abstract: The present invention provides a receptacle molding apparatus, a receptacle and a receptacle molding method. The receptacle molding apparatus, which is for molding a receptacle by means of heat molding, comprises: a first mold portion comprising a body molding part, which is for molding a body of a receptacle, a skirt molding part, which extends upward from the body molding part so as to mold a skirt of the receptacle, and a flange molding part which extends in the direction from the upper end of the skirt molding part toward the outside so as to mold the lower surface of a flange of the receptacle; and a second mold portion which is provided above the first mold portion, can move vertically and enable pressure-molding of the upper surface of the flange, and has a pressing surface for pressing a sheet which is to be molded into the flange from above at a position corresponding to the flange molding part.
    Type: Application
    Filed: September 21, 2018
    Publication date: July 1, 2021
    Inventors: Byung Kook LEE, Kwang Soo PARK, Hui Jae SONG, Gyu Hwan CHA
  • Publication number: 20210193656
    Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.
    Type: Application
    Filed: February 17, 2021
    Publication date: June 24, 2021
    Inventors: Gyu-Hwan Ahn, Sung-Soo Kim, Chae-Ho Na, Dong-Hyun Roh, Sang-Jin Hyun
  • Publication number: 20210162649
    Abstract: The present invention provides a container forming apparatus, a container forming method, a container, and an instant food packaging method using the container. The container forming apparatus, which is a container forming apparatus for forming a container by thermoforming, comprises: a bottom forming part for forming the bottom portion of the container; a side forming part extending upwardly inclined from the bottom forming part and configured to form a part of the side portion of the container; a first form part configured to rise upward and pressurize the container to separate and take out the formed container; and a second form part disposed outside the first form part and configured to form the remaining parts of the container except the part of the side portion.
    Type: Application
    Filed: June 13, 2019
    Publication date: June 3, 2021
    Applicant: CJ CHEILJEDANG CORPORATION
    Inventors: Byung Kook LEE, Hui Jae SONG, Kyoung Sik CHO, Gyu Hwan CHA
  • Patent number: 11018050
    Abstract: A semiconductor device includes a substrate having first fin and a second fin spaced apart and extending lengthwise in parallel. A fin remnant is disposed between the first fin and the second fin, extends lengthwise in parallel with the first and second fins, and has a height lower than a height of each of the first fin and the second fin. A first field insulation layer is disposed between a sidewall of the first fin and a first sidewall of the fin remnant and a second field insulating layer is disposed on a sidewall of the second fin. A blocking liner conforms to a sidewall and a bottom surface of a trench bounded by a second sidewall of the fin remnant and a sidewall of the second field insulating layer. A trench insulation layer is disposed on the blocking liner in the trench.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: May 25, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Soo Kim, Chae Ho Na, Gyu Hwan Ahn, Dong Hyun Roh, Sang Jin Hyun
  • Patent number: D1025167
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: April 30, 2024
    Inventors: Han Wool Choi, Jun Hwan Park, Seok Young Youn, Hun Keon Ko, Ho Seong Kang, Hyeon Jeong An, Gyu Jong Hwang, Soo Kyoung Kang, Dong Jin Hyun, Geun Sang Yu
  • Patent number: D1025168
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: April 30, 2024
    Inventors: Han Wool Choi, Jun Hwan Park, Seok Young Youn, Hun Keon Ko, Ho Seong Kang, Hyeon Jeong An, Gyu Jong Hwang, Soo Kyoung Kang, Dong Jin Hyun, Geun Sang Yu