Patents by Inventor Gyu Hyun Kim

Gyu Hyun Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070126615
    Abstract: A digital-to-analog converter (DAC) for a sigma-delta modulator is provided. The DAC has a switched capacitor structure using an operational amplifier (OP amp) and performs a function exceeding 3-level using a switching method employing only one capacitor in single ended form. Thus, DAC non-linearity caused by capacitor mismatching does not occur, and the number of output levels of the DAC is increased. Also, the DAC capacitor may be applied to a general DAC to increase the ratio of DAC output levels to capacitors.
    Type: Application
    Filed: October 27, 2006
    Publication date: June 7, 2007
    Inventors: Yi Gyeong Kim, Chong Ki Kwon, Jong Dae Kim, Min Hyung Cho, Seung Chul Lee, Gyu Hyun Kim
  • Patent number: 7116255
    Abstract: A multiplying digital to analog converter comprising a digital to analog converter having a plurality of capacitors coupled in parallel, applying first signals to the capacitors during a sampling period, and applying second signals to the capacitors during an amplifying period, and an amplifier including a first amplifier electrically coupled to the digital to analog converter; a second amplifier electrically coupled to the first amplifier; and a first switch electrically coupled between an input end and an output end of the second amplifier, being turned off during a sampling period, and being turned off during an amplifying period.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: October 3, 2006
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seung-Chul Lee, Kwi-Dong Kim, Gyu-Hyun Kim, Jong-Ki Kwon, Jong-Dae Kim
  • Patent number: 7112506
    Abstract: Disclosed is a method for forming a capacitor of a semiconductor device. An etch stop layer, first oxide layer and second oxide layer are sequentially deposited on an insulating interlayer of a substrate. Contact holes through which portions of the etch stop layer are exposed above plugs of the insulating interlayer are formed. The contact holes are cleaned by a cleaning solution having an etching selectivity which is higher for the first oxide layer than for the second oxide layer, thereby enlarging lower portions of the contact holes. A spacer nitride layer is formed on surfaces of the contact holes and the second oxide layer. Portions of the spacer nitride layers located on the second oxide layer and above the plugs together with portions of the etch stop layer located on the plugs are removed. A double polysilicon layer is formed on the spacer nitride layer segments.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: September 26, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventors: Gyu Hyun Kim, Hyo Geun Yoon, Geun Min Choi
  • Publication number: 20060109154
    Abstract: A multiplying digital to analog converter comprising a digital to analog converter having a plurality of capacitors coupled in parallel, applying first signals to the capacitors during a sampling period, and applying second signals to the capacitors during an amplifying period, and an amplifier including a first amplifier electrically coupled to the digital to analog converter; a second amplifier electrically coupled to the first amplifier; and a first switch electrically coupled between an input end and an output end of the second amplifier, being turned off during a sampling period, and being turned off during an amplifying period.
    Type: Application
    Filed: June 14, 2005
    Publication date: May 25, 2006
    Inventors: Seung-Chul Lee, Kwi-Dong Kim, Gyu-Hyun Kim, Jong-Ki Kwon, Jong-Dae Kim
  • Patent number: 6893914
    Abstract: A method for manufacturing a semiconductor device wherein a cylindrical capacitor is formed by selectively etching an oxide film in a cell area for preventing bridging between cells during a wet etching process of the oxide film in the cell area is described herein. A step difference between the interlayer insulating film formed in the cell area and the interlayer insulating film formed in the peripheral circuit area is minimized by covering the peripheral circuit area by the photoresist film and selectively etching the oxide film in the cell area to form a cylindrical capacitor, thereby simplifying the manufacturing process. In addition, bridging between the cells is prevented by performing a simple wet etching process using a single wet station, without performing a separate dry etching process for removing the oxide film and the photoresist film pattern, thereby improving the yield of the device.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: May 17, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventors: Gyu Hyun Kim, Hyo Geun Yoon, Geun Min Choi
  • Publication number: 20040110340
    Abstract: A method for manufacturing a semiconductor device wherein a cylindrical capacitor is formed by selectively etching an oxide film in a cell area for preventing bridging between cells during a wet etching process of the oxide film in the cell area is described herein. A step difference between the interlayer insulating film formed in the cell area and the interlayer insulating film formed in the peripheral circuit area is minimized by covering the peripheral circuit area by the photoresist film and selectively etching the oxide film in the cell area to form a cylindrical capacitor, thereby simplifying the manufacturing process. In addition, bridging between the cells is prevented by performing a simple wet etching process using a single wet station, without performing a separate dry etching process for removing the oxide film and the photoresist film pattern, thereby improving the yield of the device.
    Type: Application
    Filed: June 25, 2003
    Publication date: June 10, 2004
    Inventors: Gyu Hyun Kim, Hyo Geun Yoon, Geun Min Choi`