Patents by Inventor Hae Chan Park
Hae Chan Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11823999Abstract: The present technology relates to a semiconductor device and a method of manufacturing the same. The semiconductor device includes a first stack including first interlayer insulating layers and first conductive patterns which are alternately stacked with one another, a second stack including second interlayer insulating layers and second conductive patterns which are alternately stacked with one another on the first stack, a plurality of channel plugs vertically formed through the first stack and the second stack, and at least one dummy plug vertically formed through the second without passing through the first stack.Type: GrantFiled: October 1, 2021Date of Patent: November 21, 2023Assignee: SK hynix Inc.Inventors: Hae Chan Park, Jang Won Kim, Jae Taek Kim
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Publication number: 20230143745Abstract: A light emitting display device includes a first semiconductor layer; a first gate insulating layer; a first gate conductive layer; a second gate insulating layer; a first data conductive layer; a lower organic layer; a second data conductive layer includes a first anode connection member and a second anode connection member; an upper organic layer; a first anode and a second anode; and a pixel defining layer that includes a first opening and a second opening respectively exposing the first anode and the second anode, wherein the upper organic layer include a first anode connection opening and a second anode connection opening through which the first anode and the second anode are respectively electrically connected with the first anode connection member and the second anode connection member.Type: ApplicationFiled: June 29, 2022Publication date: May 11, 2023Applicant: Samsung Display Co., LTD.Inventors: Jun Hee LEE, Jun Hyuk WOO, Hae Chan PARK, Yeong Ho LEE
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Patent number: 11579502Abstract: The present disclosure relates to a display device. A display device according to an embodiment of the present inventive concept includes gate lines extending along a first direction, data lines extending along a second direction, pixels including pixel electrodes, each of the pixels including a transistor connected to a gate line and a data line, and a pixel electrode connected to the transistor, the pixels including a first pixel which includes a first pixel electrode connected to a first data line and is disposed in nth pixel row and mth pixel column, and a second pixel which includes a second pixel electrode connected to the first data line or a second data line disposed adjacent to the first data line and is disposed in (n+1)th pixel row and the mth pixel column. The first data line does not overlap the first pixel electrode and overlaps the second pixel electrode.Type: GrantFiled: May 11, 2020Date of Patent: February 14, 2023Inventors: Se Hyun Lee, Hae Chan Park, Min Gyeong Shin, Hye Won Jang, Hak Sun Chang
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Publication number: 20220190070Abstract: A display device includes: a plurality of first banks extended in a first direction on a first substrate and spaced apart from one another; a first electrode and a second electrode extended in the first direction and located on different ones of the first banks so as to be spaced apart from one another; a first insulating layer covering the first electrode, the second electrode, and the plurality of first banks; a plurality of first patterns extended in a second direction crossing the first direction on the first insulating layer and spaced apart from one another; and a plurality of light-emitting elements between adjacent ones of the first patterns, and opposite ends of the light-emitting elements are arranged on the first electrode and the second electrode, respectively, on the first insulating layer, and a height of the first patterns is greater than a diameter of the light-emitting elements.Type: ApplicationFiled: October 21, 2021Publication date: June 16, 2022Inventors: Se Hyun LEE, Hae Chan PARK, Won Jun LEE
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Publication number: 20220128740Abstract: A tiled display device includes a plurality of display devices, and an optical member located on the display devices, wherein the optical member includes a base substrate, a plurality of first lenticular lenses located on a lower surface of the base substrate and extending in a first direction, and a plurality of second lenticular lenses located under the first lenticular lenses and extending in a second direction crossing the first direction.Type: ApplicationFiled: August 18, 2021Publication date: April 28, 2022Inventors: Won Jun LEE, Se Hyun LEE, Hae Chan PARK, Young Su LIM, Jin Joo HA
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Publication number: 20220020686Abstract: The present technology relates to a semiconductor device and a method of manufacturing the same. The semiconductor device includes a first stack including first interlayer insulating layers and first conductive patterns which are alternately stacked with one another, a second stack including second interlayer insulating layers and second conductive patterns which are alternately stacked with one another on the first stack, a plurality of channel plugs vertically formed through the first stack and the second stack, and at least one dummy plug vertically formed through the second without passing through the first stack.Type: ApplicationFiled: October 1, 2021Publication date: January 20, 2022Applicant: SK hynix Inc.Inventors: Hae Chan PARK, Jang Won KIM, Jae Taek KIM
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Patent number: 11145594Abstract: The present technology relates to a semiconductor device and a method of manufacturing the same. The semiconductor device includes a first stack including first interlayer insulating layers and first conductive patterns which are alternately stacked with one another, a second stack including second interlayer insulating layers and second conductive patterns which are alternately stacked with one another on the first stack, a plurality of channel plugs vertically formed through the first stack and the second stack, and at least one dummy plug vertically formed through the second without passing through the first stack.Type: GrantFiled: November 26, 2019Date of Patent: October 12, 2021Assignee: SK hynix Inc.Inventors: Hae Chan Park, Jang Won Kim, Jae Taek Kim
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Patent number: 11065662Abstract: Provided is a press forming method for a composite material, which prevents a longitudinal section of the composite material from being exposed to outside. To this end, the method includes: cutting edges of the upper metal layer and the resin layer using a cutter such that the resin layer is cut relatively more than the upper metal layer; bending the upper metal layer toward the lower metal layer; and folding the lower metal layer by an angle of 180 degrees using a hemming die such that side surfaces of the upper metal layer and the resin layer are prevented from being exposed to outside.Type: GrantFiled: March 21, 2018Date of Patent: July 20, 2021Assignee: OHSUNG DISPLAY CO, LTD.Inventor: Hae Chan Park
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Publication number: 20210109413Abstract: The present disclosure relates to a display device. A display device according to an embodiment of the present inventive concept includes gate lines extending along a first direction, data lines extending along a second direction, pixels including pixel electrodes, each of the pixels including a transistor connected to a gate line and a data line, and a pixel electrode connected to the transistor, the pixels including a first pixel which includes a first pixel electrode connected to a first data line and is disposed in nth pixel row and mth pixel column, and a second pixel which includes a second pixel electrode connected to the first data line or a second data line disposed adjacent to the first data line and is disposed in (n+1)th pixel row and the mth pixel column. The first data line does not overlap the first pixel electrode and overlaps the second pixel electrode.Type: ApplicationFiled: May 11, 2020Publication date: April 15, 2021Inventors: Se Hyun LEE, Hae Chan PARK, Min Gyeong SHIN, Hye Won JANG, Hak Sun CHANG
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Publication number: 20210028105Abstract: The present technology relates to a semiconductor device and a method of manufacturing the same. The semiconductor device includes a first stack including first interlayer insulating layers and first conductive patterns which are alternately stacked with one another, a second stack including second interlayer insulating layers and second conductive patterns which are alternately stacked with one another on the first stack, a plurality of channel plugs vertically formed through the first stack and the second stack, and at least one dummy plug vertically formed through the second without passing through the first stack.Type: ApplicationFiled: November 26, 2019Publication date: January 28, 2021Applicant: SK hynix Inc.Inventors: Hae Chan PARK, Jang Won KIM, Jae Taek KIM
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Publication number: 20200348572Abstract: A liquid crystal display includes: a plurality of pixel electrodes; and a first data line and a second data line, each of the first data line and the second data line configured to transmit a data voltage and having substantially straight and angled portions. The first data line and the second data line are adjacent to each other in a first direction. The plurality of pixel electrodes includes: a first pixel electrode that overlaps both the first data line and the second data line; and a second pixel electrode disposed adjacent to the first pixel electrode in a second direction that intersects the first direction without overlapping the first data line and the second data line.Type: ApplicationFiled: March 9, 2020Publication date: November 5, 2020Inventors: Se Hyun LEE, Hae Chan PARK, Min Gyeong SHIN, Hui Gyeong YUN, Seung Min LEE, Hak Sun CHANG
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Patent number: 10811628Abstract: Provided is a press forming method for a composite material. A press forming method for a composite material including an upper metal member, a resin member, and a lower metal member, and including: producing the lower metal member having first and second coating films respectively bonded to upper and lower surfaces thereof; producing the composite material including the upper metal member, a first hot melt member, the resin member, a second hot melt member, and the lower metal member; cutting an area spaced inward a predetermined distance from a lengthwise edge of the composite material by using a T-cutter, such that only the lower metal member remains; removing the upper metal member, the first hot melt member, the resin member, and the second hot melt member that are located outside the cut area; and folding the lower metal member by an angle of 180 degrees by using a hemming die.Type: GrantFiled: March 8, 2019Date of Patent: October 20, 2020Assignee: OHSUNG DISPLAY CO., LTD.Inventors: Hae Chan Park, Sun Gyu Kim
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Patent number: 10734407Abstract: A manufacturing method of a semiconductor device may be provided. The method may include forming stacks including interlayer insulating layers and separated by a slit, the interlayer insulating layers surrounding a channel layer and stacked to be spaced apart from one another with an interlayer space interposed therebetween. The method may include forming a conductive pattern filling the interlayer space. The method may include forming an isolation layer on a surface of the conductive pattern by oxidizing a portion of the conductive pattern by performing an oxidizing process.Type: GrantFiled: June 21, 2019Date of Patent: August 4, 2020Assignee: SK hynix Inc.Inventors: Hae Chan Park, Jang Won Kim, Gong Hyun Sa
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Publication number: 20200136084Abstract: Provided is a press forming method for a composite material. A press forming method for a composite material including an upper metal member, a resin member, and a lower metal member, and including: producing the lower metal member having first and second coating films respectively bonded to upper and lower surfaces thereof; producing the composite material including the upper metal member, a first hot melt member, the resin member, a second hot melt member, and the lower metal member; cutting an area spaced inward a predetermined distance from a lengthwise edge of the composite material by using a T-cutter, such that only the lower metal member remains; removing the upper metal member, the first hot melt member, the resin member, and the second hot melt member that are located outside the cut area; and folding the lower metal member by an angle of 180 degrees by using a hemming die.Type: ApplicationFiled: March 8, 2019Publication date: April 30, 2020Inventors: Hae Chan PARK, Sun Gyu KIM
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Patent number: 10566419Abstract: A semiconductor device includes a stack structure located on a substrate and includes a first region, in which sacrificial layers and insulating layers are alternately stacked, and a second region, in which conductive layers and insulating layers are alternately stacked. The stack structure also includes a first slit insulating layer located at a boundary between the first region and the second region, wherein the first slit insulating layer penetrates the stack structure and extends in one direction. The stack structure further includes a plurality of slit insulating patterns located in the second region, wherein the plurality of slit insulating patterns penetrate the stack structure and are arranged along the one direction. At least one conductive layer among the conductive layers is bent between the first slit insulating layer and the slit insulating patterns.Type: GrantFiled: December 5, 2018Date of Patent: February 18, 2020Assignee: SK hynix Inc.Inventors: Hae Chan Park, Jae Taek Kim
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Publication number: 20190312057Abstract: A manufacturing method of a semiconductor device may be provided. The method may include forming stacks including interlayer insulating layers and separated by a slit, the interlayer insulating layers surrounding a channel layer and stacked to be spaced apart from one another with an interlayer space interposed therebetween. The method may include forming a conductive pattern filling the interlayer space. The method may include forming an isolation layer on a surface of the conductive pattern by oxidizing a portion of the conductive pattern by performing an oxidizing process.Type: ApplicationFiled: June 21, 2019Publication date: October 10, 2019Applicant: SK hynix Inc.Inventors: Hae Chan PARK, Jang Won KIM, Gong Hyun SA
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Publication number: 20190291158Abstract: Provided is a press forming method for a composite material, which prevents a longitudinal section of the composite material from being exposed to outside. To this end, the method includes: cutting edges of the upper metal layer and the resin layer using a cutter such that the resin layer is cut relatively more than the upper metal layer; bending the upper metal layer toward the lower metal layer; and folding the lower metal layer by an angle of 180 degrees using a hemming die such that side surfaces of the upper metal layer and the resin layer are prevented from being exposed to outside.Type: ApplicationFiled: March 21, 2018Publication date: September 26, 2019Inventor: Hae Chan PARK
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Patent number: 10373971Abstract: A manufacturing method of a semiconductor device may be provided. The method may include forming stacks including interlayer insulating layers and separated by a slit, the interlayer insulating layers surrounding a channel layer and stacked to be spaced apart from one another with an interlayer space interposed therebetween. The method may include forming a conductive pattern filling the interlayer space. The method may include forming an isolation layer on a surface of the conductive pattern by oxidizing a portion of the conductive pattern by performing an oxidizing process.Type: GrantFiled: April 14, 2017Date of Patent: August 6, 2019Assignee: SK hynix Inc.Inventors: Hae Chan Park, Jang Won Kim, Gong Hyun Sa
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Patent number: 10296480Abstract: A data processing system includes a central processing unit (CPU), a control block configured to interface with the CPU, a cache memory configured to interface with the control block and arranged to be spaced from the CPU by a first distance, and a combined memory block configured to interface with the control block, arranged to be spaced from the CPU by a second distance larger than the first distance, and configured of a working memory and a storage memory. The combined memory block is configured of a plurality of stacked memory layers, each configured of a plurality of variable resistance memory cells. The working memory is allocated to one memory layer selected among the plurality of memory layers. The storage memory is allocated to remaining memory layers among the plurality of memory layers.Type: GrantFiled: March 7, 2016Date of Patent: May 21, 2019Assignee: SK hynix Inc.Inventors: Hae Chan Park, Sung Cheoul Kim, Tae Ho Kim
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Publication number: 20190115425Abstract: A semiconductor device includes a stack structure located on a substrate and includes a first region, in which sacrificial layers and insulating layers are alternately stacked, and a second region, in which conductive layers and insulating layers are alternately stacked. The stack structure also includes a first slit insulating layer located at a boundary between the first region and the second region, wherein the first slit insulating layer penetrates the stack structure and extends in one direction. The stack structure further includes a plurality of slit insulating patterns located in the second region, wherein the plurality of slit insulating patterns penetrate the stack structure and are arranged along the one direction. At least one conductive layer among the conductive layers is bent between the first slit insulating layer and the slit insulating patterns.Type: ApplicationFiled: December 5, 2018Publication date: April 18, 2019Applicant: SK hynix Inc.Inventors: Hae Chan PARK, Jae Taek KIM