Abstract: In certain aspects, a memory device includes a memory cell array having rows of memory cells, word lines respectively coupled to the rows of memory cells, and a peripheral circuit coupled to the memory cell array through the word lines. Each memory cell is configured to store a piece of N-bits data in one of 2N levels, where N is an integer greater than 1. The level corresponds to one of 2N pieces of N-bits data. The peripheral circuit is configured to program, in a first pass, a row of target memory cells, such that each of the row of target memory cells is programmed into one of 2N/m intermediate levels based on the piece of N-bits data to be stored in the target memory cell, where m is an integer greater than 1. The peripheral circuit is also configured to program, in a second pass after the first pass, the row of target memory cells, such that each target memory cell is programmed into one of the 2N levels based on the piece of N-bits data to be stored in the target memory cell.

Abstract: A method for extending shelf life of germ remained rice includes evenly spreading the germ remained rice on a sheet tray, and moderately moistening the germ remained rice, packing the germ remained rice moistened, and irradiating the germ remained rice with an electron beam.

Abstract: A millimeter wave antenna and a process design of a millimeter wave antenna are provided. The millimeter wave antenna includes a substrate and an antenna attached to the substrate. The substrate includes a first region and a second region. A thickness of the first region is less than a thickness of the second region. The antenna is arranged on the first region. According to the present application, the millimeter wave antenna enables the substrate attached with the antenna to be as thin as possible, such that a medium structure of the first region of the substrate is changed, reducing an energy loss while a millimeter wave is being transmitted.

Abstract: A ketone-containing polymer can provide for a paint having increased scrub resistance and decreased changes in viscosity, while maintaining quick dry times. In particular, the polymers may be used in compositions for traffic markings and industrial coatings.

Abstract: A memory device includes a plurality of memory cells arranged in a plurality of rows and a plurality of strings. A method of programming the memory device includes programming a first row of the memory cells. The method also includes, after programing the first row of the memory cells, programming a second row of the memory cells. The second row is adjacent to the first row in a first string direction. The method further includes, after programming the second row of the memory cells, programming a third row of the memory cells. The third row is two rows apart from the second row in a second string direction opposite to the first string direction.

Abstract: A memory device is provided. The memory device comprises a first plane and a second plane. The memory device further comprises a control circuit coupled to the first plane and the second plane. The control circuit is configured to: simultaneously initiate programming the first plane and the second plane; and in response to the first plane being successfully programmed, the second plane being unsuccessfully programmed, and a programming pulse count of the second plane being less than a predetermined programming pulse count value, keep programming the second plane and disable the first plane.

Abstract: A method and an apparatus of screen cast control. The method includes: establishing a first data link with a first device, in which, the first device includes information to be cast; acquiring the information to be cast from the first device based on the first data link; and transmitting the information to be cast to a data reception apparatus to trigger the data reception apparatus to cast the information to be cast to a second device.

Abstract: A memory system includes a memory cell array and a controller coupled to the memory cell array. The controller is configured to control applying a first program voltage to a word line to program memory cells in the memory cell array, the memory cells being coupled to the word line, and in response to receiving a suspend command, control applying a positive bias discharge voltage to the word line when the first program voltage ramps down.

Abstract: A memory device is provided. The memory device includes an array of memory cells arranged in a plurality of rows, a plurality of word lines respectively coupled to the plurality of rows of the memory cells; and a peripheral circuit coupled to the word lines and configured to perform multi-pass programming on a selected row of memory cells coupled to a selected word line of the word lines. The multi-pass programming includes a plurality of programming passes, each of the programming passes having a programming operation and a verify operation. To perform the multi-pass programming, the peripheral circuit is configured to, in a non-last programming pass, perform a negative gate stress (NGS) operation on each memory cell in the selected row of memory cells between the programming operation and the verify operation.

Abstract: A method for reading a memory device is provided. The memory device includes a plurality of word lines and a plurality of multi-bit memory cells connected to the plurality of word lines, and each of the multi-bit memory cells is configured such that a stored value of the multi-bit memory cell is read through multi-level preset read voltages. The method includes: defining at least one read offset for each of the multi-level preset read voltages respectively, selecting at least one of the multi-level preset read voltages as at least one sampling voltage, reading a multi-bit memory cell on an adjacent word line of a to-be-read multi-bit memory cell, and setting at least one offset flag, each representing a size of a respective one of at least one read offset, according to a sampling reading value of each of the at least one sampling voltage.

Abstract: A method for programming a memory device including a first plane and a second plane is provided. The method includes simultaneously initiating programming of the first plane and the second plane, and in response to the first plane being successfully programmed and the second plane not being successfully programmed, suspending the programming of the first plane, and keeping the programming of the second plane.

Abstract: Bifunctional chimeric heterocyclic compounds of formula (I) is effective for targeted degradation of androgen receptors and use thereof. The compound of formula (I) also has an isotopic compound, an optical isomer, a tautomer, pharmacologically acceptable salt, a prodrug thereof, or a solvate. In formula (I), ARB is an androgen receptor recognition/binding part, L is a link part, and U is a ubiquitin protease recognition/binding part; and the three parts are connected by means of chemical bonds. The compound can perform targeted degradation on androgen receptors in prostate cancer cells, and suppress proliferation of the prostate cancer cells, and also show good metabolic stability and pharmacokinetic properties. The compound has good application prospect in preparation of targeted chimeras for protein degradation of androgen receptors and in the preparation of drugs for treating related diseases regulated by the androgen receptors.

Abstract: A method, computer program product, and computing system for: receiving an initial portion of an encounter record; processing the initial portion of the encounter record to generate initial content for a medical report; receiving one or more additional portions of the encounter record; and processing the one or more additional portions of the encounter record to modify the medical report.

Abstract: Technical solutions are described for controlling operation of an electric machine such as a permanent magnet synchronous motor (PMSM) drive or motor control system to protect against excessive machine current or voltage in a PMSM drive. Systems and methods employ a torque control algorithm for PMSMs that uses the constraints of both machine current and voltage capability in PMSM drives, and online torque command modification according to the maximum allowed torque under these machine current and voltage constraints.

Abstract: A compound is represented by formula (I). A pharmaceutical composition contains the compound of formula (I). The compound is used in the preparation of an indoleamine-2,3-dioxygenase (IDO) inhibitor drug. The compound exhibits inhibition effect on IDO protease and metabolizes stably in the body. The compound or pharmaceutical composition thereof can be used for preparing an IDO inhibitor drug, and can also be used for preparing a drug for preventing and/or treating diseases having IDO-mediated tryptophan metabolic pathway pathological features.

Abstract: Embodiments of erasing methods for a three-dimensional (3D) memory device are disclosed. The 3D memory device includes multiple decks vertically stacked over a substrate, wherein each deck includes a plurality of memory cells. The erasing method includes checking states of the plurality of memory cells of an erase-inhibit deck and preparing the erase-inhibit deck according to the states of the plurality of memory cells. The erasing method also includes applying an erase voltage at an array common source, applying a hold-release voltage on unselected word lines of the erase-inhibit deck, and applying a low voltage on selected word lines of a target deck.

Abstract: In a method for reading a memory device including a first memory cell string, in a pre-verify stage, a first verify voltage is applied on a gate terminal of a selected memory cell of the first memory cell string, where the selected memory cell is programmed and arranged between a first adjacent memory cell and a second adjacent memory cell. A first bias voltage is applied on a gate terminal of at least one memory cell of the first memory cell string that is not programmed. In a verify stage, a second verify voltage is applied on the gate terminal of the selected memory cell of the first memory cell string. A second bias voltage is applied on the gate terminal of the at least one memory cell of the first memory cell string that is not programmed, where the second bias voltage is smaller than the first bias voltage.