Abstract: A pixel including a light emitting device, a first transistor including a first electrode connected to a first node electrically connected to a first power source, a second transistor connected between a data line and the first node and turned on in response to a first scan signal supplied to a first scan line, a third transistor connected between a third node connected to a second electrode of the first transistor and a second node and turned on in response to a second scan signal supplied to a second scan line, a fourth transistor turned on in response to a third scan signal, and a storage capacitor connected between the first power source and the second node, in which the second scan signal overlaps the first scan signal, and a width of the second scan signal is greater than twice a width of the first scan signal.

Abstract: A display panel includes a pixel connected to a scan line and a data line, and a lighting test circuit which provides a lighting test voltage to the pixel through the data line. The lighting test circuit includes a first test transistor including a first electrode which receives the lighting test voltage, a second electrode and a gate electrode which receives a first test control signal, and a second test transistor including a first electrode connected to the second electrode of the first test transistor, a second electrode connected to the data line and a gate electrode which receives a second test control signal.

Abstract: A display device includes a diffusion layer providing a single well, an optical element configured to receive light and output the received image light including a concentric series of lens segments made up of active facets, and a waveguide having an in-coupling grating and a waveguide body optically coupled to the image light, where a polarizing component is disposed over an output surface of the optical element. A method to improve a yield of silicon backplane displays includes connecting a diode having a resolution to a backplane and repairing a defect on a pixel display area by dividing the pixel display area into at least one subcircuit, while improving geometry stylization transfer for 3D models of real-world environments. A method for suppressing crosstalk for user conversations includes receiving multiple speech signals captured by multiple microphones and generating directional data for the multiple speech signals based on spatial filtering.

Abstract: A display device includes a power supply to supply a first initialization power source to the pixels through a first initialization and to supply a second initialization power source to the pixels through a second power line.

Abstract: A gate driver includes a stage configured to output a gate signal, the stage including an input part configured to control a voltage of a first node and a voltage of a second node based on signals supplied to a first input terminal and a second input terminal, an output part configured to supply a voltage of a first power source or a voltage of a second power source as the gate signal to an output terminal based on a voltage of a third node and a voltage of a fourth node, a first signal processing part configured to supply the voltage of the second power source to the fourth node based on the voltage of the first node, or to electrically connect the second node and the fourth node through a fifth node based on a signal supplied to a third input terminal, and a second signal processing part including a first transistor connected between the third node and a sixth node to control the voltage of the third node based on an operation of the first transistor.

Abstract: A pixel including a light emitting device, a first transistor including a first electrode connected to a first node electrically connected to a first power source, a second transistor connected between a data line and the first node and turned on in response to a first scan signal supplied to a first scan line, a third transistor connected between a third node connected to a second electrode of the first transistor and a second node and turned on in response to a second scan signal supplied to a second scan line, a fourth transistor turned on in response to a third scan signal, and a storage capacitor connected between the first power source and the second node, in which the second scan signal overlaps the first scan signal, and a width of the second scan signal is greater than twice a width of the first scan signal.

Abstract: A driver includes first to Mth stages, where a first input signal and a second input signal are input to each of the first to Mth stages, and each of the first to Mth stages outputs a stage output signal, a first carry signal, and a second carry signal, where M is a natural number greater than or equal to 2. The first carry signal and the second carry signal output from a kth stage are the first input signal and the second input signal, which are input to a (k+1)th stage, respectively, where k is a natural number greater than or equal to 1 and less than M, and the first input signal and the second input signal, which are input to a first stage, are a first start signal and a second start signal which are alternately changed for predetermined frame times, respectively.

Abstract: A scan driver and a driving method thereof, in which the scan driver includes a plurality of stages outputting an output signal in response to clock signals supplied at a first frequency during a driving time of one frame, wherein the plurality of stages are supplied with the clock signals at a second frequency lower than the first frequency during a hold time of the one frame that is separate from the driving time of the one frame.

Abstract: A gate driver includes: a pull-up circuit configured to pull up a gate output signal to a high voltage in response to a signal at a first node of the pull-up circuit; a first pull-down circuit configured to pull down the gate output signal to a low voltage in response to a signal at a second node of the first pull-down circuit; a second pull-down circuit configured to pull down the gate output signal to the low voltage in response to a signal at a third node of the second pull-down circuit; a first selection circuit configured to activate the first pull-down circuit and deactivate the second pull-down circuit based on a first selection signal; and a second selection circuit configured to activate the second pull-down circuit and deactivate the first pull-down circuit based on a second selection signal.

Abstract: A stage circuit includes an input unit connected to a first input terminal receiving a gate start pulse or a previous stage carry signal to control a voltage of a first node, a first output unit connected to a fourth input terminal to which a clock signal is input and supplying a scan signal to a first output terminal corresponding to a voltage of the first node and a second node, a second output unit connected to a third input terminal to which a second carry clock signal is input and supplying a carry signal to a second output terminal corresponding to the voltage of the first node and the second node, a first control unit connected to a first power input terminal to which first power is input and controlling a voltage of a third node, and a second control unit connected to a second power input terminal.

Abstract: A display device includes pixels, and a power supply to supply a first initialization voltage to the pixels through a first initialization power line, and to supply a second initialization voltage to the pixels through a second initialization power line. At least one of the pixels includes a first transistor, a second transistor, a third transistor, and a light emitting element.

Abstract: A display device includes gate lines and pixels connected to the gate lines. The display device includes stages which provide gate signals to the gate lines, and first and second gate power lines which transfer a first voltage to the stages. A first stage among the stages includes a first node controller and a first output unit. The first node controller is connected to the second gate power line, and controls a voltage of a first control node. The first output unit is connected to the first gate power line, and outputs a first voltage of the first gate power line as a gate signal in response to a voltage of the first control node.

Abstract: A gate driver includes a carry signal generating circuit and a shift register circuit. The carry signal generating circuit receives a vertical start signal and outputs first and second carry signals. The shift register circuit receives the first and second carry signals and outputs a first stage first carry signal, a first stage second carry signal and a first stage gate output signal. The carry signal generating circuit includes a first carry generator generating the first carry signal and a second carry generator generating the second carry signal. The shift register circuit includes a first stage first carry generator generating the first stage first carry signal, a first stage second carry generator generating the first stage second carry signal and a first stage output buffer outputting the first stage gate output signal.

Abstract: A scan driver for driving a plurality of pixels, the scan driver including: stages connected to each other through carry lines, a first stage among the stages includes: a first scan circuit configured to generate a first scan signal in response to a stage select signal, and apply the first scan signal to pixels of the same row among the plurality of pixels; and a second scan circuit electrically connected to the first scan circuit to generate a carry signal overlapping the first scan signal, and configured to provide a second scan signal to the pixels of the same row in response to the carry signal, and the carry signal is output as the stage select signal to a second stage among the stages through one of the carry lines.

Abstract: A gate driver includes a stage configured to output a gate signal, the stage including an input part configured to control a voltage of a first node and a voltage of a second node based on signals supplied to a first input terminal and a second input terminal, an output part configured to supply a voltage of a first power source or a voltage of a second power source as the gate signal to an output terminal based on a voltage of a third node and a voltage of a fourth node, a first signal processing part configured to supply the voltage of the second power source to the fourth node based on the voltage of the first node, or to electrically connect the second node and the fourth node through a fifth node based on a signal supplied to a third input terminal, and a second signal processing part including a first transistor connected between the third node and a sixth node to control the voltage of the third node based on an operation of the first transistor.

Abstract: A scan driver includes stages that include a first stage. A method for operating the scan driver includes providing a first clock signal, a first carry clock signal, a second carry clock signal, a first power source voltage, and a second power source voltage to the first stage to enable the first stage to provide a first scan signal to a first scan line. Throughout a portion of one frame, each of the first clock signal, the first carry clock signal, and the second carry clock signal is constant.

Abstract: An emissive display device includes: a light emitting diode; an n-type driving transistor comprising a first driving gate electrode, a first electrode receiving a driving voltage, a second electrode transferring an output current to the anode, and a second driving gate electrode; a second transistor connected to a data line; a third transistor configured to connect the first electrode and the first driving gate electrode of the driving transistor; a storage capacitor comprising a first storage electrode and a second storage electrode connected to the first driving gate electrode; a ninth transistor transferring an overlapping electrode voltage to the second driving gate electrode; an overlapping electrode voltage line crossing the data line and receiving the overlapping electrode voltage; and a shielding electrode at an intersection of the data line and the overlapping electrode voltage line and between the data line and the overlapping electrode voltage line.

Abstract: A scan driver and a driving method thereof, in which the scan driver includes a plurality of stages outputting an output signal in response to clock signals supplied at a first frequency during a driving time of one frame, wherein the plurality of stages are supplied with the clock signals at a second frequency lower than the first frequency during a hold time of the one frame that is separate from the driving time of the one frame.

Abstract: An emission driver includes a plurality of stages. A stage of the plurality of stages receives a start signal, a first clock signal, a second clock signal, a protection signal, a first gate power voltage and a second gate power voltage and outputs an emission signal. The stage of the plurality of stages includes a pull-up switching element connected between a first gate power voltage terminal which receives the first gate power voltage and an emission signal output terminal which outputs the emission signal, a pull-down switching element connected between a second gate power voltage terminal which receives the second gate power voltage and the emission signal output terminal and a protection switching element which applies the first gate power voltage to a control electrode of the pull-down switching element in response to the protection signal.

Abstract: A display device including pixels coupled to first scan lines, second scan lines, emission control lines, and data lines; a first scan driver to supply a scan signal to each of the first scan lines at a first frequency to drive the display device at a first driving frequency, and to supply the scan signal to each of the first scan lines at a second frequency to drive the display device at a second driving frequency lower than the first driving frequency; a second scan driver to supply a scan signal to each of the second scan lines at the first frequency to drive the display device at the first driving frequency, and to supply the scan signal to each of the second scan lines at the second frequency to drive the display device at the second driving frequency; an emission driver to supply an emission control signal to each of the emission control lines at the first frequency; and a data driver to supply a data signal to each of the data lines in response to the scan signal supplied to each of the first scan line