Abstract: A solid state photonics circuit having a liquid crystal (LC) layer for beam steering. The LC layer can provide tuning of an array of waveguides by controlling the application of voltage to the liquid crystal. The application of voltage to the liquid crystal can be controlled to perform beam steering with the light signal based on different tuning in each of the waveguides of the array. The waveguides are disposed in a substrate having an oxide or other insulating layer with an opening. The opening in the oxide layer exposes a portion of a path of the array of waveguides. The waveguides are exposed to the liquid crystal through the oxide opening, which allows the voltage changes to the liquid crystal to tune the optical signals in the waveguides.

Abstract: Techniques and mechanisms for a monolithic photonic integrated circuit (PIC) to provide spectrometry functionality. In an embodiment, the PIC comprises a photonic device, a first waveguide and a second waveguide, wherein one of the first waveguide and the second waveguide includes a released portion which is free to move relative to a substrate of the PIC. During a metering cycle to evaluate a material under test, control logic operates an actuator to successively configure a plurality of positions of the released portion relative to the photonic device. In another embodiment, light from the first waveguide is variously diffracted by a grating of the photonic device during the metering cycle, where portions of the light are directed into the second waveguide. Different wavelengths of light diffracted into the second waveguide may be successively detected, for different positions of the released portion, to determine spectrometric measurements over a range of wavelength.

Abstract: Technologies for generating a broadband optical output include a plurality of narrowband optical sources formed in a silicon substrate to generate a narrowband optical output, a plurality of input optical waveguides to route the narrowband optical output, an optical multiplexer formed in the silicon substrate to reflect the routed narrowband optical output, and an output optical waveguide to collect the reflected narrowband optical output to generate the broadband optical output. The output optical waveguide may route the broadband optical output to an output of the photonic integrated circuit.

Abstract: Inverted 45° semiconductor mirrors as vertical optical couplers for PIC chips, particularly optical receivers and transmitters. An inverted 45° semiconductor mirror functions to couple light between a plane in the PIC chip defined by thin film layers and a direction normal to a top surface of the PIC chip where it may be generated or collected by an off-chip component, such as a wire terminal. In an exemplary embodiment, a (110) plane of a cubic crystalline semiconductor may provide a 45° facet inverted relative to a (100) surface of the semiconductor from which light is to be emitted. In further embodiments, a (110) plane may be exposed by undercutting a device layer of a semiconductor on insulator (SOI) substrate. Alternatively, a pre-etched substrate surface may be bonded to a handling wafer, thinned, and then utilized for PIC waveguide formation.

Abstract: Methods of forming microelectronic structures are described. Embodiments of those methods may include forming a photomask on a (110) silicon wafer substrate, wherein the photomask comprises a periodic array of parallelogram openings, and then performing a timed wet etch on the (110) silicon wafer substrate to form a diffraction grating structure that is etched into the (110) silicon wafer substrate.

Abstract: Embodiments of the invention use crystallographic etching of SOI wafers with a (110)-oriented epi layer to form both the vertical input facet and the re-entrant mirror. Proposed layout design combined with proposed orientation of the epi enables both vertical facets and re-entrant (upward-reflecting) mirror facets to be made in a single wafer-level wet etch process.

Abstract: Photonic integrated circuit (PIC) chips with backside vertical optical coupler and packaging into an optical transmitter/receiver. A grating-based backside vertical optical coupler functions to couple light to/from a plane in the PIC chip defined by thin film layers through a bulk thickness of the PIC chip substrate to emit/collect via a backside surface of the PIC chip where it is to be coupled by an off-chip component, such as an optical fiber. Embodiments of a grating-based backside vertical optical coupler include a grating coupler with a grating formed in a topside surface of the thin film A reflector is disposed over the grating coupler to reflect light emitted from the grating coupler through the substrate to emit from the backside of the PIC chip or to reflect light collected from the backside of the PIC chip through the substrate and to the grating coupler.

Abstract: Methods of forming microelectronic structures are described. Embodiments of those methods may include forming a photomask on a (110) silicon wafer substrate, wherein the photomask comprises a periodic array of parallelogram openings, and then performing a timed wet etch on the (110) silicon wafer substrate to form a diffraction grating structure that is etched into the (110) silicon wafer substrate.

Abstract: A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom surface of the Si device layer. This bottom silicon surface is then exposed so that in a crystallographic etch, the resulting shape is a re-entrant trapezoid with facets These facets can be used in conjunction with planar silicon waveguides to reflect the light upwards based on the TIR principle. Alternately, light can be coupled into the silicon waveguides from above the wafer for such purposes as wafer level testing.

Abstract: Described herein are an apparatus, system, and method for providing a vertical optical coupler (VOC) for planar photonics circuits such as photonics circuits fabricated on silicon-on-insulator (SOI) wafers. In one embodiment, the VOC comprises a waveguide made from a material having refractive index in a range of 1.45 to 3.45, the waveguide comprising: a first end configured to reflect light nearly vertical by total internal reflection between the waveguide and another medium, a second end to receive the light for reflection, and a third end to output the reflected light. The VOC couples with a Si waveguide having a first region including: a first end to receive light; and an inverted tapered end in the direction of light propagation to output the received light, wherein the inverted tapered end of the Si waveguide is positioned inside the waveguide.

Abstract: An efficient grating coupler for a semiconductor optical mode includes a tapered edge to couple light between waveguide modes constrained by differing waveguide thicknesses. An optical circuit or laser has a waveguide in a rib or strip waveguide section that is of different height (e.g., having different vertical constraints) than a waveguide section that has a grating coupler through which light passes off-circuit. The tapered edge can couple light between the two waveguide sections with very low loss and back-reflection. The low loss and minimal back-reflection enables testing of the photonics circuit on a wafer level, and improved performance through the grating coupler.

Abstract: Inverted 45° semiconductor mirrors as vertical optical couplers for PIC chips, particularly optical receivers and transmitters. An inverted 45° semiconductor mirror functions to couple light between a plane in the PIC chip defined by thin film layers and a direction normal to a top surface of the PIC chip where it may be generated or collected by an off-chip component, such as a wire terminal. In an exemplary embodiment, a (110) plane of a cubic crystalline semiconductor may provide a 45° facet inverted relative to a (100) surface of the semiconductor from which light is to be emitted. In further embodiments, a (110) plane may be exposed by undercutting a device layer of a semiconductor on insulator (SOI) substrate. Alternatively, a pre-etched substrate surface may be bonded to a handling wafer, thinned, and then utilized for PIC waveguide formation.

Abstract: Instead of monitoring the optical power coming out of a waveguide, a direct method of monitoring the optical power inside the waveguide without affecting device or system performance is provided. A waveguide comprises a p-i-n structure which induces a TPA-generated current and may be enhanced with reverse biasing the diode. The TPA current may be measured directly by probing metal contacts provided on the top surface of the waveguide, and may enable wafer-level testing. The p-i-n structures may be implemented at desired points throughout an integrated network, and thus allows probing of different devices for in-situ power monitor and failure analysis.

Abstract: A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom surface of the Si device layer. This bottom silicon surface is then exposed so that in a crystallographic etch, the resulting shape is a re-entrant trapezoid with facets These facets can be used in conjunction with planar silicon waveguides to reflect the light upwards based on the TIR principle. Alternately, light can be coupled into the silicon waveguides from above the wafer for such purposes as wafer level testing.

Abstract: A system having an optomechanical gyroscope device. An optomechanical disk acts as an optical ring resonator and a mechanical disk resonator. A drive laser generates an optical drive signal. A drive channel acts as a waveguide for the optical drive signal and includes drive electrodes in a first proximity with respect to the optomechanical disk. The drive electrodes to excite the ring by evanescent coupling. A drive photodetector is configured to receive an output optical signal from the drive channel. A sense laser generates a optical sense signal. A sense channel acts as a waveguide for the optical sense signal and includes sense electrodes in a second proximity with respect to the optomechanical disk. A sense photodetector is configured to receive an output optical signal from the sense channel.

Abstract: Photonic integrated circuit (PIC) chips with backside vertical optical coupler and packaging into an optical transmitter/receiver. A grating-based backside vertical optical coupler functions to couple light to/from a plane in the PIC chip defined by thin film layers through a bulk thickness of the PIC chip substrate to emit/collect via a backside surface of the PIC chip where it is to be coupled by an off-chip component, such as an optical fiber. Embodiments of a grating-based backside vertical optical coupler include a grating coupler with a grating formed in a topside surface of the thin film A reflector is disposed over the grating coupler to reflect light emitted from the grating coupler through the substrate to emit from the backside of the PIC chip or to reflect light collected from the backside of the PIC chip through the substrate and to the grating coupler.

Abstract: Optical modulator utilizing wafer bonding technology. An embodiment of a method includes etching a silicon on insulator (SOI) wafer to produce a first part of a silicon waveguide structure on a first surface of the SOI wafer, and preparing a second wafer, the second wafer including a layer of crystalline silicon, the second wafer including a first surface of crystalline silicon. The method further includes bonding the first surface of the second wafer with a thin oxide to the first surface of the SOI wafer using a wafer bonding technique, wherein a second part of the silicon waveguide structure is etched in the layer of crystalline silicon.

Abstract: A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom surface of the Si device layer. This bottom silicon surface is then exposed so that in a crystallographic etch, the resulting shape is a re-entrant trapezoid with facets These facets can be used in conjunction with planar silicon waveguides to reflect the light upwards based on the TIR principle. Alternately, light can be coupled into the silicon waveguides from above the wafer for such purposes as wafer level testing.

Abstract: Methods of forming microelectronic structures are described. Embodiments of those methods may include forming a photomask on a (110) silicon wafer substrate, wherein the photomask comprises a periodic array of parallelogram openings, and then performing a timed wet etch on the (110) silicon wafer substrate to form a diffraction grating structure that is etched into the (110) silicon wafer substrate.

Abstract: An efficient grating coupler for a semiconductor optical mode includes a tapered edge to couple light between waveguide modes constrained by differing waveguide thicknesses. An optical circuit or laser has a waveguide in a rib or strip waveguide section that is of different height (e.g., having different vertical constraints) than a waveguide section that has a grating coupler through which light passes off-circuit. The tapered edge can couple light between the two waveguide sections with very low loss and back-reflection. The low loss and minimal back-reflection enables testing of the photonics circuit on a wafer level, and improved performance through the grating coupler.