Patents by Inventor Hajime Hamada
Hajime Hamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8009756Abstract: A peak suppressing and restoring method includes suppressing a peak of a signal, starting suppression when a suppression start value is lower than a suppression target value, using a function of a gain characteristic such that a peak amplitude value attains the suppression target value, and restoring the suppressed peak of the signal using an inverse function of the function of the gain characteristic.Type: GrantFiled: June 5, 2009Date of Patent: August 30, 2011Assignee: Fujitsu LimitedInventors: Hiroyoshi Ishikawa, Hajime Hamada, Nobukazu Fudaba, Yuichi Utsunomiya, Kazuo Nagatani
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Publication number: 20110187454Abstract: An apparatus includes: a unit that stores the look-up table including distortion compensation coefficients; a unit that selects addresses according to an input signal, acquires coefficients stored at the selected addresses, and performs the predistortion of the input signal by using the acquired coefficients; a unit that calculates an error signal by comparing with the input signal a feedback signal that indicates an output of a power amplifier to which a result of the predistortion is inputted; a unit that calculates coefficients from the error signal and the acquired coefficients by using the adaptive algorithm; a unit that, for each of the selected addresses, selects coefficients as adequate coefficients from among the calculated coefficients according to the error signal; and a unit that, for each of the selected addresses, calculates an average value of the adequate coefficients and replaces a stored coefficient in the look-up table with the average value.Type: ApplicationFiled: January 21, 2011Publication date: August 4, 2011Applicant: FUJITSU LIMITEDInventors: Nobukazu FUDABA, Hiroyoshi ISHIKAWA, Hajime HAMADA, Yuichi UTSUNOMIYA, Kazuo NAGATANI
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Patent number: 7991073Abstract: A distortion compensation apparatus includes a distortion compensation unit that performs distortion compensation processing on a transmission signal by a series operation, a coefficient update unit that updates a group of series operation coefficients used for the series operation based on a feedback signal of transmission signal output that is output after power amplification processing is performed on output of the distortion compensation unit and the transmission signal, an initial coefficient memory that stores the groups of series operation coefficients that become initial values for coefficient update processing by the coefficient update unit, and a power fluctuation detection unit that detects a power fluctuation of the transmission signal and, when the power fluctuation is detected, reads the groups of series operation coefficients from the initial coefficient memory and provides the groups of series operation coefficients to the coefficient update unit.Type: GrantFiled: December 16, 2009Date of Patent: August 2, 2011Assignee: Fujitsu LimitedInventors: Yuichi Utsunomiya, Hajime Hamada, Hiroyoshi Ishikawa, Nobukazu Fudaba, Kazuo Nagatani
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Patent number: 7983636Abstract: A bias control signal generation unit detects ON and OFF of a transmission signal input to an amplifier and having a property of a burst according to burst information. The bias control signal generation unit controls a bias voltage to be applied to an amplifier such that an idle current flowing through the amplifier can be flowing in a larger amount in a transmission OFF period, and can return to a normal level in a transmission ON period.Type: GrantFiled: December 18, 2009Date of Patent: July 19, 2011Assignee: Fujitsu LimitedInventors: Hiroyoshi Ishikawa, Nobukazu Fudaba, Hajime Hamada, Kazuo Nagatani, Yasuhito Funyu, Norio Tozawa, Tokuro Kubo
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Patent number: 7969205Abstract: A technique wherein when signals, the modulation schemes of which are different, are to be combined, performing the peak suppression using amounts of the respective modulation schemes can effectively reduce the PAPR of a resulting combined signal. A peak suppressing method for use in a peak suppressing circuit, which combines input signals of different modulation schemes in a time domain to provide a combined signal, comprises detecting, as a peak, that portion of the combined signal which excesses a threshold value to generate a peak signal in accordance with the peak; converting the peak signal into a frequency domain signal and then dividing it into signals originating from the input signals to use these input-signal-originated signals as respective suppression signals; and adding, to the input signals, the suppression signals having different suppression amounts for the respective modulation schemes, thereby performing the peak suppression.Type: GrantFiled: October 9, 2009Date of Patent: June 28, 2011Assignee: Fujitsu LimitedInventors: Kazuo Nagatani, Hajime Hamada, Hiroyoshi Ishikawa, Nobukazu Fudaba, Yuichi Utsunomiya
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Patent number: 7920644Abstract: A predistortion apparatus for compensating for a distortion arising from a non linear property in input to output characteristics of an amplifier, by processing calculation of a plurality of coefficients for a plurality of power series defining the predistortion characteristics for a plurality of power ranges, respectively, the predistortion apparatus includes: a coefficient update unit for setting and updating coefficients of the power series to provide the predistortion characteristics for the plurality of power ranges in accordance with a comparison between the input and output of the amplifier; and a determination unit for determining at least one threshold value defining the plurality of power ranges by shifting the threshold value and operating the coefficient update unit for updating the coefficients for each of the power series corresponding to each of the power ranges defined by the shifted threshold value.Type: GrantFiled: December 18, 2009Date of Patent: April 5, 2011Assignee: Fujitsu LimitedInventors: Hajime Hamada, Hiroyoshi Ishikawa, Yuichi Utsunomiya, Kazuo Nagatani, Nobukazu Fudaba, Shohei Ishikawa
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Publication number: 20110053532Abstract: A radio communication device includes a power amplifier to amplify a transmit signal, a control unit to generate a voltage control signal for defining power to be supplied to the power amplifier in accordance with a conversion curve expressed using a polynomial series based on an envelope signal obtained from the transmit signal and determine the polynomial series based on an efficiency of the power amplifier, and a power source unit to supply the power to the power amplifier based on the voltage control signal, wherein the control unit divides an amplitude range of the envelope signal on the conversion curve into a plurality of sections and determines the polynomial series based on at least one of the plurality of sections.Type: ApplicationFiled: September 2, 2010Publication date: March 3, 2011Applicant: FUJITSU LIMITEDInventors: Nobukazu Fudaba, Hiroyoshi Ishikawa, Hajime Hamada, Yuichi Utsunomiya, Kazuo Nagatani
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Publication number: 20110053531Abstract: A disclosed transmission device includes a voltage control signal generating unit configured to generate a first voltage control signal from a transmission signal, an amplifier configured to amplify the transmission signal in response to the first voltage control signal, a first timing adjusting unit configured to adjust a control timing for the first voltage control signal, and a control timing setting unit configured to set the control timing adjusted by the first timing adjusting unit based on the output signal from the amplifier and the transmission signal.Type: ApplicationFiled: August 5, 2010Publication date: March 3, 2011Applicant: FUJITSU LIMITEDInventors: Yuichi Utsunomiya, Nobukazu Fudaba, Hiroyoshi Ishikawa, Hajime Hamada, Kazuo Nagatani
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Publication number: 20110038400Abstract: A wireless apparatus includes: an A/D converter which samples an in-phase signal component and a quadrature signal component from a quadrature-modulated signal of analog form alternately; a digital quadrature demodulation unit which applies digital quadrature demodulation to an output signal of the A/D converter and outputs an in-phase signal and a quadrature signal; and an error detection unit which, based on the in-phase and quadrature signals output from the digital quadrature demodulation unit, detects a time difference error between the sample timing of the in-phase signal component and the sample timing of the quadrature signal component.Type: ApplicationFiled: June 4, 2010Publication date: February 17, 2011Applicant: FUJITSU LIMITEDInventors: Hiroyoshi Ishikawa, Kazuo Nagatani, Hajime Hamada, Nobukazu Fudaba, Yuichi Utsunomiya, Takeshi Ohba, Hideharu Shako, Yasuhito Funyu
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Patent number: 7881404Abstract: A distortion correction control apparatus is for compensating for a burst distortion of a transmission amplifier caused by a burst of an input signal of a transmission target. The apparatus includes a generation unit that generates a distortion correction coefficient having reverse characteristics to the foregoing burst distortion; a unit that multiplies the distortion correction coefficient output from the generation unit by the input signal or adds the distortion correction coefficient output from the generation unit to the input signal, upon reception of burst information notifying of switching between presence and absence of the input signal; and an update unit that updates, based on the input signal and a branch signal fed back as an output signal of the transmission amplifier, parameters of functions used for adaptively generating the distortion correction coefficient, and that inputs the updated parameters to the generation unit.Type: GrantFiled: September 25, 2009Date of Patent: February 1, 2011Assignee: Fujitsu LimitedInventors: Hiroyoshi Ishikawa, Kazuo Nagatani, Hajime Hamada, Nobukazu Fudaba, Yuichi Utsunomiya, Yasuyuki Oishi
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Patent number: 7860185Abstract: A distortion compensating apparatus has an adaptive distortion compensating unit to compensate nonlinear distortion by controlling an input signal of a nonlinear distortion circuit by using an adaptive algorithm so as to reduce an error between a reference signal and a feedback signal from the nonlinear distortion circuit; and an adaptive equalizer connected between the adaptive distortion compensating unit and the nonlinear distortion circuit or provided in front of the adaptive distortion compensating unit. The adaptive equalizer includes a digital filter to form an amplitude characteristic and a phase characteristic of the input signal on the basis of a filter coefficient group that is set to the digital filter; a memory to hold in advance the filter coefficient group; and a control unit to control reading of the filter coefficient group from the memory on the basis of the input signal and the feedback signal.Type: GrantFiled: December 12, 2008Date of Patent: December 28, 2010Assignee: Fujitsu LimitedInventors: Yuichi Utsunomiya, Hiroyoshi Ishikawa, Nobukazu Fudaba, Hajime Hamada, Kazuo Nagatani
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Patent number: 7856069Abstract: A distortion compensation apparatus includes an amplifier for amplifying an input signal, a calculation unit for obtaining a distortion compensation coefficient of the amplifier corresponding to an amplitude level of the input signal, based on the input signal input to the amplifier and an output signal output from the amplifier, a memory for storing the distortion compensation coefficient, obtained by the calculation unit, into a write address being made to correspond to the input signal amplitude level, a distortion compensation processing unit for reading out the distortion compensation coefficient from the readout address of the memory, and for performing distortion compensation processing of the input signal using the distortion compensation coefficient, and an address generator for generating the write address and the readout address, based on the input signal amplitude level.Type: GrantFiled: March 27, 2008Date of Patent: December 21, 2010Assignee: Fujitsu LimitedInventors: Kazuo Nagatani, Hiroyoshi Ishikawa, Nobukazu Fudaba, Hajime Hamada, Tokuro Kubo
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Patent number: 7839949Abstract: The present invention provides a peak suppression method, including a first step for detecting characteristic information of a peak part of a transmission signal; and a second step for changing a suppression method for the peak part based on the characteristic information.Type: GrantFiled: July 7, 2006Date of Patent: November 23, 2010Assignee: Fujitsu LimitedInventors: Hajime Hamada, Tokuro Kubo, Kazuo Nagatani, Hiroyoshi Ishikawa, Nobukazu Fudaba
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Patent number: 7804914Abstract: A radio transmission apparatus executing peak suppression processing to an input signal in at least two stages, includes a first peak detector detecting a first peak, a maximum peak among peaks exceeding a first threshold, for a plurality of envelopes included in a predetermined input signal section; a second peak detector detecting a second peak exceeding a second threshold, on the basis of each input signal envelope; a first peak suppression unit suppressing the predetermined input signal section to the limit of a first level based on the first peak; a modulation signal generation unit generating a modulated signal modulated from the input signal suppressed by the first peak suppression unit; and a second peak suppression unit suppressing the second peak to the limit of a second level by each modulated signal envelope based on the first level and the second peak.Type: GrantFiled: March 24, 2008Date of Patent: September 28, 2010Assignee: Fujitsu LimitedInventors: Kazuo Nagatani, Hiroyoshi Ishikawa, Nobukazu Fudaba, Hajime Hamada, Tokuro Kubo
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Publication number: 20100237937Abstract: A power amplifying device includes an amplifier that amplifies a signal which is input in accordance with a voltage signal which is supplied to the amplifier, a voltage control section that controls the voltage signal in accordance with a transmission signal, a distortion compensating section that executes a distortion compensating process on the transmission signal by giving a value indicative of a reverse characteristic of the amplifier to the transmission signal in advance and inputs an output signal obtained by executing the distortion compensating process into the amplifier, an amplitude detecting section that detects an amplitude of the transmission signal, and a timing adjusting section that adjusts timings of the output signal and the voltage signal so that a value relating to the distortion compensating process meets a given condition when a detected value of the amplitude of the transmission signal is less than a given value.Type: ApplicationFiled: March 9, 2010Publication date: September 23, 2010Applicant: FUJITSU LIMITEDInventors: Kazuo NAGATANI, Hiroyoshi ISHIKAWA, Nobukazu FUDABA, Shohei ISHIKAWA, Hajime HAMADA, Yuichi UTSUNOMIYA
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Publication number: 20100219889Abstract: A distortion compensation apparatus includes a distortion compensation signal generation unit that performs, on a transmission signal, distortion compensation processing using a series operation; a coefficient updating unit that updates series operation coefficients used for the series operation based on a feedback signal of a power amplification output which is output through power amplification processing of a distortion compensation signal output from the distortion compensation signal generation unit, and based on the distortion compensation signal; a memory that stores the distortion compensation signal corresponding to a transmission signal having a given power value and the feedback signal of the power amplification output as restraint information; and a control unit that performs control so that, in accordance with the power value of the transmission signal, restraint information corresponding to a power value different from the power value of the transmission signal is read and used for updating theType: ApplicationFiled: February 8, 2010Publication date: September 2, 2010Applicant: FUJITSU LIMITEDInventors: Kazuo NAGATANI, Yuichi UTSUNOMIYA, Hajime HAMADA, Hiroyoshi ISHIKAWA, Nobukazu FUDABA, Shohei ISHIKAWA
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Patent number: 7782153Abstract: A timing adjusting method detects a phase error between a main signal path from which a transmitting signal is obtained and a control signal path from which a voltage control signal is obtained, based on a to-be-amplified signal that is to be amplified and represents an amplitude or a power of the transmitting signal prior to amplification and a feedback signal that represents an amplitude or a power of the transmitting signal after the amplification, adjusts an amount of delay of at least one of the main signal path and the control signal path so as to mutually cancel the phase error, and amplifies the transmitting signal from the main signal path depending on the voltage control signal from the control signal path. The detecting the phase error may include detecting polarity transition points of a slope of a waveform of the to-be-amplified signal or the feedback signal, and measuring the phase error using the detected polarity transition points.Type: GrantFiled: May 5, 2006Date of Patent: August 24, 2010Assignee: FUJITSU LIMITEDInventors: Kazuo Nagatani, Hiroyoshi Ishikawa, Nobukazu Fudaba, Hajime Hamada, Tokuro Kubo
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Publication number: 20100194474Abstract: A predistorter includes a distortion compensating unit which gives, in advance, a reverse characteristic of a characteristic of input to output of a power amplifier to a transmission signal which is to be input to the power amplifier; a distortion compensation signal generating unit which generates a distortion compensation signal indicating the reverse characteristic based on transmission data that is sample data of the transmission signal and the delayed transmission data; and a delay amount control unit which controls a delay amount of the transmission data according to an output signal of the power amplifier.Type: ApplicationFiled: January 26, 2010Publication date: August 5, 2010Applicant: FUJITSU LIMITEDInventors: Hiroyoshi ISHIKAWA, Hajime HAMADA, Nobukazu FUDABA, Yuichi UTSUNOMIYA, Shohei ISHIKAWA, Kazuo NAGATANI
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Patent number: 7756216Abstract: As in a conventional technology, a hard clipping process and a filtering process are performed on a transmission signal. An original transmission signal is subtracted from a signal on which the processes have been performed, and an inverse sign signal to the suppressed signal is retrieved. By giving a gain to the signal, and adding up to the original transmission signal, a peak voltage is suppressed. The gain can be a ratio of a difference signal between a hard clipped signal and an original transmission signal to a signal of suppression of a filtered signal from the original transmission signal, or a value determined by a simulation depending on the cutoff frequency of a low pass filter used in the filtering process.Type: GrantFiled: May 31, 2006Date of Patent: July 13, 2010Assignee: Fujitsu LimitedInventors: Hiroyoshi Ishikawa, Hajime Hamada, Kazuo Nagatani, Nobukazu Fudaba, Tokuro Kubo
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Publication number: 20100164620Abstract: A predistortion apparatus for compensating for a distortion arising from a non linear property in input to output characteristics of an amplifier, by processing calculation of a plurality of coefficients for a plurality of power series defining the predistortion characteristics for a plurality of power ranges, respectively, the predistortion apparatus includes: a coefficient update unit for setting and updating coefficients of the power series to provide the predistortion characteristics for the plurality of power ranges in accordance with a comparison between the input and output of the amplifier; and a determination unit for determining at least one threshold value defining the plurality of power ranges by shifting the threshold value and operating the coefficient update unit for updating the coefficients for each of the power series corresponding to each of the power ranges defined by the shifted threshold value.Type: ApplicationFiled: December 18, 2009Publication date: July 1, 2010Applicant: FUJITSU LIMITEDInventors: Hajime Hamada, Hiroyoshi Ishikawa, Yuichi Utsunomiya, Kazuo Nagatani, Nobukazu Fudaba, Shohei Ishikawa