Patents by Inventor Hajime Sakamoto

Hajime Sakamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9245838
    Abstract: A multilayer device has a resin layer, a semiconductor device positioned in the resin layer and including an electronic component and a passivation layer having an opening exposing an electrode of the electronic component, an intermediate layer including metal layers and formed in the opening of the passivation layer such that the intermediate layer is connected to the electrode of the electronic component, and a buildup layer formed on the resin layer and including an insulating layer and a via conductor formed in the insulating layer such that the via conductor is connected to the intermediate layer. The resin layer includes one or more resin material selected from the group consisting of a thermosetting resin material and a thermoplastic resin material.
    Type: Grant
    Filed: January 21, 2015
    Date of Patent: January 26, 2016
    Assignee: IBIDEN CO., LTD.
    Inventors: Hajime Sakamoto, Dongdong Wang
  • Publication number: 20150274911
    Abstract: The invention provides a prepreg comprising: a primary prepreg composed of reinforcing fibers and a resin composition (I) impregnating the interior of a reinforcing fiber layer formed from these fibers; and a surface layer composed of a resin composition (II) formed on one or both sides of the primary prepreg; wherein the resin composition (I) is an epoxy resin composition [B] containing at least an epoxy resin and a thermoplastic resin, and the resin composition (II) is an epoxy resin composition [A] containing at least an epoxy resin and conductive particles.
    Type: Application
    Filed: September 25, 2013
    Publication date: October 1, 2015
    Inventors: Takaya Suzuki, Hajime Sakamoto, Toyoaki Ishiwata, Yoshitaka Umemoto
  • Publication number: 20150223318
    Abstract: A multilayer wiring board includes a first insulating layer, first conductor patterns formed on the first insulating layer, and a wiring structure formed on the first insulating layer and including a heat sink and second conductor patterns formed on the heat sink such that the wiring structure is positioned adjacent to the first conductor patterns on the first insulating layer.
    Type: Application
    Filed: January 30, 2015
    Publication date: August 6, 2015
    Applicant: IBIDEN CO., LTD.
    Inventor: Hajime SAKAMOTO
  • Publication number: 20150130079
    Abstract: A multilayer device has a resin layer, a semiconductor device positioned in the resin layer and including an electronic component and a passivation layer having an opening exposing an electrode of the electronic component, an intermediate layer including metal layers and formed in the opening of the passivation layer such that the intermediate layer is connected to the electrode of the electronic component, and a buildup layer formed on the resin layer and including an insulating layer and a via conductor formed in the insulating layer such that the via conductor is connected to the intermediate layer. The resin layer includes one or more resin material selected from the group consisting of a thermosetting resin material and a thermoplastic resin material.
    Type: Application
    Filed: January 21, 2015
    Publication date: May 14, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Hajime SAKAMOTO, Dongdong Wang
  • Patent number: 8997344
    Abstract: A method for manufacturing an interposer including forming a first insulating layer comprising an inorganic material on a supporting substrate, forming a first wire in the first insulating layer, forming a second insulating layer on a first side of the first insulating layer, forming a second wire with a longer wire length and a greater thickness than the first wire on the second insulating layer, and removing the supporting substrate.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: April 7, 2015
    Assignee: Ibiden Co., Ltd.
    Inventors: Hajime Sakamoto, Shuichi Kawano, Daiki Komatsu, Hiroshi Segawa
  • Patent number: 8959756
    Abstract: A method of manufacturing a core substrate having an electronic component, including providing a core substrate having a first surface and a second surface on an opposite side of the first surface, forming a through hole extending from the first surface to the second surface in the core substrate, attaching an adhesive tape to the second surface of the core substrate such that the through hole formed in the core substrate is closed on the second surface, attaching an electronic component to the adhesive tape inside the through hole, filling the through hole with a filler, and removing the adhesive tape from the second surface of the core substrate.
    Type: Grant
    Filed: November 19, 2008
    Date of Patent: February 24, 2015
    Assignee: IBIDEN Co., Ltd.
    Inventors: Hajime Sakamoto, Dongdong Wang
  • Patent number: 8822323
    Abstract: A method of manufacturing a semiconductor device having a transition layer, including (a) forming a wiring and a die pad on a wafer, (b) forming a thin film layer on an entire surface of the wafer obtained in the step (a), (c) forming a resist layer on the thin film layer, and forming a thickening layer on a resist layer unformed section, (d) peeling the resist layer, (e) removing the thin film layer by etching, and (f) dividing the wafer to thereby form semiconductor devices.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: September 2, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Hajime Sakamoto, Dongdong Wang
  • Patent number: 8524535
    Abstract: A transition layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and a sealing resin. Also, by providing the transition layer 38 made of copper on an aluminum pad 24, it is possible to prevent a resin residue on the pad 24 and to improve connection characteristics between the die pad 24 and a via hole 60 and reliability.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: September 3, 2013
    Assignee: IBIDEN Co., Ltd.
    Inventors: Hajime Sakamoto, Dongdong Wang
  • Publication number: 20130177714
    Abstract: A method for manufacturing a printed wiring board includes forming an interlayer insulation layer on a conductive circuit, applying laser to a portion of the interlayer insulation layer such that an opening reaching to the conductive circuit is formed for a via conductor, subjecting the opening to a plasma treatment using a processing gas which includes a reactive gas including a fluorovinyl ether gas having a double bond of two carbon atoms and a fluoroalkyl ether group, forming an upper conductive circuit on the interlayer insulation layer, and forming a via conductor in the opening such that the via conductor connects the conductive circuit and the upper conductive circuit.
    Type: Application
    Filed: June 28, 2012
    Publication date: July 11, 2013
    Applicants: National University Corporation Nagoya University, IBIDEN CO., Ltd.
    Inventors: Yoshiyuki IWATA, Masaru HORI, Hajime SAKAMOTO
  • Patent number: 8453323
    Abstract: A method for manufacturing a printed circuit board, including providing a core substrate having an electronic component accommodated in the core substrate; forming a positioning mark on the core substrate; forming an interlayer insulating layer over the core substrate, the positioning mark and the electronic component; forming a via hole opening connecting to the electronic component through the interlayer insulating layer in accordance with the positioning mark on the core substrate; and forming a via hole structure in the via hole opening in the interlayer insulating layer such that the via hole structure is electrically connected to the electronic component.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: June 4, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Hajime Sakamoto, Tadashi Sugiyama, Dongdong Wang, Takashi Kariya
  • Patent number: 8438727
    Abstract: A method of manufacturing a multilayer printed circuit board having interlayer insulating layers and conductor layers repeatedly formed on a substrate, via holes formed in the interlayer insulating layers, and establishing electrical connection through the via holes, including containing an electronic component in said substrate, forming a positioning mark on said substrate based on a positioning mark of said electronic component, and conducting working or formation based on the positioning mark of said substrate.
    Type: Grant
    Filed: October 1, 2009
    Date of Patent: May 14, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Hajime Sakamoto, Tadashi Sugiyama, Dongdong Wang, Takashi Kariya
  • Patent number: 8293579
    Abstract: A transition layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and a sealing resin. Also, by providing the transition layer 38 made of copper on an aluminum pad 24, it is possible to prevent a resin residue on the pad 24 and to improve connection characteristics between the die pad 24 and a via hole 60 and reliability.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: October 23, 2012
    Assignee: IBIDEN Co., Ltd.
    Inventors: Hajime Sakamoto, Dongdong Wang
  • Patent number: 8188378
    Abstract: An interposer having a support substrate, a first insulation layer made of an inorganic material and formed over the support substrate, and a second insulation layer formed over the first insulation layer. The first insulation layer has a first land, a second land and a first wiring electrically connecting the first land and the second land. The second insulation layer has a first pad positioned to load a first electronic component, a second pad positioned to load a second electronic component, a second wiring electrically connected to the second pad, a first via conductor electrically connecting the first land and the first pad, and a second via conductor electrically connecting the second land and the second wiring. The first wiring and second wiring electrically connect the first pad and the second pad, and the second wiring has a lower wiring resistance per unit length than the first wiring.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: May 29, 2012
    Assignee: Ibiden Co., Ltd.
    Inventors: Hajime Sakamoto, Shuichi Kawano, Daiki Komatsu, Toshiki Furutani, Hiroshi Segawa
  • Patent number: 8186045
    Abstract: A method of manufacturing a multilayer printed circuit board, including providing a substrate, embedding an electronic component having a die pad on a surface of the component into the substrate such that the component has the surface and pad exposed from a surface of the substrate, forming a metallic layer including metallic film layers such that the surface of the substrate and the pad and surface of the component are covered with the metallic layer, providing a resist on the metallic layer such that a portion of the metallic layer on the pad is exposed from the resist, forming a thickening metallic layer on the portion of the metallic layer exposed, removing the resist from the substrate and surface of the component, and etching to remove the metallic layer such that a mediate layer including the portion of the metallic layer is formed between the pad and the thickening layer.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: May 29, 2012
    Assignee: Ibiden Co., Ltd.
    Inventors: Hajime Sakamoto, Tadashi Sugiyama, Dongdong Wang, Takashi Kariya
  • Patent number: 8178790
    Abstract: An interposer and a method of manufacturing the same are provided. The interposer includes a substrate and a conductor portion formed inside the substrate. At least one insulating layer is formed on the substrate and on the conductor portion. A signal wiring portion is formed inside the insulating layer or on the insulating layer. A first pad is configured to receive an electronic part, and is formed on an outermost insulating layer of the at least one insulating layer. A connection conductor is formed in the at least one insulating layer so as to electrically connect the conductor portion to the first pad.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: May 15, 2012
    Assignee: Ibiden Co., Ltd.
    Inventors: Toshiki Furutani, Atsushi Sakai, Kiyohisa Hasegawa, Hiroshi Segawa, Shuichi Kawano, Hajime Sakamoto
  • Patent number: 8173907
    Abstract: An interposer includes a first insulating layer made of an inorganic material and having a first land, a second land and a first wiring electrically connecting the first land and the second land, and a second insulating layer formed over a first surface of the first insulating layer and having a second wiring, a second pad for loading a second electronic component over the second insulating layer and a first via conductor electrically connecting the second land and the second wire. The first wiring and the second wiring electrically connect the first land and the second pad. The first land and second land are positioned such that a first electronic component is mounted over a second surface of the first insulating layer on the opposite side of the first surface. The second wiring has a longer wiring length and a greater thickness than the first wiring.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: May 8, 2012
    Assignee: Ibiden Co., Ltd.
    Inventors: Hajime Sakamoto, Shuichi Kawano, Daiki Komatsu, Hiroshi Segawa
  • Publication number: 20120000068
    Abstract: A method for manufacturing a printed circuit board, including providing a core substrate having an electronic component accommodated in the core substrate; forming a positioning mark on the core substrate; forming an interlayer insulating layer over the core substrate, the positioning mark and the electronic component; forming a via hole opening connecting to the electronic component through the interlayer insulating layer in accordance with the positioning mark on the core substrate; and forming a via hole structure in the via hole opening in the interlayer insulating layer such that the via hole structure is electrically connected to the electronic component.
    Type: Application
    Filed: September 16, 2011
    Publication date: January 5, 2012
    Applicant: IBIDEN CO., LTD.
    Inventors: Hajime SAKAMOTO, Tadashi Sugiyama, Dongdong Wang, Takashi Kariya
  • Patent number: 8079142
    Abstract: A method for manufacturing a printed circuit board, including providing a core substrate and an electronic component contained in the core substrate, the electronic component having a die pad, forming a positioning mark on the core substrate, forming an interlayer insulating layer over the core substrate and the electronic component, forming a via hole opening connecting to the die pad of the electronic component through the interlayer insulating layer in accordance with the positioning mark on the core substrate, and forming a via hole structure in the via hole opening in the interlayer insulating layer such that the via hole structure is electrically connected to the die pad.
    Type: Grant
    Filed: November 19, 2008
    Date of Patent: December 20, 2011
    Assignee: Ibiden Co., Ltd.
    Inventors: Hajime Sakamoto, Tadashi Sugiyama, Dongdong Wang, Takashi Kariya
  • Patent number: 8067699
    Abstract: An intermediate layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and a sealing resin. Also, by providing the intermediate layer 38 made of copper on an aluminum pad 24, it is possible to prevent a resin residue on the pad 24 and to improve connection characteristics between the die pad 24 and a via hole 60 and reliability.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: November 29, 2011
    Assignee: Ibiden Co., Ltd.
    Inventors: Hajime Sakamoto, Dongdong Wang
  • Patent number: 8058563
    Abstract: An interposer includes an inorganic insulating layer, a first wiring formed in or on a surface of the inorganic insulating layer, an organic insulating layer formed over the inorganic insulating layer and on the first wiring, a second wiring formed on the organic insulating layer, and a conductor portion connecting the first wiring and the second wiring.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: November 15, 2011
    Assignee: Ibiden Co., Ltd.
    Inventors: Hajime Sakamoto, Toshiki Furutani, Hiroshi Segawa