Patents by Inventor Hajime Yamaguchi

Hajime Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220151086
    Abstract: According to one embodiment, a display device includes a first submodule having a display panel, a second submodule having a cover member located on the display panel, and a first decoupling layer located between the first submodule and the second submodule, and each of the first submodule and the second submodule has a single neutral plane.
    Type: Application
    Filed: January 27, 2022
    Publication date: May 12, 2022
    Applicant: Japan Display Inc.
    Inventors: Hajime YAMAGUCHI, Yasushi TOMIOKA
  • Patent number: 11277926
    Abstract: According to one embodiment, a display device includes a first submodule having a display panel, a second submodule having a cover member located on the display panel, and a first decoupling layer located between the first submodule and the second submodule, and each of the first submodule and the second submodule has a single neutral plane.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: March 15, 2022
    Assignee: JAPAN DISPLAY INC.
    Inventors: Hajime Yamaguchi, Yasushi Tomioka
  • Publication number: 20200305294
    Abstract: According to one embodiment, a display device includes a first submodule having a display panel, a second submodule having a cover member located on the display panel, and a first decoupling layer located between the first submodule and the second submodule, and each of the first submodule and the second submodule has a single neutral plane.
    Type: Application
    Filed: June 10, 2020
    Publication date: September 24, 2020
    Applicant: Japan Display Inc.
    Inventors: Hajime YAMAGUCHI, Yasushi TOMIOKA
  • Publication number: 20200303490
    Abstract: According to one embodiment, a display device includes a substrate, a first organic film, wiring lines, a second organic film, and a first inorganic film. The substrate has a first area including a display area, a second area including a mounting area, and a third area located between the first area and the second area. The first organic film is disposed on the substrate in the third area. The wiring lines are arranged at intervals in a first direction on the first organic film and extend in a second direction crossing the first direction. The second organic film covers the first organic film and the wiring lines in the third area. The first inorganic film is disposed on the second organic film.
    Type: Application
    Filed: June 11, 2020
    Publication date: September 24, 2020
    Applicant: Japan Display Inc.
    Inventors: Yasushi TOMIOKA, Hajime Yamaguchi
  • Patent number: 10573709
    Abstract: According to one embodiment, there is provided a display device which includes an insulating substrate having a bend area, and a wiring line located in the bend area. The bend area is bent about a bend axis extending in a first direction. The wiring line in the bend area has a first portion which extends in the first direction and a second portion which extends in a direction intersecting the first portion and is connected to the first portion. A first angle formed by the first portion and the second portion is less than 90 degrees.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: February 25, 2020
    Assignee: Japan Display Inc.
    Inventors: Yasushi Tomioka, Hajime Yamaguchi
  • Patent number: 10514563
    Abstract: According to one embodiment, a display device includes a first substrate and an external circuit, the first substrate including a first area, a second area, and wirings, the first area including a display area in which pixels are arranged the external circuit being mounted on the second area. The wirings are electrically connected to the external circuit, provided in the first area and the second area, and arranged in the first direction. At least one of the wirings is inclined with respect to a second direction orthogonal to the first direction in a first portion of the second area. The first substrate is bent in the first portion.
    Type: Grant
    Filed: April 4, 2019
    Date of Patent: December 24, 2019
    Assignee: Japan Display Inc.
    Inventors: Yasushi Tomioka, Hajime Yamaguchi
  • Patent number: 10459264
    Abstract: According to one embodiment, a display device includes a first substrate including a first area and a second area, the first area including a display area where pixels are arranged, and the second area being adjacent to the first area and where wirings are arranged, wherein the wirings are covered with a protection layer, the second area includes a peripheral area and a central area in an arrangement direction of the wirings, and a thickness of at least one of the first substrate and the protection layer varies between the peripheral area and the central area.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: October 29, 2019
    Assignee: Japan Display Inc.
    Inventors: Yasushi Tomioka, Hajime Yamaguchi
  • Patent number: 10418436
    Abstract: According to one embodiment, a display device includes an insulating substrate having a display area, a pad area and a bend area, wiring lines, a first protective film and a second protective film. The wiring lines are elongated from the display area to the pad area. The first protective film is located on the insulating substrate and the wiring lines. The second protective film is located on the first protective film and is formed of an organic insulating material different from that of the first protective film.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: September 17, 2019
    Assignee: Japan Display Inc.
    Inventors: Yasushi Tomioka, Hajime Yamaguchi
  • Publication number: 20190227367
    Abstract: According to one embodiment, a display device includes a first substrate and an external circuit, the first substrate including a first area, a second area, and wirings, the first area including a display area in which pixels are arranged the external circuit being mounted on the second area. The wirings are electrically connected to the external circuit, provided in the first area and the second area, and arranged in the first direction. At least one of the wirings is inclined with respect to a second direction orthogonal to the first direction in a first portion of the second area. The first substrate is bent in the first portion.
    Type: Application
    Filed: April 4, 2019
    Publication date: July 25, 2019
    Applicant: Japan Display Inc
    Inventors: Yasushi TOMIOKA, Hajime YAMAGUCHI
  • Patent number: 10302980
    Abstract: According to one embodiment, a display device includes a first substrate and an external circuit, the first substrate including a first area, a second area, and wirings, the first area including a display area in which pixels are arranged the external circuit being mounted on the second area. The wirings are electrically connected to the external circuit, provided in the first area and the second area, and arranged in the first direction. At least one of the wirings is inclined with respect to a second direction orthogonal to the first direction in a first portion of the second area. The first substrate is bent in the first portion.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: May 28, 2019
    Assignee: Japan Display Inc.
    Inventors: Yasushi Tomioka, Hajime Yamaguchi
  • Publication number: 20190051858
    Abstract: According to one embodiment, a display device includes a display panel including a first area including a display area, a second area including a terminal portion and a third area located between the first area and the second area and a cover member adhered to the first area via an adhesive layer, and the display panel is bent in the third area so that the first area and the second area oppose each other on a side opposite to the cover member, and the third area is adhered to the cover member by a first resin.
    Type: Application
    Filed: August 10, 2018
    Publication date: February 14, 2019
    Applicant: Japan Display Inc.
    Inventors: Yasushi TOMIOKA, Hajime YAMAGUCHI, Akio MURAYAMA
  • Publication number: 20180366534
    Abstract: According to one embodiment, there is provided a display device which includes an insulating substrate having a bend area, and a wiring line located in the bend area. The bend area is bent about a bend axis extending in a first direction. The wiring line in the bend area has a first portion which extends in the first direction and a second portion which extends in a direction intersecting the first portion and is connected to the first portion. A first angle formed by the first portion and the second portion is less than 90 degrees.
    Type: Application
    Filed: June 14, 2018
    Publication date: December 20, 2018
    Applicant: Japan Display Inc.
    Inventors: Yasushi Tomioka, Hajime Yamaguchi
  • Publication number: 20180337367
    Abstract: According to one embodiment, a display device includes an insulating substrate having a display area, a pad area and a bend area, wiring lines, a first protective film and a second protective film. The wiring lines are elongated from the display area to the pad area. The first protective film is located on the insulating substrate and the wiring lines. The second protective film is located on the first protective film and is formed of an organic insulating material different from that of the first protective film.
    Type: Application
    Filed: May 11, 2018
    Publication date: November 22, 2018
    Applicant: Japan Display Inc.
    Inventors: Yasushi TOMIOKA, Hajime YAMAGUCHI
  • Patent number: 10032421
    Abstract: According to one embodiment, a liquid display device includes a liquid crystal display panel provided with pixel which includes pixel electrode, and has gradation values that vary, a driver which drives the pixel electrode, and a processor which supplies, if the gradation value of the pixel varies, the driver with a correction image signal based on an addition image signal in which a voltage based on the gradation value and a compensation voltage are added. The compensation voltage is based on pixel capacitances prior to and subsequent to variation of the gradation value and a voltage subsequent to the variation of the gradation value.
    Type: Grant
    Filed: August 18, 2016
    Date of Patent: July 24, 2018
    Assignee: Japan Display Inc.
    Inventors: Hajime Yamaguchi, Yasushi Kawata, Akio Murayama
  • Publication number: 20170371195
    Abstract: According to one embodiment, a display device includes a first substrate and an external circuit, the first substrate including a first area, a second area, and wirings, the first area including a display area in which pixels are arranged the external circuit being mounted on the second area. The wirings are electrically connected to the external circuit, provided in the first area and the second area, and arranged in the first direction. At least one of the wirings is inclined with respect to a second direction orthogonal to the first direction in a first portion of the second area. The first substrate is bent in the first portion.
    Type: Application
    Filed: June 23, 2017
    Publication date: December 28, 2017
    Applicant: Japan Display Inc.
    Inventors: Yasushi TOMIOKA, Hajime YAMAGUCHI
  • Publication number: 20170371194
    Abstract: According to one embodiment, a display device includes a first substrate including a first area and a second area, the first area including a display area where pixels are arranged, and the second area being adjacent to the first area and where wirings are arranged, wherein the wirings are covered with a protection layer, the second area includes a peripheral area and a central area in an arrangement direction of the wirings, and a thickness of at least one of the first substrate and the protection layer varies between the peripheral area and the central area.
    Type: Application
    Filed: June 21, 2017
    Publication date: December 28, 2017
    Applicant: Japan Display Inc.
    Inventors: Yasushi TOMIOKA, Hajime YAMAGUCHI
  • Patent number: 9780220
    Abstract: According to one embodiment, a semiconductor device includes an oxide semiconductor transistor. The oxide semiconductor transistor includes a semiconductor layer including an oxide semiconductor, the semiconductor layer including a source region and a source electrode. The source electrode includes a source conductive layer including copper, a first tantalum-containing region provided between the source conductive layer and the source region, the first tantalum-containing region including tantalum, a first low nitrogen composition region provided between the first tantalum-containing region and the source region, the first low nitrogen composition region including Ta1?x1Nx1 (0<x1<0.5), and a first high nitrogen composition region provided between the first low nitrogen composition region and the source region, the first high nitrogen composition region including Ta1?x2Nx2 (0.5?x2<1).
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: October 3, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuya Maeda, Shintaro Nakano, Nobuyoshi Saito, Hajime Yamaguchi
  • Publication number: 20170255324
    Abstract: A card type device includes a base having flexibility and a display having flexibility arranged on the base. A first touch sensor arranged on a first surface of the base or the display, a second touch sensor arranged on a second surface of the base or the display, the second surface being on the opposite side of the first surface, and a control circuit connected to the first touch sensor and the second touch sensor may be further provided.
    Type: Application
    Filed: February 17, 2017
    Publication date: September 7, 2017
    Inventors: Shinichiro OKA, Hiroshi MIZUHASHI, Shinya IUCHI, Yoshitoshi KIDA, Shinichi TAKAYAMA, Takenori HIROTA, Yosuke HYODO, Takuma NISHINOHARA, Yasukazu KIMURA, Hajime YAMAGUCHI
  • Patent number: 9640718
    Abstract: According to one embodiment, a method for manufacturing a display element is disclosed. The method can include forming a peeling layer, forming a resin layer, forming a barrier layer, forming an interconnect layer, forming a display layer, and removing. The peeling layer is formed on a major surface of a base body. The major surface has first, second, and third regions. The peeling layer includes first, second, and third peeling portions. The resin layer is formed on the peeling layer. The resin layer includes first and second resin portions. The barrier layer is formed on the first, second, and third peeling portions. The interconnect layer is formed on the barrier layer. The display layer is formed on the interconnect layer. The first peeling portion is removed from the first resin portion and the second peeling portion is removed from the second resin portion.
    Type: Grant
    Filed: February 4, 2014
    Date of Patent: May 2, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kentaro Miura, Tatsunori Sakano, Tomomasa Ueda, Nobuyoshi Saito, Shintaro Nakano, Yuya Maeda, Hajime Yamaguchi
  • Patent number: 9614099
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer including a first semiconductor portion and a second semiconductor portion being continuous with the first semiconductor portion, a first gate electrode, a second gate electrode, an insulating film. The first semiconductor portion includes a first portion, a second portion and a third portion provided between the first portion and the second portion. The second semiconductor portion includes a fourth portion separated from the first portion, a fifth portion separated from the second portion, and a sixth portion provided between the forth portion and the fifth portion. The first gate electrode is separated from the third portion. The second gate electrode is separated from the sixth portion. The insulating film is provided at a first position between the first gate electrode and the semiconductor layer and at a second position between the second gate electrode and the semiconductor layer.
    Type: Grant
    Filed: August 8, 2014
    Date of Patent: April 4, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shintaro Nakano, Tomomasa Ueda, Kentaro Miura, Nobuyoshi Saito, Tatsunori Sakano, Yuya Maeda, Masaki Atsuta, Hajime Yamaguchi