Abstract: An apparatus for motion estimation with control part implemented by state transition diagram without adding delay circuits to processing elements, and capable of maintaining a regular data flow and easily implementing hardware to improve a power consume and speed is disclosed. The apparatus comprises a first and second storage parts for storing data; a measurement part for finding an absolute difference between the data; a step decision part for determining a minimum value; and a control part implemented by state transition diagram.

Abstract: The present invention relates to a turbo decoder having a state metric, a calculating method using the turbo decoder and a computer-readable recoding medium for executing a calculation method implemented to the turbo decoder. The turbo decoder includes branch metric calculation unit, state metric calculation unit and log likelihood ratio calculation unit. The present invention may reduce calculation steps by simplifying a conventional turbo decode algorithm, reducing a size of a hardware, which the turbo decoder can be implemented in as an application specific integrated circuit (ASIC) or a field programmable gate array (FPGA). The present invention can be implemented in an error correction in wireless communication system and satellite communication system.

Abstract: In an apparatus for a TFCI mapping in a wireless communication mobile station, and a method thereof, the apparatus includes an encoding unit for encoding a TFCI transmitted from a main control unit as a CPU; a TFCI mapping unit for generating necessary control parameter and a TFCI code by using a signal encoded by the encoding unit and a signal transmitted from the CPU; and a CPU for controlling the encoding unit and the mapping unit.

Abstract: In the apparatus and method for separating carrier of multicarrier wireless communication receiver system, each carrier separation is performed after a quantization in a wireless communication receiver system such as a received multicarrier CDMA (Code Division Multiple Access) etc., to thereby reduce the whole number of quantizers and separate multicarrier from a received signal.

Abstract: Disclosed are a turbo decoder, which applies a base-2 binary LogMAP algorithm in implementing a turbo decoder to thereby reduce the hardware requirement and implement a high-speed turbo decoder, which comprising a split for splitting the sum of two input state metrics into an integral and a decimal part; a comparator for comparing the integral parts of the two state metrics to extract a maximum and a minimum integer; a subtractor for obtaining a difference between the original integral part and the maximum or minimum integer value; a lookup table for calculating the sum of exponential terms of base-2 function in the decimal parts; a shifter for shifting only a decimal part with a smaller integral part by the difference; an adder for adding the decimal part and a decimal part with a larger integral part; a log pre-processing block for applying a base-2 logarithm on the decimal part to thereby obtain a final value for the decimal part; and an adder for adding the maximum integral value and the final value for t

Abstract: In the present invention, a reference block data within a current image from which a motion vector will be obtained and corresponding search region data within reproduced previous image are stored in a reference block and a search region data memory, respectively. A motion vector of two pixels unit is performed using the reference block and the search region data stored in the memory, thus resulting in obtained a motion vector of two pixels unit. At this time, the reference block and the search region data are used by performing 2:1 sampling in a horizontal direction and a vertical direction, respectively and the search range is −7˜+7. The structure of the motion search is consisted of a memory for storing a reference block (8×8) of current images and a memory (24×8) for storing a search region storing reproduced previous images.

Abstract: A finite impulse response filter of 1:4 interpolation with 108 taps for outputting filter output data of 8 bits with respect to filter input data of 4 bits includes four shifting and storing unit of 127 bits for unifying bits of filter input data of 4 bits, which is 2's complement to shift and store the bi-unified input data, first selection unit for selecting any one of the input data stored in the four shifting and storing unit of 27 bits, address generating unit for generating addresses of lookup tables corresponding to each of a plurality of filter coefficients groups, first to fourth lookup table groups for generating filter outputs of each filter coefficients group, four accumulating unit for shifting the filter outputs of the filter coefficients groups respectively outputted in parallel from the first to the fourth lookup table groups, and second selection unit for serially converting the outputs from each of the four accumulators in accordance with filter coefficients groups.

Abstract: A 108-tap 1:4 interpolation FIR filter device for digital mobile telecommunication having a single bit input is provided. The filter employs a look-up table minimum scheme and a pipeline structure in which the size of the entire look-up tables is significantly reduced by dividing four coefficient groups into three parts, respectively, and effectively using the symmetry of the 108-tap filter coefficient and the symmetry within the look-up table. Thus, the filter can simultaneously process 108-tap 1:4 interpolation FIR filter operations for a single input of four channels by means of a single filter without increase of an operating frequency.

Abstract: The present invention relates to a tuning circuit, more specifically to a tuning circuit for continuous-time filter capable of making exact the Gm value to minimize the variation of the cutoff frequency due to the variation of process in the Gm-C type of continuous-time filter.

Abstract: An error detection circuit for detecting errors occurring in a data obtained by decoding a compressed image data block by block in a line length decoding system, includes a first storage device for temporarily storing the run representing the number of zeros (‘0’s) in the compressed image data and an EOB signal externally inputted, a selection signal generator for generating a first and a second selection signal in response to the EOB signal supplied from the first storage device, a first selection circuit for selectively transferring the run supplied by the first storage device or ground signal according to the first selection signal, a second selection circuit for selectively transferring the run supplied by the first storage device or ground signal according to the second selection signal, a reference value generator for generating a reference value based on the output signal of the first selection circuit according to an operation control signal externally inputted, accumulator for accumulatin

Abstract: A wireless data communication apparatus using the diffused infrared-ray antennas comprising: a plurality of terminals having their own optical communication modules for transmitting and receiving infrared-ray signals, wherein the optical communication module includes a parabolic shaped infrared-ray antenna; and a repeater which receives the infrared-ray signals transmitted from the plurality of terminals and transmits the infrared-ray signals to the plurality of terminals, wherein the repeater includes a parabolic shaped infrared-ray antenna.

Abstract: A wire/wireless communication system includes two units for wire/wireless communication of information using a telephone network between two locations which are far away from each other. One of the two units is a data transmitting unit, such as a computer terminal, which is positioned at a first location and the other is a data receiving unit. To the units, infrared transceivers are coupled to transmit information as infrared radiation and receive the infrared radiation. Also, to the data transmitting and receiving units, telephones are connected. These telephones are interconnected by the telephone network therebetween and are respectively connected to transceivers. Wireless communication between the computer terminal of the data transmitting unit and the telephone which are positioned at the first location may be accomplished by the transceivers respectively coupled to them.

Abstract: A wireless communication system and process for transmission of data communications, may be practiced with a microprocessor, a memory, a controller, a selector and a communication block, and the effect of the wireless communication system for selecting a communication transmission method lies in the fact that a user can select a wireless communication device according to user's needs in a wireless communication device having at least one communication transmission method or a plurality of wireless communication devices having different communication transmission methods, using only one controller.

Abstract: A logic module for embodying a wide combination of logic and sequential logic in response to a user's demand is divided into a combination circuit part and a sequential circuit part. The combination circuit part is divided into a first stage including a first and a second two-input multiplexers and a second stage. The respective input terminals of the first and second multiplexers are connected to output terminals of two-input AND gates and a first and second input terminals of the two-input AND gates are data and inverted data to select the desired data state. The respective first and second multiplexers have select control input terminals which are connected to an output of an exclusive OR gate having two inputs.