Patents by Inventor Han-Wen Chen

Han-Wen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230148220
    Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor device package. In certain embodiments, a glass or silicon substrate is patterned by laser ablation to form structures for subsequent formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor device package, which may have one or more embedded double-sided dies therein. In certain embodiments, an insulating layer is formed over the substrate by laminating a pre-structured insulating film thereon. The insulating film may be pre-structured by laser ablation to form structures therein, followed by selective curing of sidewalls of the formed structures.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 11, 2023
    Inventors: Steven VERHAVERBEKE, Han-Wen CHEN
  • Publication number: 20230070053
    Abstract: The present disclosure relates to semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to semiconductor package devices having a stiffener framed formed thereon. The incorporation of the stiffener frame improves the structural integrity of the semiconductor package devices to mitigate warpage and/or collapse while simultaneously enabling utilization of thinner core substrates for improved signal integrity and power delivery between packaged devices.
    Type: Application
    Filed: August 11, 2022
    Publication date: March 9, 2023
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Giback PARK
  • Patent number: 11521937
    Abstract: The present disclosure relates to thin-form-factor semiconductor packages with integrated electromagnetic interference (“EMI”) shields and methods for forming the same. The packages described herein may be utilized to form high-density semiconductor devices. In certain embodiments, a silicon substrate is laser ablated to include one or more cavities and a plurality of vias surrounding the cavities. One or more semiconductor dies may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. A plurality of conductive interconnections are formed within the vias and may have contact points redistributed to desired surfaces of the die-embedded substrate assembly. Thereafter, an EMI shield is plated onto a surface of the die-embedded substrate assembly and connected to ground by at least one of the one or more conductive interconnections. The die-embedded substrate assembly may then be singulated and/or integrated with another semiconductor device.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: December 6, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Steven Verhaverbeke, Han-Wen Chen, Giback Park, Chintan Buch
  • Patent number: 11521935
    Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: December 6, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Giback Park, Giorgio Cellere, Diego Tonini, Vincent Dicaprio, Kyuil Cho
  • Publication number: 20220375787
    Abstract: The present disclosure relates to micro-via structures for interconnects in advanced wafer level semiconductor packaging. The methods described herein enable the formation of high-quality, low-aspect-ratio micro-via structures with improved uniformity, thus facilitating thin and small-form-factor semiconductor devices having high I/O density with improved bandwidth and power.
    Type: Application
    Filed: May 18, 2021
    Publication date: November 24, 2022
    Inventors: Wei-Sheng LEI, Kurtis LESCHKIES, Roman GOUK, Giback PARK, Kyuil CHO, Tapash CHAKRABORTY, Han-Wen CHEN, Steven VERHAVERBEKE
  • Publication number: 20220336246
    Abstract: A method for printing on a substrate includes printing a support structure by printing a liquid precursor material and curing the liquid precursor material, positioning a substrate within the support structure, printing one or more anchors on the substrate and the support structure by printing and curing the liquid precursor material to secure the substrate to the support structure, and printing one or more device structures on the substrate while anchored by printing and curing the liquid precursor material.
    Type: Application
    Filed: May 2, 2022
    Publication date: October 20, 2022
    Inventors: Daihua Zhang, Hou T. Ng, Nag B. Patibandla, Sivapackia Ganapathiappan, Yingdong Luo, Kyuil Cho, Han-Wen Chen
  • Patent number: 11476202
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: October 18, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Guan Huei See, Giback Park, Giorgio Cellere, Diego Tonini, Vincent Dicaprio, Kyuil Cho
  • Publication number: 20220328336
    Abstract: Printing on a substrate includes printing a support structure by printing a liquid precursor material and curing the liquid precursor material, printing one or more alignment markers by printing the liquid precursor material outside the support structure and curing the liquid precursor material, positioning a substrate within the support structure, performing a registration of the substrate using the one or more alignment markers, and printing one or more device structures on the substrate while registered by printing and curing the liquid precursor material.
    Type: Application
    Filed: June 16, 2022
    Publication date: October 13, 2022
    Inventors: Daihua Zhang, Hou T. Ng, Nag B. Patibandla, Sivapackia Ganapathiappan, Yingdong Luo, Kyuil Cho, Han-Wen Chen
  • Publication number: 20220278248
    Abstract: The present disclosure relates to methods and apparatus for structuring a semiconductor substrate. In one embodiment, a method of substrate structuring includes applying a resist layer to a substrate optionally disposed on a carrier. The resist layer is patterned using ultraviolet radiation or laser ablation. The patterned portions of the resist layer are then transferred onto the substrate by micro-blasting to form desired features in the substrate while unexposed or un-ablated portions of the resist layer shield the rest of the substrate. The substrate is then exposed to an etch process and a de-bonding process to remove the resist layer and release the carrier.
    Type: Application
    Filed: May 18, 2022
    Publication date: September 1, 2022
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Giback PARK
  • Patent number: 11424137
    Abstract: Embodiments described herein generally relate to a processing chamber incorporating a small thermal mass which enable efficient temperature cycling for supercritical drying processes. The chamber generally includes a body, a liner, and an insulation element which enables the liner to exhibit a small thermal mass relative to the body. The chamber is also configured with suitable apparatus for generating and/or maintaining supercritical fluid within a processing volume of the chamber.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: August 23, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Roman Gouk, Han-Wen Chen, Steven Verhaverbeke, Jean Delmas
  • Patent number: 11400545
    Abstract: A method of fabricating a frame to enclose one or more semiconductor dies includes forming one or more features including one or more cavities and one or more through-vias in a substrate by a first laser ablation process, filling the one or more through-vias with a dielectric material, and forming a via-in-via in the dielectric material filled in each of the one or more through-vias by a second laser ablation process. The one or more cavities is configured to enclose one or more semiconductor dies therein. In the first laser ablation process, frequency, pulse width, and pulse energy of a first pulsed laser beam to irradiate the substrate are tuned based on a depth of the one or more features. In the second laser ablation process, frequency, pulse width, and pulse energy of a second pulsed laser beam to irradiate the dielectric material are tuned based on a depth of the via-in-via.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: August 2, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Kurtis Leschkies, Wei-Sheng Lei, Jeffrey L. Franklin, Jean Delmas, Han-Wen Chen, Giback Park, Steven Verhaverbeke
  • Patent number: 11398433
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: July 26, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Guan Huei See, Giback Park, Giorgio Cellere, Diego Tonini, Vincent Dicaprio, Kyuil Cho
  • Patent number: 11388822
    Abstract: Methods for forming circuit boards and circuit boards using an adhesion layer are described. A substrate with two surfaces is exposed to a bifunctional organic compound to form an adhesion layer on the first substrate surface. A resin layer is then deposited on the adhesion layer and the exposed substrate surfaces. Portions of the resin layer may be removed to expose metal pads for contacts.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: July 12, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Tapash Chakraborty, Steven Verhaverbeke, Han-Wen Chen, Chintan Buch, Prerna Goradia, Giback Park, Kyuil Cho
  • Patent number: 11367643
    Abstract: A method for printing on a substrate includes printing a support structure by printing a liquid precursor material and curing the liquid precursor material, printing one or more alignment markers by printing the liquid precursor material outside the support structure and curing the liquid precursor material, positioning a substrate within the support structure, performing a registration of the substrate using the one or more alignment markers, and printing one or more device structures on the substrate while registered by printing and curing the liquid precursor material.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: June 21, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Daihua Zhang, Hou T. Ng, Nag B. Patibandla, Sivapackia Ganapathiappan, Yingdong Luo, Kyuil Cho, Han-Wen Chen
  • Patent number: 11362235
    Abstract: The present disclosure relates to methods and apparatus for structuring a semiconductor substrate. In one embodiment, a method of substrate structuring includes applying a resist layer to a substrate optionally disposed on a carrier. The resist layer is patterned using ultraviolet radiation or laser ablation. The patterned portions of the resist layer are then transferred onto the substrate by micro-blasting to form desired features in the substrate while unexposed or un-ablated portions of the resist layer shield the rest of the substrate. The substrate is then exposed to an etch process and a de-bonding process to remove the resist layer and release the carrier.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: June 14, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Giback Park
  • Publication number: 20220171281
    Abstract: A method and apparatus for forming a plurality of vias in panels for advanced packaging applications is disclosed, according to one embodiment. A redistribution layer is deposited on a substrate layer. The redistribution layer may be deposited using a spin coating process, a spray coating process, a drop coating process, or lamination. The redistribution layer is then micro-imprinted using a stamp inside a chamber. The redistribution layer and the stamp are then baked inside the chamber. The stamp is removed from the redistribution layer to form a plurality of vias in the redistribution layer. Excess residue built-up on the redistribution layer may be removed using a descumming process. A residual thickness layer disposed between the bottom of each of the plurality of vias and the top of the substrate layer may have thickness of less than about 1 ?m.
    Type: Application
    Filed: February 17, 2022
    Publication date: June 2, 2022
    Inventors: Roman GOUK, Giback PARK, Kyuil CHO, Han-Wen CHEN, Chintan BUCH, Steven VERHAVERBEKE, Vincent DICAPRIO
  • Patent number: 11342256
    Abstract: A method for producing an electrical component is disclosed using a molybdenum adhesion layer, connecting a polyimide substrate to a copper seed layer and copper plated attachment.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: May 24, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Kyuil Cho, Prayudi Lianto, Guan Huei See, Vincent Dicaprio
  • Publication number: 20220157740
    Abstract: The present disclosure relates to thin-form-factor semiconductor packages with integrated electromagnetic interference (“EMI”) shields and methods for forming the same. The packages described herein may be utilized to form high-density semiconductor devices. In certain embodiments, a silicon substrate is laser ablated to include one or more cavities and a plurality of vias surrounding the cavities. One or more semiconductor dies may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. A plurality of conductive interconnections are formed within the vias and may have contact points redistributed to desired surfaces of the die-embedded substrate assembly. Thereafter, an EMI shield is plated onto a surface of the die-embedded substrate assembly and connected to ground by at least one of the one or more conductive interconnections. The die-embedded substrate assembly may then be singulated and/or integrated with another semiconductor device.
    Type: Application
    Filed: November 16, 2020
    Publication date: May 19, 2022
    Inventors: Steven VERHAVERBEKE, Han-Wen CHEN, Giback PARK, Chintan BUCH
  • Patent number: 11329003
    Abstract: A method of printing structures on a reconstructed wafer includes positioning a plurality of semiconductor dies on a support substrate, anchoring the plurality of semiconductor dies to the support substrate by printing a plurality of anchors that extend across edges of the semiconductor dies onto the support substrate and thus form a reconstructed wafer, and printing one or more device structures on the pluralities of semiconductor dies while anchored on the support substrate. The printing operations include ejecting droplets of a liquid precursor material and curing the liquid precursor material.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: May 10, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Daihua Zhang, Hou T. Ng, Nag B. Patibandla, Sivapackia Ganapathiappan, Yingdong Luo, Kyuil Cho, Han-Wen Chen
  • Publication number: 20220139884
    Abstract: The present disclosure generally relates to stacked miniaturized electronic devices and methods of forming the same. More specifically, embodiments described herein relate to semiconductor device spacers and methods of forming the same. The semiconductor device spacers described herein may be utilized to form stacked semiconductor package assemblies, stacked PCB assemblies, and the like.
    Type: Application
    Filed: January 18, 2022
    Publication date: May 5, 2022
    Inventors: Kurtis LESCHKIES, Han-Wen CHEN, Steven VERHAVERBEKE, Giback PARK, Kyuil CHO, Jeffrey L. FRANKLIN, Wei-Sheng LEI