Patents by Inventor Han-Wen Chen

Han-Wen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10886232
    Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: January 5, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Han-Wen Chen, Steven Verhaverbeke, Giback Park, Giorgio Cellere, Diego Tonini, Vincent DiCaprio, Kyuil Cho
  • Publication number: 20200411312
    Abstract: A method for printing on a substrate includes printing a support structure by printing a liquid precursor material and curing the liquid precursor material, printing one or more alignment markers by printing the liquid precursor material outside the support structure and curing the liquid precursor material, positioning a substrate within the support structure, performing a registration of the substrate using the one or more alignment markers, and printing one or more device structures on the substrate while registered by printing and curing the liquid precursor material.
    Type: Application
    Filed: April 2, 2020
    Publication date: December 31, 2020
    Inventors: Daihua Zhang, Hou T. Ng, Nag B. Patibandla, Sivapackia Ganapathiappan, Yingdong Luo, Kyuil Cho, Han-Wen Chen
  • Publication number: 20200411351
    Abstract: A method for printing on a substrate includes printing a support structure by printing a liquid precursor material and curing the liquid precursor material, positioning a substrate within the support structure, printing one or more anchors on the substrate and the support structure by printing and curing the liquid precursor material to secure the substrate to the support structure, and printing one or more device structures on the substrate while anchored by printing and curing the liquid precursor material.
    Type: Application
    Filed: April 2, 2020
    Publication date: December 31, 2020
    Inventors: Daihua Zhang, Hou T. Ng, Nag B. Patibandla, Sivapackia Ganapathiappan, Yingdong Luo, Kyuil Cho, Han-Wen Chen
  • Publication number: 20200411447
    Abstract: A method of printing structures on a reconstructed wafer includes positioning a plurality of semiconductor dies on a support substrate, anchoring the plurality of semiconductor dies to the support substrate by printing a plurality of anchors that extend across edges of the semiconductor dies onto the support substrate and thus form a reconstructed wafer, and printing one or more device structures on the pluralities of semiconductor dies while anchored on the support substrate. The printing operations include ejecting droplets of a liquid precursor material and curing the liquid precursor material.
    Type: Application
    Filed: April 2, 2020
    Publication date: December 31, 2020
    Inventors: Daihua Zhang, Hou T. Ng, Nag B. Patibandla, Sivapackia Ganapathiappan, Yingdong Luo, Kyuil Cho, Han-Wen Chen
  • Publication number: 20200391343
    Abstract: Embodiments of the present disclosure generally relate to planarization of surfaces on substrates and on layers formed on substrates. More specifically, embodiments of the present disclosure relate to planarization of surfaces on substrates for advanced packaging applications, such as surfaces of polymeric material layers. In one implementation, the method includes mechanically grinding a substrate surface against a polishing surface in the presence of a grinding slurry during a first polishing process to remove a portion of a material formed on the substrate; and then chemically mechanically polishing the substrate surface against the polishing surface in the presence of a polishing slurry during a second polishing process to reduce any roughness or unevenness caused by the first polishing process.
    Type: Application
    Filed: May 28, 2020
    Publication date: December 17, 2020
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Tapash CHAKRABORTY, Prayudi LIANTO, Prerna Sonthalia GORADIA, Giback PARK, Chintan BUCH, Pin Gian GAN, Alex HUNG
  • Publication number: 20200395305
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Application
    Filed: August 28, 2020
    Publication date: December 17, 2020
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Guan Huei SEE, Giback PARK, Giorgio CELLERE, Diego TONINI, Vincent DICAPRIO, Kyuil CHO
  • Publication number: 20200395304
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Application
    Filed: May 8, 2020
    Publication date: December 17, 2020
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Guan Huei SEE, Giback PARK, Giorgio CELLERE, Diego TONINI, Vincent DICAPRIO, Kyuil CHO
  • Publication number: 20200395306
    Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.
    Type: Application
    Filed: August 28, 2020
    Publication date: December 17, 2020
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Guan Huei SEE, Giback PARK, Giorgio CELLERE, Diego TONINI, Vincent DICAPRIO, Kyuil CHO
  • Publication number: 20200357750
    Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
    Type: Application
    Filed: January 17, 2020
    Publication date: November 12, 2020
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Giback PARK, Giorgio CELLERE, Diego TONINI, Vincent DICAPRIO, Kyuil CHO
  • Publication number: 20200357749
    Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.
    Type: Application
    Filed: November 18, 2019
    Publication date: November 12, 2020
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Giback PARK, Giorgio CELLERE, Diego TONINI, Vincent DICAPRIO, Kyuil CHO
  • Publication number: 20200357947
    Abstract: The present disclosure relates to methods and apparatus for structuring a semiconductor substrate. In one embodiment, a method of substrate structuring includes applying a resist layer to a substrate optionally disposed on a carrier. The resist layer is patterned using ultraviolet radiation or laser ablation. The patterned portions of the resist layer are then transferred onto the substrate by micro-blasting to form desired features in the substrate while unexposed or un-ablated portions of the resist layer shield the rest of the substrate. The substrate is then exposed to an etch process and a de-bonding process to remove the resist layer and release the carrier.
    Type: Application
    Filed: November 18, 2019
    Publication date: November 12, 2020
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Giback PARK
  • Patent number: 10777405
    Abstract: A method for processing a substrate is disclosed. The method includes delivering a solvent to a processing chamber and delivering a substrate to the processing chamber. The amount of solvent present in the processing chamber may be configured to submerse the substrate. Liquid CO2 may be delivered to the processing chamber and the liquid CO2 may be mixed with the solvent. Additional liquid CO2 may be delivered to the processing chamber in an amount greater than a volume of the processing chamber to displace the solvent. The liquid CO2 may be phase transitioned to supercritical CO2 in the processing chamber and the substrate may be dried by isothermally depressurizing the processing chamber and exhausting gaseous CO2 from the processing chamber.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: September 15, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Roman Gouk, Han-Wen Chen, Steven Verhaverbeke, Jean Delmas
  • Publication number: 20200243432
    Abstract: A method for producing an electrical component is disclosed using a molybdenum adhesion layer, connecting a polyimide substrate to a copper seed layer and copper plated attachment.
    Type: Application
    Filed: January 24, 2019
    Publication date: July 30, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Han-Wen CHEN, Steven VERHAVERBEKE, Kyuil CHO, Prayudi LIANTO, Guan Huei SEE, Vincent DICAPRIO
  • Patent number: 10727083
    Abstract: The present disclosure generally relates to methods of micro-imprinting panels or substrates for advanced packaging applications. A redistribution layer comprising an epoxy material is deposited on a substrate layer and imprinted with a stamp to form an epoxy substrate patterned with a plurality of vias. The stamp is removed from the epoxy substrate, and the epoxy substrate is optionally etched with a plasma comprising oxygen to prevent the redistribution layer from becoming flowable when cured. A capping layer may optionally be deposited on the surface of the epoxy substrate.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: July 28, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Roman Gouk, Chintan Buch, Kyuil Cho, Han-Wen Chen, Steven Verhaverbeke, Vincent Dicaprio
  • Publication number: 20200159113
    Abstract: A method and apparatus for forming a plurality of vias in panels for advanced packaging applications is disclosed, according to one embodiment. A redistribution layer is deposited on a substrate layer. The redistribution layer may be deposited using a spin coating process, a spray coating process, a drop coating process, or lamination. The redistribution layer is then micro-imprinted using a stamp inside a chamber. The redistribution layer and the stamp are then baked inside the chamber. The stamp is removed from the redistribution layer to form a plurality of vias in the redistribution layer. Excess residue built-up on the redistribution layer may be removed using a descumming process. A residual thickness layer disposed between the bottom of each of the plurality of vias and the top of the substrate layer may have thickness of less than about 1 ?m.
    Type: Application
    Filed: November 15, 2018
    Publication date: May 21, 2020
    Inventors: Roman GOUK, Giback PARK, Kyuil CHO, Han-Wen CHEN, Chintan BUCH, Steven VERHAVERBEKE, Vincent DICAPRIO
  • Patent number: 10573510
    Abstract: A substrate support apparatus is provided. The apparatus includes a circular base plate and one or more spacers disposed about a circumference of the base plate. The spacers may extend from a top surface of the base plate and a ring body may be coupled to the spacers. The ring body may be spaced from the base plate to define apertures between the base plate and the ring body. One or more support posts may be coupled to the base plate and extend therefrom. The support posts may be coupled to the base plate at positions radially inward from an inner surface of the ring body.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: February 25, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Roman Gouk, Han-Wen Chen, Steven Verhaverbeke, Jean Delmas
  • Publication number: 20190287823
    Abstract: Embodiments of the present disclosure generally relate to a method of cleaning a substrate. More specifically, embodiments of the present disclosure relate to a method of cleaning a substrate in a manner that reduces or eliminates the negative effects of line stiction between semiconductor device features. In an embodiment, a method of cleaning a substrate includes exposing a substrate having high aspect ratio features formed thereon to a first solvent to remove an amount of a residual cleaning solution disposed on a surface of the substrate, exposing the surface of the substrate to a second solvent to remove the first solvent disposed on the surface of the substrate, exposing the surface of the substrate to a supercritical fluid to remove the second solvent disposed on the surface of the substrate, and exposing the surface of the substrate to electromagnetic energy.
    Type: Application
    Filed: May 24, 2019
    Publication date: September 19, 2019
    Inventors: Steven VERHAVERBEKE, Han-Wen CHEN, Roman GOUK
  • Publication number: 20190273002
    Abstract: Embodiments described herein generally relate to a processing chamber incorporating a small thermal mass which enable efficient temperature cycling for supercritical drying processes. The chamber generally includes a body, a liner, and an insulation element which enables the liner to exhibit a small thermal mass relative to the body. The chamber is also configured with suitable apparatus for generating and/or maintaining supercritical fluid within a processing volume of the chamber.
    Type: Application
    Filed: May 20, 2019
    Publication date: September 5, 2019
    Inventors: Roman GOUK, Han-Wen CHEN, Steven VERHAVERBEKE, Jean DELMAS
  • Patent number: 10354892
    Abstract: Embodiments of the invention generally relate to a method of cleaning a substrate and a substrate processing apparatus that is configured to perform the method of cleaning the substrate. More specifically, embodiments of the present invention relate to a method of cleaning a substrate in a manner that reduces or eliminates the negative effects of line stiction between semiconductor device features. Other embodiments of the present invention relate to a substrate processing apparatus that allows for cleaning of the substrate in a manner that reduces or eliminates line stiction between semiconductor device features formed on the substrate.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: July 16, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Steven Verhaverbeke, Han-Wen Chen, Roman Gouk
  • Publication number: 20190214247
    Abstract: Embodiments described herein generally relate to a processing chamber having a reduced volume for performing supercritical drying processes or other phase transition processes. The chamber includes a substrate support moveably disposed on a first track and a door moveably disposed on a second track. The substrate support and door may be configured to move independently of one another and the chamber may be configured to minimize vertical movement of the substrate within the chamber.
    Type: Application
    Filed: March 13, 2019
    Publication date: July 11, 2019
    Inventors: Roman GOUK, Han-Wen CHEN, Steven VERHAVERBEKE, Jean DELMAS