Patents by Inventor Han Zhao

Han Zhao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10343988
    Abstract: A compound having the following formula I: is disclosed. A method of preparing the compound of formula I is also disclosed.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: July 9, 2019
    Assignee: SHAANXI UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Chengyuan Liang, Lei Tian, Danni Tian, Yuzhi Liu, Xingke Ju, Nan Hui, Mi Wu, Juan Li, Han Li, Bin Tian, Qianqian Zhao
  • Patent number: 10336682
    Abstract: A compound having the following formula I: is disclosed. A method of preparing the compound of formula I is also disclosed.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: July 2, 2019
    Assignee: SHAANXI UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Chengyuan Liang, Lei Tian, Yuzhi Liu, Xingke Ju, Nan Hui, Mi Wu, Juan Li, Han Li, Bin Tian, Qianqian Zhao, Gennian Mao, Nan Qin, Juan Xia, Zhenfeng Shi
  • Publication number: 20190196239
    Abstract: A pixel structure, a display panel and a driving method are provided. The pixel structure is used for a display panel and includes a first substrate and a second substrate, the pixel structure further includes a light blocking switching member that covers an opening region of the pixel structure, the light blocking switching member is configured to switch between a first state and a second state, in the first state, light is allowed to pass through the light blocking switching member so as to enter the opening region; and in the second state, the opening region of the pixel structure is shielded by the light blocking switching member.
    Type: Application
    Filed: June 1, 2018
    Publication date: June 27, 2019
    Inventors: Jie Liu, Kai Diao, Hongyu Zhao, Zongjie Bao, Han Zhang
  • Publication number: 20190199464
    Abstract: A signal monitoring method and apparatus for a wavelength selective switch (WSS) are provided. The signal monitoring method for a wavelength selective switch WSS includes: encoding a phase of a first optical engine based on an input WDM signal, so that the WDM signal is split into a transmitted signal and a monitored signal after passing through the first optical engine; inputting the monitored signal to a second optical engine disposed at an output-side grating; and controlling the second optical engine to rotate in a wavelength plane of the WDM signal, so that monitored light of a specified wavelength in the monitored signal is output from the second optical engine at a preset angle.
    Type: Application
    Filed: February 25, 2019
    Publication date: June 27, 2019
    Inventors: Liangjia Zong, Han Zhao, Zhiyong Feng, Yunfei Yan
  • Patent number: 10330847
    Abstract: The present disclosure relates to a light guide plate and its manufacturing method, and a backlight module. The light guide plate includes two opposite main surfaces and a side surface located between the two main surfaces. The method comprises: forming a plurality of grooves on at least one main surface of the light guide plate.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: June 25, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., FUZHOU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD
    Inventors: Hongyu Zhao, Kai Diao, Zongjie Bao, Han Zhang, Ming Li, Wenjia Sun, Yang Chu, Junjie Guo
  • Patent number: 10333468
    Abstract: A terahertz wave fast modulator based on coplanar waveguide combining with transistor is disclosed. The terahertz waves are inputted through a straight waveguide structure, and then are coupled through a probe structure onto a core part of the present invention, which includes a suspended coplanar waveguide structure and a modulation unit with high electron mobility transistor, wherein the suspended coplanar waveguide structure is formed by three metal wires and a semiconductor substrate; and the modulation unit with high electron mobility transistor is located between adjacent metal transmission strips of the coplanar waveguide structure. Transmission characteristics of the terahertz waves in the coplanar waveguide structure are changed through the switching on/off of the modulation unit, so as to fast modulate the amplitudes and phases of the terahertz waves, and finally the modulated terahertz waves are transmitted through a probe—waveguide structure.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: June 25, 2019
    Assignee: University of Electronic Science and Technology of China
    Inventors: Yaxin Zhang, Han Sun, Yuncheng Zhao, Shixiong Liang, Ziqiang Yang
  • Publication number: 20190177511
    Abstract: The invention relates to a method for preparing a hydrophobically modified clay, wherein the clay modifying agent corresponds to a quaternary ammonium based compound. The present invention further relates to a hydrophobically modified clay obtainable by such a method and to a suspension comprising such a clay, as well to the use of such a hydrophobically modified clay and of a suspension comprising such a hydrophobically modified clay. Furthermore, the present invention is also directed to a polymeric composition comprising a hydrophobically modified clay and/or a suspension comprising a hydrophobically modified clay.
    Type: Application
    Filed: February 14, 2019
    Publication date: June 13, 2019
    Inventors: Hanns MISIAK, Daniela Neitzke, Christina Huebner, Hans-Georg Kinzelmann, Ligang Zhao, Josef Breu, Andreas Edenharter, Sonja Amschler
  • Patent number: 10312355
    Abstract: A vertical-mode tunnel field-effect transistor (TFET) is provided with an oxide region that may be laterally positioned relative to a source region. The oxide region operates to reduce a tunneling effect in a tunnel region underlying a drain region, during an OFF-state of the TFET. The reduction in tunneling effect results in a reduction or elimination of a flow of OFF-state leakage current between the source region and the drain region. The TFET may have components made from group III-V compound materials.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: June 4, 2019
    Assignee: The Board of Regents of the University of Texas System
    Inventors: Jack C. Lee, Han Zhao
  • Patent number: 10299077
    Abstract: A server including data loading, data analysis, transformation and cleaning (TAC), and position estimation modules. The data loading module loads original position data (OPD) sets. OPD points of the OPD sets refer to positions of a wireless device in communication with a wireless station. The data loading module loads each OPD set based on an identifier of the wireless station in a corresponding one of the OPD sets. The data analysis module: determines an overall bounding area based on the OPD points; divides the overall bounding area into minimum bounding areas; and assigns the OPD points to the minimum bounding areas. The TAC module: transforms and cleans some of the OPD points to provide updated points, such that the updated points have a less number of points than the some of the OPD points. The position estimation module estimates a position of the wireless device based on the updated points.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: May 21, 2019
    Assignee: Marvel International Ltd.
    Inventors: BoChih Liu, Zhike Jia, Jing Yu, Han Zhao, Yuan Ren
  • Patent number: 10296074
    Abstract: Various embodiments provide methods, devices, and non-transitory processor-readable storage media enabling joint goals, such as joint power and performance goals, to be realized on a per heterogeneous processing device basis for heterogeneous parallel computing constructs. Various embodiments may enable assignments of power states for heterogeneous processing devices on a per heterogeneous processing device basis to satisfy an overall goal on the heterogeneous processing construct. Various embodiments may enable dynamic adjustment of power states for heterogeneous processing devices on a per heterogeneous processing device basis.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: May 21, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Wenjia Ruan, Han Zhao, Tushar Kumar
  • Publication number: 20190147966
    Abstract: Some embodiments include apparatuses and methods having a memory cell string including memory cells located in different levels of the apparatus and a data line coupled to the memory cell string. The memory cell string includes a pillar body associated with the memory cells. At least one of such apparatus can include a module configured to store information in a memory cell among memory cells and/or to determine a value of information stored in a memory cell among memory cells. The module can also be configured to apply a voltage having a positive value to the data line and/or a source to control a potential of the body. Other embodiments are described.
    Type: Application
    Filed: December 20, 2018
    Publication date: May 16, 2019
    Inventors: Han Zhao, Akira Goda, Krishna K. Parat, Aurelio Giancarlo Mauri, Haitao Liu, Toru Tanzawa, Shigekazu Yamada, Koji Sakui
  • Publication number: 20190139788
    Abstract: Aspects of the disclosure generally relate to methods of immobilizing die on a substrate. In one method one or more immobilization features are formed in a selected pattern on a substrate. A die is positioned in contact with the one or more immobilization features and the substrate. The one or more immobilization features are cured, and a mold layer is formed on top of the cured one or more immobilization features and the die so as to encapsulate the die.
    Type: Application
    Filed: October 25, 2018
    Publication date: May 9, 2019
    Applicant: Applied Materials, Inc.
    Inventors: Boyi FU, Han-Wen CHEN, Kyuil CHO, Sivapackia GANAPATHIAPPAN, Roman GOUK, Steven VERHAVERBEKE, Nag B. PATIBANDLA, Yan ZHAO, Hou T. NG, Ankit VORA, Daihua ZHANG
  • Patent number: 10261831
    Abstract: Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing speculative loop iteration partitioning (SLIP) for heterogeneous processing devices. A computing device may receive iteration information for a first partition of iterations of a repetitive process and select a SLIP heuristic based on available SLIP information and iteration information for the first partition. The computing device may determine a split value for the first partition using the SLIP heuristic, and partition the first partition using the split value to produce a plurality of next partitions.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: April 16, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Arun Raman, Han Zhao, Aravind Natarajan
  • Patent number: 10242742
    Abstract: Apparatus having a plurality of strings of series-connected memory cells, and methods of their operation, where each string of the plurality of strings is selectively connected to a common data line through a corresponding respective select gate. A first set of access lines are each coupled to a respective memory cell of each string of series-connected memory cells of the plurality of strings of series-connected memory cells. A second set of access lines are each coupled to a respective memory cell of each string of series-connected memory cells of only a portion of the plurality of strings of series-connected memory cells.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: March 26, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Toru Tanzawa, Han Zhao
  • Publication number: 20190043594
    Abstract: Reduction of program disturb degradation in a flash memory cell array is facilitated by selectively switching wordline voltage levels in a sequence that reduces the likelihood of trapping electrons in memory cell channels. During a program verify operation for a memory cell in a memory cell string, a flash memory system switches wordline voltage levels from high-to-low for interface wordlines, prior to switching wordline voltages from high-to-low for other wordlines in a memory cell string. Selectively switching wordlines in a sequence in the memory cell string enables electrons to migrate to ground or to a source voltage through upper and lower select gates.
    Type: Application
    Filed: December 5, 2017
    Publication date: February 7, 2019
    Applicant: Intel Corporation
    Inventors: HAN ZHAO, PRANAV KALAVADE, KRISHNA K. PARAT
  • Publication number: 20190013077
    Abstract: Apparatus having a plurality of strings of series-connected memory cells, and methods of their operation, where each string of series-connected memory cells of the plurality of strings of series-connected memory cells may be selectively connected to a common data line through a corresponding respective select gate, a first set of access lines may each be coupled to a respective memory cell of each string of series-connected memory cells of the plurality of strings of series-connected memory cells, and a second set of access lines may each be coupled to a respective memory cell of each string of series-connected memory cells of only a portion of the plurality of strings of series-connected memory cells.
    Type: Application
    Filed: September 11, 2018
    Publication date: January 10, 2019
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Toru Tanzawa, Han Zhao
  • Patent number: 10169105
    Abstract: Aspects include computing devices, systems, and methods for implementing scheduling and execution of lightweight kernels as simple tasks directly by a thread without setting up a task structure. A computing device may determine whether a task pointer in a task queue is a simple task pointer for the lightweight kernel. The computing device may schedule a first simple task for the lightweight kernel for execution by the thread. The computing device may retrieve, from an entry of a simple task table, a kernel pointer for the lightweight kernel. The entry in the simple task table may be associated with the simple task pointer. The computing device may directly execute the lightweight kernel as the simple task.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: January 1, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Han Zhao, Pablo Montesinos Ortego, Arun Raman, Behnam Robatmili, Gheorghe Calin Cascaval
  • Patent number: 10170196
    Abstract: Some embodiments include apparatuses and methods having a memory cell string including memory cells located in different levels of the apparatus and a data line coupled to the memory cell string. The memory cell string includes a pillar body associated with the memory cells. At least one of such apparatus can include a module configured to store information in a memory cell among memory cells and/or to determine a value of information stored in a memory cell among memory cells. The module can also be configured to apply a voltage having a positive value to the data line and/or a source to control a potential of the body. Other embodiments are described.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: January 1, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Han Zhao, Akira Goda, Krishna K. Parat, Aurelio Giancarlo Mauri, Haitao Liu, Toru Tanzawa, Shigekazu Yamada, Koji Sakui
  • Patent number: 10152243
    Abstract: Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing data flow management on a computing device. Embodiment methods may include initializing a buffer partition of a first memory of a first heterogeneous processing device for an output of execution of a first iteration of a first operation by the first heterogeneous processing device on which a first iteration of a second operation assigned for execution by a second heterogeneous processing device depends. Embodiment methods may include identifying a memory management operation for transmitting the output by the first heterogeneous processing device from the buffer partition as an input to the second heterogeneous processing device. Embodiment methods may include allocating a second memory for storing data for an iteration executed by a third heterogeneous processing device to minimize a number of memory management operations for the second allocated memory.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: December 11, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Han Zhao, Arun Raman, Aravind Natarajan
  • Patent number: 10133005
    Abstract: A wavelength selective switch (WSS), including an input optical fiber collimation array, a first optical switching engine, a dispersion device, an optical path converter, a second optical switching engine, a third optical switching engine, and an output optical fiber collimation array. A first beam is input from a first port of the input optical fiber collimation array. The first optical switching engine performs angle deflection on the first beam on a first plane. The dispersion device demultiplexes, on a second plane, the angle-deflected first beam into multiple sub-wavelength beams. The second optical switching engine performs angle deflection on the multiple sub-wavelength beams that are obtained by demultiplexing. The dispersion device multiplexes, on the second plane, the angle-deflected multiple sub-wavelength beams. The third optical switching engine performs angle deflection on the multiplexed multiple sub-wavelength beams on the first plane.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: November 20, 2018
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yunfei Yan, Han Zhao, Zhiyong Feng