Abstract: A cell layout includes a first cell having a plurality of first poly lines extending along a first direction, a second cell having a plurality of second poly lines extending along the first direction, and a boundary cell contiguous with the first cell. The first poly lines have a first uniform poly pitch and the second poly lines have a second uniform poly pitch. The second uniform poly pitch is smaller than the first uniform poly pitch. The boundary cell includes n stripes of first dummy poly lines and m stripes of second dummy poly lines extending along the first direction. The first dummy poly lines have the first uniform poly pitch and the second dummy poly lines have the second uniform pitch.

Abstract: Service management methods for use in an electronic device are provided, including the steps of: providing a record including at least one first event and possible probability parameters corresponding thereto, each having a weight; collecting device status information regarding information of current status of the electronic device, user operation behavior information and event triggering information using a data collector; evaluating a first evaluation value according to the device status information regarding information of current status of the electronic device, user operation behavior information and event triggering information, the possible probability parameters and respective weights of the record; and inferring that the first event reoccurs and performing a service corresponding to the first event when the first evaluation value has exceeded a threshold value.

Abstract: A method and system for running multiple instances of a computer application into a virtual environment on a host server, and more specifically for running multiple instances of an operating system such as a mobile devices operating system, on the internet cloud. The method includes launching a global service manager, and having this service manager querying a binder driver which handles interprocess communications, so that the global service manager becomes a binder context manager for managing the running of multiple instances of the computer application into a virtual running environment. The method also includes launching, when launching any instance of the application after launch of the global service manager, a local service manager for handling service management for the instance of the application into a pseudo-virtual environment, the local service manager being registered by the binder context manager as local service manager for the instance of the application.

Abstract: A method for displaying of a touch cursor is provided. The method is adapted to an electronic apparatus having a touch display unit. The touch display unit has a display area. The method includes the following steps. At least one first dimension boundary and at least one second dimension boundary are defined in the display area. A cursor, which has a pointing area and a touchable area, is displayed. When a touch event occurs in the touchable area, the cursor is correspondingly moved according to a touch coordinate of the touch event. When a reference point of the cursor passes two of the at least one first dimension boundary or two of the at least one second dimension boundary, the cursor is rotated for adjusting a relative position of the pointing area and the touchable area.

Abstract: Disclosed are a type of tridentate linkers and use thereof. The tridentate linkers can be used to prepare an antibody drug conjugates as represented by formula I, L-(T-A-D)n ??I wherein, L is an antibody, antibody fragment or protein; T is a tridentate linker part; A is a cleavable linker group or a noncleavable linker part; D is a drug part; n is an integer of 0-8. The structure of the tridentate linker part is as represented by formula II. wherein, W is substituted aryl, heteroaryl, linear alkyl, cycloalkyl, heterocycloalkyl, or any combination thereof.

Abstract: A replacement method for scan cell of an integrated circuit (IC) is provided. A gate-level netlist of the IC is obtained. A place-and-route process is performed on the gate-level netlist to obtain a first netlist. A clock tree synthesis process is performed on the first netlist to obtain a second netlist. Static timing analysis is performed to analyze a plurality of first scan cells of the second netlist in normal mode and scan mode. The first scan cell is replaced with a second scan cell according to the static timing analysis that indicates the replaced first scan cell has a specific time margin in the scan mode. A first skew of the normal mode and a second skew of the scan mode are adjusted symmetrically in the first scan cell. The first skew and the second skew are adjusted asymmetrically in the second scan cell.

Abstract: An antenna cell for preventing plasma enhanced gate dielectric failures, is provided. The antenna cell design utilizes a polysilicon lead as a gate for a dummy transistor. The polysilicon lead may be one of a group of parallel, nested polysilicon lead. The dummy transistor includes the gate coupled to a substrate maintained at VSS, either directly through a metal lead or indirectly through a tie-low cell. The gate is disposed over a dielectric disposed over a continuous source/drain region in which the source and drain are tied together. A diode is formed with the semiconductor substrate within which it is formed. The source/drain region is coupled to another metal lead which may be an input pin and is coupled to active transistor gates, preventing plasma enhanced gate dielectric damage to the active transistors.

Abstract: An integrated circuit is provided. A standard cell includes a plurality of PMOS transistors and a plurality of NMOS transistors. The PMOS transistors are disposed in a first row and a second row in the semiconductor substrate. The NMOS transistors are disposed in a third row in the semiconductor substrate. The third row is adjacent to the first and second rows and arranged between the first and second rows.

Abstract: An antenna cell for preventing plasma enhanced gate dielectric failures, is provided. The antenna cell design utilizes a polysilicon lead as a gate for a dummy transistor. The polysilicon lead may be one of a group of parallel, nested polysilicon lead. The dummy transistor includes the gate coupled to a substrate maintained at VSS, either directly through a metal lead or indirectly through a tie-low cell. The gate is disposed over a dielectric disposed over a continuous source/drain region in which the source and drain are tied together. A diode is formed with the semiconductor substrate within which it is formed. The source/drain region is coupled to another metal lead which may be an input pin and is coupled to active transistor gates, preventing plasma enhanced gate dielectric damage to the active transistors.

Abstract: An antenna cell for preventing plasma enhanced gate dielectric failures, is provided. The antenna cell design utilizes a polysilicon lead as a gate for a dummy transistor. The polysilicon lead may be one of a group of parallel, nested polysilicon lead. The dummy transistor includes the gate coupled to a substrate maintained at VSS, either directly through a metal lead or indirectly through a tie-low cell. The gate is disposed over a dielectric disposed over a continuous source/drain region in which the source and drain are tied together. A diode is formed with the semiconductor substrate within which it is formed. The source/drain region is coupled to another metal lead which may be an input pin and is coupled to active transistor gates, preventing plasma enhanced gate dielectric damage to the active transistors.

Abstract: A touch device is configured to display a touch activated cursor on a touch screen. The touch device is configured to automatically rotate the cursor depending on movement of the cursor on the touch screen.

Abstract: The present invention provides a method for treating, preventing or reducing peritoneal fibrosis comprising administering to a subject in need thereof a pharmacologically effective dose of a type I cannabinoid receptor (CB1R) antagonist or a type II cannabinoid receptor (CB2R) agonist. Also provided is a dialysis fluid for treating, preventing or reducing peritoneal fibrosis comprising electrolytes, an osmotic agent, a physiologically acceptable pH solution, and a pharmacologically effective dose of a CB1R antagonist or a CB2R agonist.

Abstract: A method and system for running multiple instances of a computer application into a virtual environment on a host server, and more specifically for running multiple instances of an operating system such as a mobile devices operating system, on the internet cloud. The method includes launching a global service manager, and having this service manager querying a binder driver which handles interprocess communications, so that the global service manager becomes a binder context manager for managing the running of multiple instances of the computer application into a virtual running environment. The method also includes launching, when launching any instance of the application after launch of the global service manager, a local service manager for handling service management for the instance of the application into a pseudo-virtual environment, the local service manager being registered by the binder context manager as local service manager for the instance of the application.

Abstract: A circuit includes a logic gate and a latch. The logic gate is configured to receive a clock signal at a first input. The latch is disposed in a feedback loop of the logic gate and is configured to output a feedback signal to a second input of the logic gate in response to a signal output by the logic gate and the clock signal. The circuit is configured to output a pulsed signal based on one of a rising edge or a falling edge of the clock signal.

Abstract: A multiplexing circuit includes first and second tri-state inverters coupled to first and second data input nodes, respectively. The first and second tri-state inverters include first and second stacks of transistors, respectively, coupled between power supply and ground nodes. Each stack includes first and second PMOS transistors and first and second NMOS transistors. The first and second stacks include first and second dummy transistors, respectively.

Abstract: An antenna cell for preventing plasma enhanced gate dielectric failures, is provided. The antenna cell design utilizes a polysilicon lead as a gate for a dummy transistor. The polysilicon lead may be one of a group of parallel, nested polysilicon lead. The dummy transistor includes the gate coupled to a substrate maintained at VSS, either directly through a metal lead or indirectly through a tie-low cell. The gate is disposed over a dielectric disposed over a continuous source/drain region in which the source and drain are tied together. A diode is formed with the semiconductor substrate within which it is formed. The source/drain region is coupled to another metal lead which may be an input pin and is coupled to active transistor gates, preventing plasma enhanced gate dielectric damage to the active transistors.

Abstract: A splitting apparatus of an LCD panel and splitting method thereof are described. The LCD panel has a first substrate and a second substrate. The splitting apparatus includes a first splitting device and a second splitting device disposed correspondingly to the first splitting device, and the second splitting device includes protrusion adjustment devices. The protrusion adjustment device extrudes the second substrate for forming a protrusion corresponding to a split line to separate a split plate from the first substrate by a deformation portion of the protrusion and to remove the split plate by the first splitting device. The splitting apparatus makes a rapid separation of the split plate.

Abstract: A multiplexing circuit includes first and second tri-state inverters coupled to first and second data input nodes, respectively. The first and second tri-state inverters include first and second stacks of transistors, respectively, coupled between power supply and ground nodes. Each stack includes first and second PMOS transistors and first and second NMOS transistors. The first and second stacks include first and second dummy transistors, respectively.

Abstract: A circuit includes a logic gate and a latch. The logic gate is configured to receive a clock signal at a first input. The latch is disposed in a feedback loop of the logic gate and is configured to output a feedback signal to a second input of the logic gate in response to a signal output by the logic gate and the clock signal. The circuit is configured to output a pulsed signal based on one of a rising edge or a falling edge of the clock signal.

Abstract: A hot key operation module is disclosed. The hot key operation module includes a hot key and a touch panel. When a user presses the hot key, a host will display a graphical user interface on a screen, wherein the graphical user interface includes an operation block. The profile of the graphical user interface is similar to that of the touch panel. The user can operate the touch panel according to the relative position of the operation block relative to the graphical user interface, so as to drive the host to execute the function corresponding to the operation block.