Patents by Inventor HanGil Shin

HanGil Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7863735
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; applying a tiered encapsulant above the base substrate, the tiered encapsulant having a first cavity above the base substrate and a second cavity above the first cavity adjacent an intermediate horizontal side; connecting an intermediate interconnect to the base substrate, the intermediate interconnect surrounded by the tiered encapsulant and substantially exposed on the intermediate horizontal side; and connecting a top interconnect to the base substrate, the top interconnect surrounded by the tiered encapsulant and substantially exposed on a top horizontal side.
    Type: Grant
    Filed: August 7, 2009
    Date of Patent: January 4, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: NamJu Cho, HeeJo Chi, HanGil Shin
  • Publication number: 20100301469
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit; mounting a routing structure having a functional side above the integrated circuit; mounting a vertical interconnect to the functional side of the routing structure and the vertical interconnect extending vertically away from the routing structure; and forming an encapsulation that encapsulates the integrated circuit, the routing structure, and sides of the vertical interconnect above the routing structure, and leaves a surface of the routing structure exposed from the encapsulation, and a portion of the vertical interconnect exposed from the encapsulation above the surface of the routing structure.
    Type: Application
    Filed: May 27, 2009
    Publication date: December 2, 2010
    Inventors: A Leam Choi, Kenny Lee, In Sang Yoon, HanGil Shin
  • Publication number: 20100276792
    Abstract: A semiconductor device has a substrate containing a conductive layer. An interconnect structure is formed over the substrate and electrically connected to the conductive layer. A semiconductor component is mounted to the substrate. An encapsulant is deposited over the semiconductor component and interconnect structure. A channel is formed in the encapsulant to expose the interconnect structure. Solder paste is deposited in the channel prior to forming the shielding layer. A shielding layer is formed over the encapsulant and semiconductor component. The shielding layer can be conformally applied over the encapsulant and semiconductor die and into the channel. The shielding layer extends into the channel and electrically connects to the interconnect structure. A docking pin is formed on the shielding layer, which extends into the channel and electrically connects to the interconnect structure. A chamfer area is formed around a perimeter of the shielding layer.
    Type: Application
    Filed: May 1, 2009
    Publication date: November 4, 2010
    Applicant: STATS ChipPAC, Ltd.
    Inventors: HeeJo Chi, NamJu Cho, HanGil Shin
  • Publication number: 20100258928
    Abstract: A method of manufacture an integrated circuit packaging system includes: providing a substrate; attaching a first integrated circuit to the substrate by interconnects only along opposite sides of the first integrated circuit; and attaching a heat spreader to the substrate, the heat spreader extending over the first integrated circuit and between the opposite sides of the first integrated circuit.
    Type: Application
    Filed: April 14, 2009
    Publication date: October 14, 2010
    Inventors: HeeJo Chi, Soo Jung Park, HanGil Shin
  • Publication number: 20100244223
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate having a shielding channel through a substrate first side and a substrate second side; mounting a first shielding interconnect to the shielding channel; mounting an integrated circuit over the substrate and adjacent to the first shielding interconnect; attaching a silicon interposer, having an integral-conductive-shield and a via, to the first shielding interconnect with the integral-conductive-shield over the integrated circuit; grounding the shielding channel at the substrate second side; and forming an encapsulation over the substrate covering the integrated circuit and the first shielding interconnect.
    Type: Application
    Filed: September 21, 2009
    Publication date: September 30, 2010
    Inventors: NamJu Cho, HeeJo Chi, HanGil Shin
  • Patent number: 7800212
    Abstract: A mountable integrated circuit package system includes: forming a base integrated circuit package system includes: providing a first substrate, and forming a package encapsulation having a cavity over the first substrate with the first substrate partially exposed within the cavity; and mounting an interposer including a central aperture over the package encapsulation and the first substrate with the central aperture over the cavity.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: September 21, 2010
    Assignee: Stats Chippac Ltd.
    Inventors: In Sang Yoon, JoHyun Bae, HanGil Shin
  • Publication number: 20100224975
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a first board-on-chip-structure having a first integrated circuit die mounted over a substrate and the substrate having a substrate cavity; mounting a second board-on-chip-structure over the first board-on-chip-structure, the second board-on-chip-structure having a second integrated circuit die mounted under an interposer and the interposer having an interposer cavity; connecting the first board-on-chip-structure to the second board-on-chip-structure with an internal interconnect; and encapsulating the first board-on-chip-structure, the second board-on-chip-structure, and the internal interconnect with an encapsulation.
    Type: Application
    Filed: March 5, 2009
    Publication date: September 9, 2010
    Inventors: HanGil Shin, HeeJo Chi, A Leam Choi
  • Publication number: 20090236720
    Abstract: An integrated circuit package system includes: providing a stackable integrated circuit package system having a base encapsulation and a recess therein; stacking a top integrated circuit package system, having a top encapsulation with a protruding portion, with the stackable integrated circuit package system with the protruding portion aligned and matched within the recess; and connecting the top integrated circuit package system and the stackable integrated circuit package system.
    Type: Application
    Filed: March 24, 2008
    Publication date: September 24, 2009
    Inventors: In Sang Yoon, HanGil Shin, Jae Han Chung, DeokKyung Yang
  • Publication number: 20090166834
    Abstract: A mountable integrated circuit package system includes: forming a base integrated circuit package system includes: providing a first substrate, and forming a package encapsulation having a cavity over the first substrate with the first substrate partially exposed within the cavity; and mounting an interposer including a central aperture over the package encapsulation and the first substrate with the central aperture over the cavity.
    Type: Application
    Filed: December 27, 2007
    Publication date: July 2, 2009
    Inventors: In Sang Yoon, JoHyun Bae, HanGil Shin
  • Publication number: 20090127715
    Abstract: A mountable integrated circuit package system includes: mounting a first integrated circuit device over a carrier; mounting a second integrated circuit device over the first integrated circuit device includes: attaching the second integrated circuit device to a first substrate side of a substrate, and connecting a first electrical interconnect between the second integrated circuit device and a second substrate side of the substrate through an opening in the substrate. The mountable integrated circuit package system further including: forming a package encapsulation over the first integrated circuit device and the carrier with the substrate partially exposed.
    Type: Application
    Filed: November 15, 2007
    Publication date: May 21, 2009
    Inventors: HanGil Shin, In Sang Yoon, Jae Han Chung
  • Publication number: 20080315406
    Abstract: An integrated circuit package system includes a base substrate having a base substrate cavity, attaching a junction integrated circuit package over the base substrate with a portion of the junction integrated circuit package in the base substrate cavity, and attaching a base integrated circuit over the junction integrated circuit package and the base substrate.
    Type: Application
    Filed: June 25, 2007
    Publication date: December 25, 2008
    Inventors: Jae Han Chung, HeeJo Chi, HanGil Shin, SunMi Kim