Patents by Inventor Hans Weber
Hans Weber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12684844Abstract: A transistor device and a method for forming a transistor device are disclosed. The transistor device includes: a SiC semiconductor body that includes a first semiconductor layer and a second semiconductor layer formed on top of the first semiconductor; a trench structure extending from a first surface of the semiconductor body through the second semiconductor layer into the first semiconductor layer; a drain region arranged in the first semiconductor layer; and a plurality of transistor cells each coupled between the drain region and a source node. The trench structure subdivides the second semiconductor layer into a plurality of mesa regions and includes at least one cavity. At least one of the plurality of transistor cells is at least partially integrated in each of the mesa regions.Type: GrantFiled: August 12, 2022Date of Patent: July 14, 2026Assignee: Infineon Technologies Austria AGInventors: Andreas Voerckel, Hans Weber, Tobias Franz Wolfgang Hoechbauer
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Publication number: 20260190410Abstract: A transistor device is disclosed. The transistor device includes: a semiconductor body; a drift region in the semiconductor body; a plurality of transistor cells; and a gate node and a source node. Each transistor cells includes: a first trench electrode insulated from the semiconductor body by a first dielectric layer; a second trench electrode insulated from the semiconductor body by a second dielectric layer; a source region and a body region in a first mesa region between the first trench electrode and the second trench electrode; and a compensation region. The compensation region adjoins the body region, the first dielectric, and the second dielectric, and forms a pn-junction with the drift region. From the first trench electrode and the second trench electrode, at least the first trench electrode is connected to the gate node.Type: ApplicationFiled: December 2, 2025Publication date: July 2, 2026Inventors: Hans Weber, Björn Fischer, Franz Hirler, Matteo-Alessandro Kutschak, Andreas Riegler
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Patent number: 12669560Abstract: The coil arrangement comprises: a rigid base part with which the coil arrangement can be placed on a patient couch; an upper additional part including upper local coils, wherein the upper additional part is movable such that a spacing of the upper local coils from the facial, neck and upper chest area of the patient is adjustable; and a lower additional part including lower local coils. The base part, the lower additional part and the upper additional part are connected so as to be capable of being handled manually as one unit. The lower additional part, viewed from anterior to posterior, is adjustable in height relative to the base part to adjust a spacing of the lower local coils from the back of the head of the patient.Type: GrantFiled: December 13, 2024Date of Patent: June 30, 2026Assignee: SIEMENS HEALTHINEERS AGInventors: Christoph Dickmann, Martin Requardt, Hans Weber
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Publication number: 20260173783Abstract: Disclosed is a method. The method includes: forming a plurality of trenches in a first surface of a semiconductor body such that the trenches are separated from each other by semiconductor mesa regions; and forming a channel region of a first doping type in each of the mesa regions. Forming the channel region includes implanting first type dopant atoms at least into a first sidewall of the respective mesa region. Implanting the first type dopant atoms into the first sidewall includes at least two implantation processes that are different from each other with regard to at least one process parameter.Type: ApplicationFiled: December 12, 2025Publication date: June 18, 2026Inventors: Dan Horia Popescu, Björn Fischer, David Kammerlander, Hans Weber
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Publication number: 20260069219Abstract: The disclosure relates to a modular video playback system for use in a magnetic resonance device. The video playback system comprises a display module with a respective display unit for a left and right eye of the patient, each display unit including a display, a support arrangement for holding the display at a distance from the head laterally, and an optical arrangement fastened to the support arrangement at least partially in front of each respective eye for projecting an image output by the display onto the patient's eye. The video playback system also includes a holder that may be detachably connected to the display module and has fastening means for detachably fastening to at least one component of the patient table, a data transmission arrangement which can be connected to the display module, and a power supply arrangement which can be connected to the display module.Type: ApplicationFiled: September 8, 2025Publication date: March 12, 2026Applicant: Siemens Healthineers AGInventors: Johann Sukkau, Volker Matschl, Hans Weber, Vincent Kelber
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Publication number: 20260069160Abstract: A body part cushion for supporting a body part during a magnetic resonance examination with a magnetic resonance device, wherein the body part cushion has at least one presence sensor configured to acquire presence data related to the presence of the body part and a communication apparatus configured to transmit the presence data to a receiver.Type: ApplicationFiled: September 8, 2025Publication date: March 12, 2026Applicant: Siemens Healthineers AGInventors: Vincent Kelber, Volker Matschl, Johann Sukkau, Hans Weber
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Publication number: 20260068220Abstract: An insulated gate field effect transistor (IGFET) includes a trench structure extending, along a vertical direction, into a wide band gap semiconductor body from a first surface of the wide band gap semiconductor body. The IGFET further includes a body region of a first conductivity type, a source region of a second conductivity type, and a shielding region of the first conductivity type. The shielding region includes a first sub-region adjoining a bottom side of the trench structure, and a second sub-region adjoining a bottom side of the first sub-region. The first sub-region has a larger maximum doping concentration than the second sub-region. A vertical doping concentration profile of the first sub-region and a vertical doping concentration profile of the second sub-region overlap each other at the bottom side of the first sub-region.Type: ApplicationFiled: August 19, 2025Publication date: March 5, 2026Inventors: Björn Fischer, Thomas Ralf Siemieniec, Hans Weber, David Kammerlander, Dan Horia Popescu
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Patent number: 12550387Abstract: A trench junction field effect transistor (trench JFET) includes a mesa region confined by first and second trenches along a first lateral direction. The first and second trenches extend into a semiconductor body from a first surface of the semiconductor body. A mesa channel region of a first conductivity type is confined, along the first lateral direction, by first and second gate regions of a second conductivity type. A first pn junction is defined by the mesa channel region and the first gate region. A second pn junction is defined by the mesa channel region and the second gate region. The mesa channel region includes, along the first lateral direction, first, second and third mesa channel sub-regions having a same extent along the first lateral direction.Type: GrantFiled: February 7, 2023Date of Patent: February 10, 2026Assignee: Infineon Technologies Austria AGInventors: Hans Weber, David Kammerlander, Andreas Riegler
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Publication number: 20260026754Abstract: A patient support apparatus for an imaging apparatus, including: a patient couch and a cushioning element, wherein the cushioning element is arranged on a surface of the patient couch and forms a receiving surface for a patient, wherein the patient couch is designed to accommodate a patient in a recumbent posture, and wherein the patient support apparatus is designed to transport the patient on the patient couch into a patient receiving zone of the imaging apparatus, wherein a width of the cushioning element along an X direction of the patient support apparatus substantially corresponds to a width of the patient receiving zone at a receiving height for the patient couch.Type: ApplicationFiled: July 28, 2025Publication date: January 29, 2026Applicant: Siemens Healthineers AGInventors: Wilfried Schnell, Hans Weber, Antje Lohfink, Christopher Hable, Stephan Biber
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Publication number: 20250386556Abstract: A vertical junction field effect transistor includes a trench structure laterally arranged between mesa regions along a first lateral direction. The trench structure extends into a semiconductor body from a first surface of the semiconductor body. Each of the mesa regions includes a mesa channel region of a first conductivity type. The vertical junction field effect transistor further includes a gate region of a second conductivity type. The gate region adjoins at least part of opposite sidewalls of the trench structure and to a bottom side of the trench structure. The trench structure includes a silicon layer adjoining the gate region at the bottom side of the trench structure. A first thickness of the gate region at the bottom side of the trench structure is larger than a second thickness of the gate region at each of the opposite sidewalls of the trench structure.Type: ApplicationFiled: June 16, 2025Publication date: December 18, 2025Inventors: Hans Weber, Björn Fischer, Hiroshi Narahashi, Petra Erika Fischer, David Kammerlander, Magdalena Forster, Heimo Hofer, Robert Wieser, Michael Franz Treu
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Patent number: 12490485Abstract: A transistor device is disclosed.Type: GrantFiled: January 19, 2021Date of Patent: December 2, 2025Assignee: Infineon Technologies Austria AGInventors: Hans Weber, Björn Fischer, Franz Hirler, Matteo-Alessandro Kutschak, Andreas Riegler
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Patent number: 12484242Abstract: Disclosed is a method for producing a semiconductor device, the method including forming a plurality of semiconductor arrangements one above the other, wherein forming each of the plurality of semiconductor arrangements includes forming a semiconductor layer, forming a plurality of trenches in a first surface of the semiconductor layer, and implanting dopant atoms of at least one of a first type and a second type into at least one of a first sidewall and a second sidewall of each of the plurality of trenches. Forming of at least one of the plurality of semiconductor arrangements further includes forming a protective layer covering mesa regions between the plurality of trenches of the respective semiconductor layer, and covering a bottom, the first sidewall and the second sidewall of each of the plurality of trenches that are formed in the respective semiconductor layer.Type: GrantFiled: December 21, 2023Date of Patent: November 25, 2025Assignee: Infineon Technologies Austria AGInventors: Daniel Tutuc, Matthias Kuenle, Ingo Muri, Hans Weber
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Publication number: 20250239459Abstract: A method of manufacturing a semiconductor device includes forming a first mask pattern over a first surface of a wide band gap semiconductor body and forming a trench extending from an opening in the first mask pattern into the wide band gap semiconductor body. The trench includes opposing first and second sidewalls. The method further includes forming a first spacer mask pattern including a first spacer portion covering at least the first sidewall and a second spacer portion covering at least the second sidewall. The method further includes forming a second mask pattern in the trench between the first spacer portion and the second spacer portion of the first spacer mask pattern, exposing a trench portion of the trench by removing at least a portion of the second spacer portion from the trench, and introducing dopants through the trench portion into the wide band gap semiconductor body.Type: ApplicationFiled: January 8, 2025Publication date: July 24, 2025Inventors: Hans Weber, Thomas Ralf Siemieniec, Iris Moder
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Publication number: 20250226820Abstract: A method is disclosed. The method includes switching off a power transistor circuit in an electronic circuit. The electronic circuit includes a power source and a load circuit. The power transistor circuit is connected between the power source and the load circuit. Switching off the power transistor circuit includes operating at least one power transistor included in the power transistor circuit in an Avalanche mode so that at least a portion of energy stored in the electronic circuit before switching off the power transistor circuit is dissipated in the at least one power transistor.Type: ApplicationFiled: March 24, 2025Publication date: July 10, 2025Inventors: Christian Fachmann, Matteo-Alessandro Kutschak, Otto Wiedenbauer, Winfried Kaindl, Hans Weber
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Patent number: 12349401Abstract: A semiconductor device is proposed. An example of the semiconductor device includes a semiconductor body having a first main surface. A trench structure extends into the semiconductor body from the first main surface. The trench structure includes a trench electrode structure and a trench dielectric structure. The trench dielectric structure includes a gate dielectric in an upper part of the trench dielectric structure and a gap in a lower part of the trench dielectric structure. The semiconductor device further includes a body region adjoining the gate dielectric at a sidewall of the trench structure in the upper part of the trench dielectric structure. The gate dielectric extends deeper into the semiconductor body along the sidewall than the body region.Type: GrantFiled: March 15, 2022Date of Patent: July 1, 2025Assignee: Infineon Technologies Austria AGInventors: Hans Weber, David Kammerlander, Andreas Riegler
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Publication number: 20250195008Abstract: The coil arrangement comprises: a rigid base part with which the coil arrangement can be placed on a patient couch; an upper additional part including upper local coils, wherein the upper additional part is movable such that a spacing of the upper local coils from the facial, neck and upper chest area of the patient is adjustable; and a lower additional part including lower local coils. The base part, the lower additional part and the upper additional part are connected so as to be capable of being handled manually as one unit. The lower additional part, viewed from anterior to posterior, is adjustable in height relative to the base part to adjust a spacing of the lower local coils from the back of the head of the patient.Type: ApplicationFiled: December 13, 2024Publication date: June 19, 2025Applicant: Siemens Healthineers AGInventors: Christoph DICKMANN, Martin REQUARDT, Hans WEBER
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Patent number: 12273098Abstract: A method is disclosed. The method includes switching off a power transistor circuit in an electronic circuit. The electronic circuit includes a power source and a load circuit. The power transistor circuit is connected between the power source and the load circuit. Switching off the power transistor circuit includes operating at least one power transistor included in the power transistor circuit in an Avalanche mode so that at least a portion of energy stored in the electronic circuit before switching off the power transistor circuit is dissipated in the at least one power transistor.Type: GrantFiled: April 4, 2023Date of Patent: April 8, 2025Assignee: Infineon Technologies Austria AGInventors: Christian Fachmann, Matteo-Alessandro Kutschak, Otto Wiedenbauer, Winfried Kaindl, Hans Weber
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Publication number: 20250113532Abstract: Disclosed is a transistor device with an edge termination structure and a method. The method includes forming an edge termination structure of a transistor device. Forming the edge termination structure includes: forming an edge trench in an edge region of a semiconductor body such that the edge trench has a trench bottom and an inner trench sidewall facing an inner region of the semiconductor body; and forming a first edge region of a second doping type adjacent to the inner trench sidewall. Forming the first edge region includes implanting dopant atoms of the second doping type at least into the inner trench sidewall.Type: ApplicationFiled: September 26, 2024Publication date: April 3, 2025Inventors: Christian Fachmann, Franz Hirler, Winfried Kaindi, Hans Weber, Armin Willmeroth
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Publication number: 20250107202Abstract: A transistor device is disclosed. The transistor device includes a semiconductor body and plurality of transistor cells. Each transistor cell includes: a drift region and a source region of a first doping type; a body region of a second doping type complementary to the first doping type; a field shaping region of the second doping type connected to a source node; and a gate electrode connected to a gate node. The gate electrode is arranged in a trench extending from a first surface into the semiconductor body. The gate electrode is dielectrically insulated from the body region by a gate dielectric. At least portions of the gate electrode are dielectrically insulated from the drift region by a field dielectric. The field shaping region adjoins the trench. The field dielectric comprises a high-k dielectric.Type: ApplicationFiled: September 11, 2024Publication date: March 27, 2025Inventors: Thomas Aichinger, Hans Weber, Michael Hell, Wolfgang Bergner, Armin Tilke, Grazvydas Ziemys, Alexey Mikhaylov, Gerald Rescher
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Publication number: 20250056846Abstract: A transistor device and a method for producing source regions of a transistor device are disclosed. The transistor device includes a semiconductor body with a plurality of mesa regions and a plurality of transistor cells each formed in a respective one of the mesa regions. Each transistor cell includes: a source region of a first doping type; a gate region of a second doping type complementary to the first doping type and spaced apart from the source region; a channel region of the first doping type; and a transition region different from the source region and the gate region. The transition region is arranged between the source region and the gate region and adjoins both the source region and the gate region.Type: ApplicationFiled: August 5, 2024Publication date: February 13, 2025Inventors: Hans Weber, Björn Fischer, David Kammerlander, Dan Horia Popescu