Abstract: A package structure and method of forming the same are provided. The package structure includes a polymer layer, a redistribution layer, a die, and an adhesion promoter layer. The redistribution layer is disposed over the polymer layer. The die is sandwiched between the polymer layer and the redistribution layer. The adhesion promoter layer, an oxide layer, a through via, and an encapsulant are sandwiched between the polymer layer and the redistribution layer. The encapsulant is laterally encapsulates the die. The through via extends through the encapsulant. The adhesion promoter layer and the oxide layer are laterally sandwiched between the through via and the encapsulant. A bottom portion of the encapsulant is longitudinally sandwiched between the adhesion promoter layer and the polymer layer.

Abstract: In an embodiment, a device includes: an integrated circuit die; a through via adjacent the integrated circuit die; a molding compound encapsulating the integrated circuit die and the through via; and a redistribution structure including: a first conductive via extending through a first dielectric layer, the first conductive via electrically connected to the integrated circuit die, the first dielectric layer being over the integrated circuit die, the through via, and the molding compound; and a first conductive line over the first dielectric layer and the first conductive via, the first conductive via extending into the first conductive line.

Abstract: A multi-piece wheel frame includes a rim and a disc. The rim includes a barrel, and an outer rim portion protruding outwardly from the barrel. The outer rim portion forms an inclined surface, and a ring edge surface connected to an outer edge of the inclined surface and cooperating with the inclined surface to form an obtuse angle. The disc is fixed to the rim, and includes a disc core, a plurality of spoke portions extending radially outwardly from the disc core, and a reinforced ring portion connected to the spoke portions and fixed to the outer rim portion. The reinforced ring portion abuts against at least one of the inclined surface and the ring edge surface.

Abstract: An optical element and a method for manufacturing the optical element are described. The optical element includes a transparent substrate, an optical layer, and an adhesive layer. The optical layer is located on a surface of the transparent substrate. The optical layer has a first surface and a second surface, which are opposite to each other. The first surface is set with various diffracting optical structures. A refractive index of the optical layer is equal to or greater than 1.4. The adhesive layer is sandwiched between the surface of the transparent substrate and the second surface of the optical layer.

Abstract: A method for driving an electronic device includes the following steps: receiving a first image data, detecting a first frame rate corresponding to the first image data, generating at least one first scanning signal according to the first image data, receiving a second image data, detecting a second frame rate corresponding to the second image data, and generating at least one second scanning signal according to the second image data. The at least one first scanning signal has a first high voltage level value. The at least one second scanning signal has a second high voltage level value. When the first frame rate is different from the second frame rate, the first high voltage level value is different from the second high voltage level value.

Abstract: Method for preventing or reducing low speed pre-ignition events in a spark-ignited internal combustion engine is provided. The method includes supplying to the engine the lubricant composition comprising a primary additive having a structure given by or a salt thereof. R1 and R2 are independently H, C1-C20 hydrocarbyl group, carboxyl group, ester, amide, ketone, ether, or hydroxyl group. R3 and R4 are independently H, C1-C20 hydrocarbyl group, carboxyl group, ester, amide, ketone, ether, amino, or hydroxyl group or wherein R3 and R4 are part of a cyclic group. R5 is C1-C100 hydrocarbyl group, carboxyl group, ether, or hydroxyl group. Lastly, p is 0 to 2, n is 1 to 5, m is 0 to 2, and p+n+m is less than 6.

Abstract: A device includes a sensor die having a sensing region at a top surface of the sensor die, an encapsulant at least laterally encapsulating the sensor die, a conductive via extending through the encapsulant, and a front-side redistribution structure on the encapsulant and on the top surface of the sensor die, wherein the front-side redistribution structure is connected to the conductive via and the sensor die, wherein an opening in the front-side redistribution structure exposes the sensing region of the sensor die, and wherein the front-side redistribution structure includes a first dielectric layer extending over the encapsulant and the top surface of the sensor die, a metallization pattern on the first dielectric layer, and a second dielectric layer extending over the metallization pattern and the first dielectric layer.

Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.

Abstract: A micro-electro-mechanical system (MEMS) microphone is provided. The MEMS microphone includes a substrate, a diaphragm, a backplate and a first protrusion. The substrate has an opening portion. The diaphragm is disposed on one side of the substrate and extends across the opening portion of the substrate. The backplate includes a plurality of acoustic holes. The backplate is disposed on one side of the diaphragm. An air gap is formed between the backplate and the diaphragm. The first protrusion extends from the backplate towards the air gap.

Abstract: A semiconductor device includes a substrate, an epitaxial layer, a well region, a source region, a base region, a first JFET region, a second JFET region, a gate dielectric layer and a gate layer. The epitaxial layer is at a side of the substrate. The well region is in the epitaxial layer. The source region is in the well region. The base region is in the well region and adjacent to the source region. The first JFET region is adjacent to the well region. The second JFET region is in the first JFET region. A doping concentration of the second JFET region is higher than a doping concentration of the first JFET region. The gate dielectric layer is at a side of the epitaxial layer away from the substrate. The gate layer is at a side of the gate dielectric layer away from the epitaxial layer.

Abstract: A light emitting module includes a carrier, a light emitting element, a reflection layer, and a fluorescent layer. The light emitting element is disposed on the carrier. The reflection layer is disposed on the carrier and surrounds the light emitting element. The fluorescent layer covers at least part of the light emitting element. The disadvantages of over broad light emitting angle and low illuminance may be solved. Comparing with the related art, the present disclosure achieves an object of increasing the illuminance by at least 10%.

Abstract: A backlight module and an electronic device are provided. The backlight module, having a main region and a peripheral region near the main region, includes a light conversion layer, multiple light conversion patterns located in the peripheral region, and multiple light emitting units emitting a light beam. A first portion and a second portion of the light beam emitted respectively from the main region and the peripheral region both have at least one corresponding position in a CIE 1931 color space. One among the at least one corresponding position of the first portion of the light beam has corresponding coordinates (x1, y1). One among the at least one corresponding position of the second portion of the light beam has corresponding coordinates (x2, y2). The corresponding coordinates (x1, y1) and the corresponding coordinates (x2, y2) satisfy the following relation: 0?|x1?x2|?0.2.

Abstract: A method includes encapsulating a device die in an encapsulating material, forming a first dielectric layer over the device die and the encapsulating material, forming first redistribution lines extending into the first dielectric layer to electrically couple to the device die, forming an alignment mark over the first dielectric layer, wherein the alignment mark includes a plurality of elongated strips, forming a second dielectric layer over the first redistribution lines and the alignment mark, and forming second redistribution lines extending into the second dielectric layer to electrically couple to the first redistribution lines. The second redistribution lines are formed using the alignment mark for alignment.

Abstract: A semiconductor device includes a die, an encapsulant over a front-side surface of the die, a redistribution structure on the encapsulant, a thermal module coupled to the back-side surface of the die, and a bolt extending through the redistribution structure and the thermal module. The die includes a chamfered corner. The bolt is adjacent to the chamfered corner.

Abstract: An optical element and a method for manufacturing the optical element are described. The optical element includes a transparent substrate, an optical layer, and an adhesive layer. The optical layer is located on a surface of the transparent substrate. The optical layer has a first surface and a second surface, which are opposite to each other. The first surface is set with various diffracting optical structures. A refractive index of the optical layer is equal to or greater than 1.4. The adhesive layer is sandwiched between the surface of the transparent substrate and the second surface of the optical layer.

Abstract: A method of fabricating a semiconductor structure includes the following steps. A semiconductor wafer is provided. A plurality of first surface mount components and a plurality of second surface mount components are bonded onto the semiconductor wafer, wherein a first portion of each of the second surface mount components is overhanging a periphery of the semiconductor wafer. A first barrier structure is formed in between the second surface mount components and the semiconductor wafer. An underfill structure is formed under a second portion of each of the second surface mount components, wherein the first barrier structure blocks the spreading of the underfill structure from the second portion to the first portion.

Abstract: Systems, devices and methods of manufacturing a system on silicon wafer (SoSW) device and package are described herein. A plurality of functional dies is formed in a silicon wafer. Different sets of masks are used to form different types of the functional dies in the silicon wafer. A first redistribution structure is formed over the silicon wafer and provides local interconnects between adjacent dies of the same type and/or of different types. A second redistribution structure may be formed over the first redistribution layer and provides semi-global and/or global interconnects between non-adjacent dies of the same type and/or of different types. An optional backside redistribution structure may be formed over a second side of the silicon wafer opposite the first redistribution layer. The optional backside redistribution structure may provide backside interconnects between functional dies of different types.

Abstract: A centrifugal heat dissipation fan including a housing and an impeller disposed in the housing on an axis is provided. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions. A heat dissipation system of an electronic device is also provided.

Abstract: A memory controller for use in a data storage device is provided. A low-density parity check (LDPC) process performed by the memory controller includes an initial phase, a decoding phase, and an output phase. The memory controller includes a variable-node circuit and a check-node circuit. During the initial phase, the variable-node circuit performs the following steps: obtaining a channel value, that is read from a flash memory, from a channel-value memory; transmitting the channel value to the check-node circuit to calculate a syndrome; and in response to the syndrome not being 0, setting a value of a register corresponding to each entry of a plurality of entries in a variable-node memory, and entering the decoding phase.

Abstract: A memory controller for use in a data storage device is provided. The memory controller includes a variable-node circuit and a check-node circuit. The check-node circuit obtains a codeword difference from the variable-node circuit, and calculates a syndrome according to the codeword difference. The variable-node circuit includes a threshold-tracking circuit which is configured to track a threshold used by the variable-node circuit during a low-density parity check (LDPC) decoding process to determine whether the variable-node circuit has entered a trapping status. In response to determining that the variable-node circuit has entered the trapping status during the LDPC decoding process, the variable-node circuit switches a bit-flipping algorithm used by the variable-node circuit during the LDPC decoding process from a first flipping strategy to a post-processing flipping strategy to bring the variable-node circuit out of the trapping status.