Patents by Inventor Haobo Wang

Haobo Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967970
    Abstract: A scheme for determining a flipping energy used in a bit-flipping decoder. The flipping energy is determined based on: a weight of at least one check node coupled to a column; a syndrome as a product of a noisy codeword and a parity check matrix; and a hard decision value of a previous iteration and a channel output value associated with the column.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: April 23, 2024
    Assignee: SK hynix Inc.
    Inventors: Fan Zhang, Meysam Asadi, Haobo Wang
  • Patent number: 11960989
    Abstract: A controller estimates optimal read threshold values for a memory device using deep learning. The memory device includes multiple pages coupled to select word lines in a memory region. The controller performs multiple read operations on a select type of page for each word line using multiple read threshold sets, obtains fail bit count (FBC) information associated with each read operation, and determines an optimal read threshold set for each word line based on the FBC information. When optimal read threshold sets for the select word lines are different each other, the controller predicts a best read threshold set using the optimal read threshold sets.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: April 16, 2024
    Assignee: SK hynix Inc.
    Inventors: Fan Zhang, Aman Bhatia, Xuanxuan Lu, Meysam Asadi, Haobo Wang
  • Patent number: 11949430
    Abstract: An LDPC encoding method and a system for error code detection. In the method and system, partial syndromes using a user portion and a low density parity check matrix are calculated, a parity portion of a codeword is calculated using the partial syndromes and using a quasi-cyclic matrix, the parity portion is generated by segment processing of the quasi-cyclic matrix, and the user portion and the parity portion are concatenated to complete the codeword.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: April 2, 2024
    Assignee: SK hynix Inc.
    Inventors: Fan Zhang, Haobo Wang, Hongwei Duan
  • Publication number: 20240106460
    Abstract: To improve error correction when errors occur in consecutive bits of user data, the user data can be stored in an interleaved manner. Data of a data unit can be interleaved to generate a permutated data unit. A checksum of the permutated data unit can then be calculated, and an error correction code can be generated over the data unit and the checksum. The error correction code can also be interleaved to generate a permutated error correction code. The permutated data unit, the checksum, and the permutated error correction code can then be concatenated to generate a storage data unit for storage in a memory.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 28, 2024
    Inventors: Fan Zhang, Hongwei Duan, Haobo Wang
  • Publication number: 20240103727
    Abstract: Devices, systems, and methods for reducing a latency of a decoder in a non-volatile memory are described. An example method includes receiving a noisy codeword that is based on a transmitted codeword generated from a low-density parity-check (LDPC) code, the LDPC code having an associated parity matrix comprising a plurality of columns of circulant matrices, performing a sorting operation that sorts the plurality of columns of circulant matrices in a descending order of a first quality metric to generate a plurality of sorted columns of circulant matrices, the first quality metric indicative of a number of errors in a corresponding column of circulant matrices, and iteratively processing the plurality of sorted columns of circulant matrices to determine a candidate version of the transmitted codeword.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 28, 2024
    Inventors: Fan ZHANG, Meysam ASADI, Haobo WANG
  • Publication number: 20240086101
    Abstract: A memory system or a method for estimating channel information to be used for error decoding. The memory system or the method a) performs one or more read operations on a page selected from among the plurality of pages using a target read threshold, b) obtains the target read threshold, a historical read threshold voltage set associated with failed read operations of the selected page, checksum values, and asymmetric ratios of ones count and zeros count which are associated with the historical read threshold voltage set, c) provides the obtained target read threshold, historical read threshold voltage set, checksum values and asymmetric ratios as input information to a neural network, and d) predicts, by the neural network, channel information at the target read threshold based on the input information and a set activation function.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: Haobo WANG, Meysam ASADI, Fan ZHANG
  • Publication number: 20240086149
    Abstract: A method and a system for operating a deep neural network. In the method and system, a subset of floating-point values are used to represent weights in the DNN; the floating-point values are quantized onto a flexible-power-of-two (FPoT) alphabet; values in the FPoT alphabet are listed in a plurality of regions; and an empty region among the plurality of regions is merged to neighbour regions to output dusters of the weights in merged regions, the merged regions having respective centroids and boundary lines in between.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: Fan ZHANG, Seyhan KARAKULAK, Haobo WANG, Meysam ASADI
  • Publication number: 20240088915
    Abstract: A scheme for determining a flipping energy used in a bit-flipping decoder. The flipping energy is determined based on: a weight of at least one check node coupled to a column; a syndrome as a product of a noisy codeword and a parity check matrix; and a hard decision value of a previous iteration and a channel output value associated with the column.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: Fan ZHANG, Meysam Asadi, Haobo Wang
  • Publication number: 20240080042
    Abstract: A method for operating an MS decoder and an associated memory system utilizing the MS decoder. The method determines an operation mode of the MS decoder. For each variable node, the method calculates a variable to check node V2C message. The method stores, in a check node unit CNU memory, check information associated with the calculated V2C message according to the operation mode. The check information includes full information when the operation mode is a high precision mode, and partial information when the operation mode is a low precision mode.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Inventors: Fan ZHANG, Hongwei DUAN, Haobo WANG
  • Publication number: 20240080046
    Abstract: An LDPC encoding method and a system for error code detection. In the method and system, partial syndromes using a user portion and a low density parity check matrix are calculated, a parity portion of a codeword is calculated using the partial syndromes and using a quasi-cyclic matrix, the parity portion is generated by segment processing of the quasi-cyclic matrix, and the user portion and the parity portion are concatenated to complete the codeword.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Inventors: Fan ZHANG, Haobo WANG, Hongwei DUAN
  • Patent number: 11907571
    Abstract: A controller optimizes read threshold values for a memory device using domain transformation. The controller determines, for decoded data of each read operation, an asymmetric ratio (AR) and a number of unsatisfied checks (USCs), the AR indicating a ratio of a number of a first binary value to a number of a second binary value in the decoded data. The controller determines a Z-axis such that AR values of threshold sets are arranged in a set order along the Z-axis. The controller determines an optimum read threshold set using coordinate values on the Z-axis, which correspond to a set AR value and a set USC value.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: February 20, 2024
    Assignee: SK hynix Inc.
    Inventors: Fan Zhang, Aman Bhatia, Haobo Wang
  • Patent number: 11881871
    Abstract: Decoding method and memory system that decodes data and estimates a weighted checksum on the decoded data to determine whether the decoding is successful. The weighted checksum is calculated based on a first group and a second group, the first group is associated with weights for high degree nodes of an irregular parity check matrix, and the second group is associated with weights for low degree nodes of the irregular parity check matrix.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: January 23, 2024
    Assignee: SK hynix Inc.
    Inventors: Fan Zhang, Haobo Wang, Meysam Asadi
  • Patent number: 11854629
    Abstract: A scheme for non-parametric optimal read threshold estimation of a memory system. The memory system includes a memory device including pages and a controller including a neural network. The controller performs read operations on a selected page using a read threshold set; obtain the read threshold set, a checksum value and an asymmetric ratio of ones count and zeros count which are associated with decoding of the selected page according to each of the read operations; provide the obtained read threshold set, the checksum value and the asymmetric ratio as input information to the neural network; and estimate, by the neural network, an optimal read threshold voltage based on the input information and weights including a combination of multiple matrices and bias vectors.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: December 26, 2023
    Assignee: SK hynix Inc.
    Inventors: Fan Zhang, Aman Bhatia, Haobo Wang
  • Publication number: 20230392409
    Abstract: The present invention relates to a hinged quick installation fence, comprising at least two fence piece units and a ground inserting rod, the fence piece unit includes at least two fence pieces and a connecting hinge, the fence pieces are rotatably connected together by the connecting hinge, and the leftmost fence piece is provided with a left hinge member, the rightmost fence piece is provided with a right hinge member, the adjacent fence piece units are connected in pairs correspondingly through the left hinge member and the right hinge member, and the ground inserting rod is inserted into the left hinge member and the right hinge member and fixed, and the fence piece units form a fence for use. The advantageous effects of the present invention are as following: the hinged quick installation fence can be transported, installed and stored more conveniently by combining two or more fence pieces into a fence piece unit, thereby saving manpower and time costs.
    Type: Application
    Filed: June 30, 2022
    Publication date: December 7, 2023
    Inventor: Haobo Wang
  • Patent number: 11769555
    Abstract: Embodiments provide a scheme for estimating an optimal read threshold voltage using a deep neural network (DNN) with reduced number of processing. A controller receives first and second program voltage (PV) levels associated with read operations on cells. The controller estimates first and second probability distribution parameter sets representing skew normal distributions of the first and second PV levels, respectively. The controller estimates an optimal read threshold voltage based on the first and second probability distribution parameter sets. The optimal read threshold voltage is a read threshold voltage such that first probability density function (PDF) value of the skew normal distribution of the first PV level is the same as the second PDF value of the skew normal distribution of the second PV level.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: September 26, 2023
    Assignee: SK hynix Inc.
    Inventors: Haobo Wang, Aman Bhatia, Fan Zhang
  • Patent number: 11770133
    Abstract: A method and system for LDPC decoding method. In the method and system, an LDPC codeword is decoded using a quasi-cyclic matrix. A first message for variable nodes in a circulant column of the quasi-cyclic matrix and a second message for check nodes belonging to the circulant column are computed. Parity and syndrome are computed using the computed first and second messages. A bit error rate is calculated for both a first mode with no error in a parity portion of a codeword and a second mode with errors in the parity portion of the codeword.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: September 26, 2023
    Assignee: SK hynix Inc.
    Inventors: Meysam Asadi, Fan Zhang, Haobo Wang
  • Patent number: 11769556
    Abstract: Embodiments provide a scheme for estimating an optimal read threshold voltage using a deep neural network (DNN) with a reduced number of processing. A controller includes a combined neural network, which receives first and second cumulative distribution function (CDF) values, each CDF value corresponding to a program voltage (PV) level associated with a read operation on the cells. The combined neural network generates first and second connection vectors based on the first and second CDF values and first weight values, and estimates an optimal read threshold voltage based on the first and second connection vectors and second weight values.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: September 26, 2023
    Assignee: SK hynix Inc.
    Inventors: Haobo Wang, Aman Bhatia, Fan Zhang
  • Patent number: D1009300
    Type: Grant
    Filed: April 25, 2023
    Date of Patent: December 26, 2023
    Assignee: GUANGZHOU MIBO ZHILIAN TECHNOLOGY CO. LTD
    Inventor: Haobo Wang
  • Patent number: D1012317
    Type: Grant
    Filed: June 28, 2023
    Date of Patent: January 23, 2024
    Assignee: GUANGZHOU MIBO ZHILIAN TECHNOLOGY CO. LTD
    Inventors: Ziyi Long, Haobo Wang, Zeping Yang
  • Patent number: D1021278
    Type: Grant
    Filed: October 9, 2023
    Date of Patent: April 2, 2024
    Assignee: Shenzhen Qianhai Runway Technology Co., LTD.
    Inventors: Jing Wang, Haobo Chen