Patents by Inventor Haoliang ZHENG

Haoliang ZHENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210201840
    Abstract: The present disclosure is related to a driving circuit of a display panel. The driving circuit may include a turn-on voltage adjusting circuit. The turn-on voltage adjusting circuit may include a control subcircuit and a switching and voltage division subcircuit. The switching and voltage division subcircuit may include a switching subcircuit and a basic voltage division subcircuit. The switching subcircuit may be configured to perform voltage division of a signal outputted by the output terminal of the control subcircuit to form a voltage division feedback signal of the corresponding resolution under control of the control signal and output the voltage division feedback signal to the voltage division feedback node.
    Type: Application
    Filed: April 8, 2018
    Publication date: July 1, 2021
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Guangliang Shang, Liugang Zhou, Haoliang Zheng, Yaoqiu Jing, Mingfu Han, Seungwoo Han
  • Publication number: 20210193027
    Abstract: A shift register includes an input sub-circuit, a control sub-circuit, an output sub-circuit and a reset sub-circuit. The input sub-circuit is configured to transmit an input signal from an input signal terminal to a pull-up node. The control sub-circuit is configured to transmit a clock signal from a clock signal terminal to the control node. The output sub-circuit is configured to transmit a second voltage signal from a second voltage signal terminal to a first output signal terminal, and to transmit a first voltage signal from a first voltage signal terminal to the first output signal terminal. The reset sub-circuit is configured to transmit the second voltage signal to the control node to reset the control node, and to transmit a third voltage signal from the third voltage signal terminal to the pull-up node to reset the pull-up node.
    Type: Application
    Filed: October 30, 2020
    Publication date: June 24, 2021
    Inventors: Haoliang ZHENG, Dongni LIU, Minghua XUAN, Zhenyu ZHANG, Li XIAO, Liang CHEN, Hao CHEN, Guangliang SHANG, Lijun YUAN, Xing YAO
  • Publication number: 20210166601
    Abstract: The present disclosure provides a gate driving unit, a gate driving method, a gate driving circuitry and a display device. The gate driving unit includes a reverse-phase gate driving signal output end, a normal-phase gate driving signal output end, an input circuitry, an output control circuitry, an input node control circuitry and an output circuitry. The input circuitry is configured to control an input end to be electrically connected to an input node under the control of a first clock signal. The output control circuitry is configured to control a potential at an output node under the control of a potential at the input node and a second clock signal. The input node control circuitry is configured to control the potential at the input node in accordance with the potential at the output node under the control of the second clock signal.
    Type: Application
    Filed: March 18, 2020
    Publication date: June 3, 2021
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Guangliang SHANG, Lijun YUAN, Haoliang ZHENG, Libin LIU, XING YAO, Seungwoo HAN
  • Patent number: 11012274
    Abstract: A demultiplexer includes a voltage boost circuit and at least one data selection output circuit. The voltage boost circuit is coupled to N second-stage selection signal input terminals and N first-stage selection signal input terminals, N is greater than or equal to 2, and N is a positive integer. Each data selection output circuit is coupled to a data input terminal, N data output terminals and the N first-stage selection signal input terminals.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: May 18, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lijun Yuan, Haoliang Zheng, Guangliang Shang, Xing Yao, Mingfu Han
  • Publication number: 20210132428
    Abstract: A display substrate and a manufacturing method thereof and a display device are disclosed. The manufacturing method of the display substrate includes: forming a first display electrode; and forming a thin film transistor, which includes forming a semiconductor layer; The first display electrode and the semiconductor layer are in one same layer, and a step of forming the first display electrode is performed before performing a step of forming the semiconductor layer.
    Type: Application
    Filed: January 3, 2019
    Publication date: May 6, 2021
    Inventors: Wenjun XIAO, Shijun WANG, Hehe HU, Haoliang ZHENG, Xi CHEN, Xiaochuan CHEN, Guangcai YUAN
  • Patent number: 10991289
    Abstract: The present disclosure is related to a memory-in-pixel circuit. The memory-in-pixel circuit comprises a switch sub-circuit, and a data input sub-circuit. The data input sub-circuit comprises a first floating gate transistor and a second floating gate transistor. The data input sub-circuit is configured to transmit a data signal from one of a plurality of data lines to a pixel electrode under control of the switch sub-circuit.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: April 27, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Guangliang Shang, Chengyou Han, Mingfu Han, Lijun Yuan, Xing Yao, Haoliang Zheng
  • Patent number: 10964243
    Abstract: A shift register circuit according to an embodiment of the present disclosure includes an input sub-circuit and N-stage output sub-circuits. The input sub-circuit is configured to transmit an input signal to a pull up node at a first stage. The output sub-circuit at each stage is configured to transmit a clock signal from a clock signal terminal at a same stage to an output signal terminal at the same stage under the control of a pull-up node at the same stage. The output sub-circuit at each stage is further configured to transmit a signal transmitted to an output signal terminal at the same stage to a pull-up node at an immediately subsequent stage under the control of a shift control signal from a shift control signal terminal at the same stage.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: March 30, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lijun Yuan, Xing Yao, Guangliang Shang, Haoliang Zheng, Zhenyu Zhang
  • Patent number: 10943552
    Abstract: A shift register unit cascaded in a gate drive circuit, wherein the shift register unit comprises: a control circuit configured to output a control signal, at least two buffer circuits coupled to the control circuit, each of the at least two buffer circuits configured to output scan signal to a gate line. As such, the scan signals output from the at least two buffer circuits would be synchronized so that the gate lines respectively coupled to the two buffer circuits can be scanned simultaneously.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: March 9, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiha Kim, Seungwoo Han, Guangliang Shang, Haoliang Zheng, Xing Yao, Zhichong Wang, Mingfu Han, Lijun Yuan, Yunsik Im, Jing Lv, Xue Dong
  • Publication number: 20210027699
    Abstract: Disclosed are a display panel and a display device. The display panel includes M rows and N columns of pixel units. The display panel is divided into R regions along a column direction, and an i-th region includes: (1+M(i?1)/R)-th row to a (Mi/R)-th row of pixel units. The display panel further includes M shift registers, M light emitting drivers, R light emitting control scan staring signal terminals, R scan start signal terminals for controlling time length and R scan start signal terminals for controlling current. An i-th row of pixel units is connected with an i-th shift register and an i-th light emitting driver, a light emitting driver connected to a first row of pixel units in the i-th region is connected with an i-th scan start signal terminal for controlling light emission.
    Type: Application
    Filed: June 18, 2020
    Publication date: January 28, 2021
    Inventors: Haoliang ZHENG, Minghua XUAN, Dongni LIU, Ning CONG, Zhenyu ZHANG, Lijun YUAN, Yi OUYANG, Guangliang SHANG
  • Patent number: 10902810
    Abstract: The present disclosure relates to an array substrate gate driving unit and an apparatus thereof, a driving method and a display apparatus. The array substrate gate driving unit includes: an input circuit, connected with an input signal terminal and a pull-up node PU; a pull-down circuit, connected with a first voltage signal terminal and the pull-up node PU; a pull-down control circuit, connected with the pull-down circuit via a pull-down node PD; an output circuit, connected with a clock signal terminal CLK, a second voltage signal terminal and a control circuit; a reset circuit, connected with a reset signal terminal Reset, the first voltage signal terminal and the pull-up node PU; and the control circuit, connected with the pull-up node PU and the output circuit.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: January 26, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Mingfu Han, Guangliang Shang, Xing Yao, Seung Woo Han, Jiha Kim, Haoliang Zheng, Lijun Yuan, Zhichong Wang
  • Patent number: 10872572
    Abstract: The embodiments of the present disclosure provide a gate driving circuit and a method for controlling the same, and a display apparatus.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: December 22, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Guangliang Shang, Seungwoo Han, Lijun Yuan, Mingfu Han, Haoliang Zheng, Xing Yao, Zhenyu Zhang
  • Patent number: 10867687
    Abstract: A shift register unit and a method for driving the same, a gate drive circuitry and a display device are provided. The shift register unit includes: an output circuit, coupled to a first signal output terminal and a pull-up control node, and configured to receive a first clock signal and output the first clock signal to the first signal output terminal under control of a potential of the pull-up control node; an output control circuit, coupled to a signal input terminal, the pull-up control node and the first signal output terminal; a clock control circuit configured to receive a first clock signal and at least one additional clock signal and generate a second clock signal using the first clock signal and the at least one additional clock signal; and a transmission circuit coupled to a second signal output terminal and the pull-up control node.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: December 15, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xing Yao, Mingfu Han, Guangliang Shang, Haoliang Zheng, Lijun Yuan, Zhenyu Zhang
  • Publication number: 20200388217
    Abstract: The present disclosure discloses a circuit, a driving method thereof, a display panel and a display device. The circuit may include: a signal control module, a compensation control module, an initialization module, a data writing module, a driving control module, and a light emitting device. With the signal control module which is cooperated with other modules, the threshold voltage compensation time of the driving transistor can be increased, and the threshold voltage compensation can be ensured, thereby improving the image display quality.
    Type: Application
    Filed: May 14, 2018
    Publication date: December 10, 2020
    Inventors: Lijun YUAN, Mingfu HAN, Zhichong WANG, Haoliang ZHENG, Seungwoo HAN, Guangliang SHANG
  • Publication number: 20200388201
    Abstract: The embodiments of the present application provide a shift register unit and a method for driving the same, a gate driving circuit, and a display apparatus. Here, the shift register unit includes a first controlling sub-circuit, a first voltage dividing sub-circuit, a charging and discharging sub-circuit, and an outputting sub-circuit. Here, an output signal of the outputting sub-circuit is controlled by the charging and discharging sub-circuit. A first input signal and a second input signal input at a first input signal terminal Forward and a second input signal terminal Backward electrically coupled to the charging and discharging sub-circuit are pulse signals.
    Type: Application
    Filed: April 12, 2019
    Publication date: December 10, 2020
    Inventors: Zhichong Wang, Seungwoo Han, Guangliang Shang, Haoliang Zheng, Lijun Yuan, Xing Yao, Mingfu Han
  • Patent number: 10818239
    Abstract: The present disclosure provides a pixel driving circuit and a method for driving the same, a pixel unit, and a display panel.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: October 27, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lijun Yuan, Guangliang Shang, Xing Yao, Haoliang Zheng, Mingfu Han
  • Patent number: 10811114
    Abstract: Embodiments of the present application provide a shift register unit, a method for driving the same, a gate driving circuit, and a display apparatus. The shift register unit comprises at least two sub-circuits of a first output sub-circuit, a second output sub-circuit, and a third output sub-circuit. The first output sub-circuit is configured to output a voltage at a signal output terminal to a reset signal output terminal; the second output sub-circuit is configured to output the voltage at the signal output terminal to a gating signal output terminal; and the third output sub-circuit is configured to output a voltage at a second voltage terminal to a light-emitting control signal output terminal or is configured to output a voltage at a first voltage terminal to the light-emitting control signal output terminal.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: October 20, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lijun Yuan, Mingfu Han, Seung Woo Han, Xing Yao, Zhichong Wang, Guangliang Shang, Haoliang Zheng
  • Publication number: 20200273419
    Abstract: A shift register unit and a driving method, a grid driving circuit and a display device are disclosed. A shift register unit includes an input circuit, a first reset circuit, and an output circuit. The input circuit includes an input terminal configured to perform a first control on the first control node and the first node in response to an input signal of the input terminal, and then perform a second control on the first node under the control of the level of the first node, the first node is located in a path where the input signal incurs the first control; the first reset circuit is configured to reset the first control node in response to the first reset signal; the output circuit is configured to output an output signal to an output terminal under the control of the level of the first control node.
    Type: Application
    Filed: November 5, 2018
    Publication date: August 27, 2020
    Inventors: Zhichong WANG, Haoliang ZHENG, Guangliang SHANG, Seung Woo HAN, Yinglong HUANG
  • Publication number: 20200265763
    Abstract: The present disclosure is related to a memory-in-pixel circuit. The memory-in-pixel circuit comprises a switch sub-circuit, and a data input sub-circuit. The data input sub-circuit comprises a first floating gate transistor and a second floating gate transistor. The data input sub-circuit is configured to transmit a data signal from one of a plurality of data lines to a pixel electrode under control of the switch sub-circuit.
    Type: Application
    Filed: September 27, 2018
    Publication date: August 20, 2020
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Guangliang Shang, Chengyou Han, Mingfu Han, Lijun Yuan, Xing Yao, Haoliang Zheng
  • Publication number: 20200258463
    Abstract: A shift register unit cascaded in a gate drive circuit, wherein the shift register unit comprises: a control circuit configured to output a control signal, at least two buffer circuits coupled to the control circuit, each of the at least two buffer circuits configured to output scan signal to a gate line. As such, the scan signals output from the at least two buffer circuits would be synchronized so that the gate lines respectively coupled to the two buffer circuits can be scanned simultaneously.
    Type: Application
    Filed: October 31, 2017
    Publication date: August 13, 2020
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiha Kim, Seungwoo Han, Guangliang Shang, Haoliang Zheng, Xing Yao, Zhichong Wang, Mingfu Han, Lijun Yuan, Yunsik IM, Jing Lv, Xue Dong
  • Patent number: 10719126
    Abstract: A virtual reality glasses is disclosed. The virtual reality glasses includes a glasses body, a headband, a drive device and a control device. Two ends of the headband are respectively connected to two ends of the glasses body, and at least one pressure detection device is provided on the headband and/or the glasses body and is configured to detect a pressure applied on a head by at least one of the headband and the glasses body; the drive device is configured to tension and loosen the headband; the control device is configured to communicate with the pressure detection device and the drive device, so as to allow the control device to control the drive device to tension or loosen the headband based on the pressure applied on the head by the at least one of the headband and the glasses body.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: July 21, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiangxiang Zou, Haoliang Zheng