Abstract: A shift register unit and a method for driving the same, a gate drive circuitry and a display device are provided. The shift register unit includes: an output circuit, coupled to a first signal output terminal and a pull-up control node, and configured to receive a first clock signal and output the first clock signal to the first signal output terminal under control of a potential of the pull-up control node; an output control circuit, coupled to a signal input terminal, the pull-up control node and the first signal output terminal; a clock control circuit configured to receive a first clock signal and at least one additional clock signal and generate a second clock signal using the first clock signal and the at least one additional clock signal; and a transmission circuit coupled to a second signal output terminal and the pull-up control node.

Abstract: A shift register circuit according to an embodiment of the present disclosure includes an input sub-circuit and N-stage output sub-circuits. The input sub-circuit is configured to transmit an input signal to a pull up node at a first stage. The output sub-circuit at each stage is configured to transmit a clock signal from a clock signal terminal at a same stage to an output signal terminal at the same stage under the control of a pull-up node at the same stage. The output sub-circuit at each stage is further configured to transmit a signal transmitted to an output signal terminal at the same stage to a pull-up node at an immediately subsequent stage under the control of a shift control signal from a shift control signal terminal at the same stage.

Abstract: A driving method of a display panel, a display panel and a display device are disclosed. The method includes: for a first row of sub-pixels and a second row, adjacent to the first row, of sub-pixels, during a display period of a first frame image, inputting data signals to the first row of sub-pixels in a first order, and inputting data signals to the second row of sub-pixels in a second order opposite to the first order; and during a display period of a second frame image adjacent to the first frame image, inputting data signals to the first row of sub-pixels in the second order and inputting data signals to the second row of sub-pixels in the first order.

Abstract: An array substrate, a display panel, a display device and a driving method. The array substrate includes: a plurality of first pixel units arranged in an array in a first region; a first gate driving circuit a second gate driving circuit; a plurality of first gate lines connected with the first gate driving circuit; and a plurality of second gate lines connected with the second gate driving circuit. A first portion of the plurality of first pixel units is connected with the plurality of first gate lines, and each first pixel unit in the first portion is connected with one of the plurality of first gate lines; and a second portion of the plurality of first pixel units is connected with the plurality of second gate lines, and each first pixel unit in the second portion is connected with one of the plurality of second gate lines.

Abstract: The present disclosure discloses a source driving circuit and a display panel. The source driving circuit includes a plurality of driving sub-circuits, and each of the plurality of driving sub-circuits includes: a driver, including a plurality of source channels; a plurality of switches, first terminals of the plurality of switches are electrically connected to a plurality of data lines of a display panel in one-to-one correspondence, wherein each of the plurality of source channels is electrically connected to second terminals of at least two of the plurality of switches; and a control line, electrically connected to control terminals of the plurality of switches. Sub-pixels corresponding to data lines that are electrically connected to a same source channel through the switches have the same polarity and the same color.

Abstract: The embodiments of the present disclosure provide a gate driving circuit and a method for controlling the same, and a display apparatus.

Abstract: There is provided in the present disclosure a shift register unit, comprising: an input circuit, whose first terminal is connected to a power supply terminal, second terminal is connected to an input terminal, and third terminal is connected to a pull-up node, the input circuit being configured to input a power supply signal input by the power supply terminal to the pull-up node under the control of an input signal; a pull-up control circuit, whose first terminal is connected to a first clock signal terminal, and second terminal is connected to the pull-up node, the pull-up control circuit being configured to control a potential of the pull-up node according to a first clock signal input by the first clock signal terminal; a pull-up circuit, whose first terminal is connected to a first signal terminal, second terminal is connected to an output terminal, third terminal is connected to the pull-up node.

Abstract: The present disclosure relates to an array substrate gate driving unit and an apparatus thereof, a driving method and a display apparatus. The array substrate gate driving unit includes: an input circuit, connected with an input signal terminal and a pull-up node PU; a pull-down circuit, connected with a first voltage signal terminal and the pull-up node PU; a pull-down control circuit, connected with the pull-down circuit via a pull-down node PD; an output circuit, connected with a clock signal terminal CLK, a second voltage signal terminal and a control circuit; a reset circuit, connected with a reset signal terminal Reset, the first voltage signal terminal and the pull-up node PU; and the control circuit, connected with the pull-up node PU and the output circuit.

Abstract: The present disclosure provides a pixel driving circuit and a method for driving the same, a pixel unit, and a display panel.

Abstract: The present disclosure relates to a pixel driving circuit for switching display resolution, a driving method thereof, and a display apparatus. The pixel driving circuit comprises: r first data lines and k second data lines, each of the first data lines has a first switch provided thereon, and is connected to at least one of the k second data lines through at least one second switch respectively, and the first switch and the second switch are connected to a signal control unit which is configured to control the first switch to be turned on and the second switch to be turned off when display is to be performed at a first resolution, and control the first switch to be turned off and the second switch to be turned on when display is to be performed at a second resolution.

Abstract: A shift-buffer circuit, a gate driving circuit, a display panel, a display device, and a driving method. The shift-buffer circuit includes: a shift register and a plurality of buffers connected with the shift register. The shift register includes a shift output terminal; the shift register is configured to output a shift output signal from the shift output terminal, in response to a shift clock signal; each of the buffers includes a buffer input terminal and a buffer output terminal, the buffer input terminal being connected with the shift output terminal; each of the buffers is configured to output a buffer output signal from the buffer output terminal, in response to a buffer clock signal.

Abstract: A shift-buffer circuit, a gate driving circuit, a display panel, a display device, and a driving method. The shift-buffer circuit includes: a shift register and a plurality of buffers connected with the shift register. The shift register includes a shift output terminal; the shift register is configured to output a shift output signal from the shift output terminal, in response to a shift clock signal; each of the buffers includes a buffer input terminal and a buffer output terminal, the buffer input terminal being connected with the shift output terminal; each of the buffers is configured to output a buffer output signal from the buffer output terminal, in response to a buffer clock signal.

Abstract: The embodiments of the present disclosure provide a partition-based gate driving method and apparatus and a gate driving unit, and relates to the field of display technology. In the embodiments of the present disclosure, the partition-based gate driving method comprises: generating a control signal according to an acquired human eye observation partition; generating a second clock signal or a third clock signal according to the control signal; and controlling a second output signal according to the second clock signal or controlling a third output signal according to the third clock signal, thereby controlling the display area to be displayed by partitions.

Abstract: A display device integrated with touch function and a driving method thereof, the display device comprising: a display unit (101); a touch detection circuit (102) configured to conduct touch detection, and generate a plurality of touch detection signals; and a driving unit (105) configured to simultaneously driving a data refresh of the display unit (101) and the touch detection of the touch detection circuit (102), wherein region for data refresh and region for touch detection do not overlap at the same time period. The present disclosure prolongs the charging time for the display pixels and solves the problem of insufficient charging time of the integrated touch high resolution display device by a simultaneous touch and the display driving. In the meantime, by incorporating a reference unit, a reference voltage which is not affected by touching and can reflect in real time the signal interferences caused by display driving (namely, data refresh) is obtained.

Abstract: The present disclosure relates to an array substrate, a display panel and a display device. The array substrate includes a plurality of shift register units, a plurality of gate lines and a plurality of data lines crossing the plurality of gate lines. The plurality of gate lines crossing the plurality of data lines defines a plurality of pixel regions. Each of the pixel regions is divided into a driving zone and a pixel unit zone. A plurality of the driving zones in a same column constitute at least one unit region and each of the shift register units is disposed in one of the unit regions to provide scanning signals to the gate line connected thereto.

Abstract: A demultiplexer includes a voltage boost circuit and at least one data selection output circuit. The voltage boost circuit is coupled to N second-stage selection signal input terminals and N first-stage selection signal input terminals, N is greater than or equal to 2, and N is a positive integer. Each data selection output circuit is coupled to a data input terminal, N data output terminals and the N first-stage selection signal input terminals.

Abstract: A driving method of a display panel, a display panel and a display device are disclosed. The method includes: for a first row of sub-pixels and a second row, adjacent to the first row, of sub-pixels, during a display period of a first frame image, inputting data signals to the first row of sub-pixels in a first order, and inputting data signals to the second row of sub-pixels in a second order opposite to the first order; and during a display period of a second frame image adjacent to the first frame image, inputting data signals to the first row of sub-pixels in the second order and inputting data signals to the second row of sub-pixels in the first order.

Abstract: The present disclosure discloses a gate drive circuit, a display panel and a driving method for the gate drive circuit. The gate drive circuit includes a plurality of shift register units connected in cascade; and further includes: buffer units which are in a one-to-one correspondence with shift register units at all levels, and touch control switch units which are in a one-to-one correspondence with shift register units at even levels. Each buffer unit in the gate drive circuit can increase the holding time of the effective pulse signal output by the shift register unit at a corresponding level by one line before resetting, and the effective pulse signal output by a buffer unit at an even level under the control of a touch control unit and the effective pulse signal output by a buffer unit at an adjacent previous odd level are reset at the same time.

Abstract: There is provided in the present disclosure a shift register unit, comprising: an input circuit, whose first terminal is connected to a power supply terminal, second terminal is connected to an input terminal, and third terminal is connected to a pull-up node, the input circuit being configured to input a power supply signal input by the power supply terminal to the pull-up node under the control of an input signal; a pull-up control circuit, whose first terminal is connected to a first clock signal terminal, and second terminal is connected to the pull-up node, the pull-up control circuit being configured to control a potential of the pull-up node according to a first clock signal input by the first clock signal terminal; a pull-up circuit, whose first terminal is connected to a first signal terminal, second terminal is connected to an output terminal, third terminal is connected to the pull-up node.

Abstract: An array substrate, a display panel, a display device and a driving method. The array substrate includes: a plurality of first pixel units arranged in an array in a first region; a first gate driving circuit a second gate driving circuit; a plurality of first gate lines connected with the first gate driving circuit; and a plurality of second gate lines connected with the second gate driving circuit. A first portion of the plurality of first pixel units is connected with the plurality of first gate lines, and each first pixel unit in the first portion is connected with one of the plurality of first gate lines; and a second portion of the plurality of first pixel units is connected with the plurality of second gate lines, and each first pixel unit in the second portion is connected with one of the plurality of second gate lines.