Patents by Inventor Harish R
Harish R has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11978058Abstract: Systems and methods provide customers with a need-based warranty using a deep learning neural network. After categorizing, a customer need is mapped to a warranty type based on the SLA needs. Warranties may then be suggested based on customer need. In another embodiment, systems and methods detect an optimal warranty based on part failure and performance of a server. A mean time to resolve or replace can be minimized in future failure instances by comparing the derived replacement time with available warranty offerings to identify potential deviations and thereby recommend an optimal warranty from the available offerings. In a further embodiment, systems and methods identify and offer additional service contracts for vender services. A warranty proposer looks for warranty types that are emitted by a warranty-types analyzer and by a technical-support analyzer. The overlapping warranty offers are provided to customers.Type: GrantFiled: August 24, 2021Date of Patent: May 7, 2024Assignee: Dell Products, L.P.Inventors: Vaideeswaran Ganesan, Chandrasekhar R, Rekha Ms, Harish Babu, Praveen Lalgoudar, Nikhil S, Pandiyan Varadharajan, Rushyendra Velamuri, Nidhi Kant Arora, Sandeep Venkatesh Pai
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Patent number: 11978514Abstract: An indication to perform a write operation at a memory component can be received. A voltage pulse can be applied to a destination block of the memory component to store data of the write operation, the voltage pulse being at a first voltage level associated with a programmed state. An erase operation for the destination block can be performed to change the voltage state of the memory cell from the programmed state to a second voltage state associated with an erased state. A write operation can be performed to write the data to the destination block upon changing the voltage state of the memory cell to the second voltage state.Type: GrantFiled: June 28, 2021Date of Patent: May 7, 2024Assignee: Micron Technology, Inc.Inventors: Vamsi Pavan Rayaprolu, Kishore Kumar Muchherla, Harish R. Singidi, Ashutosh Malshe
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Publication number: 20240127168Abstract: Systems and methods for use in mapping an interior space of a product storage facility include at least one sensor that captures distance measurement data with respect to an interior space of the product storage facility. A computing device obtains a first image representing a 2-dimensional map of the interior space of the product storage facility and processes this image to define a boundary of the interior space of the product storage facility and detect individual structures located within the interior space of the product storage facility. Then, the computing device defines separate department areas, assigns a department label to each of the separate department areas, and converts the 2-dimensional map representing the detected structures and the defined separate department areas and the department labels assigned to the separate department areas into a second image representing a 3-dimensional map of the interior space of the product storage facility.Type: ApplicationFiled: October 14, 2022Publication date: April 18, 2024Inventors: Paarvendhan Puviyarasu, Yilun Chen, Harish Polusani, Adam Cantor, Benjamin R. Ellison
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Patent number: 11955717Abstract: A radio frequency system package may include waveguides and loading blocks. The loading blocks may include dielectric material having a high dielectric constant between 13 and 20. Additionally, the loading blocks may be made of mold, epoxy, or the like material, and the loading blocks may fit into a region cut out of the waveguides. Moreover, the loading blocks may lower the cut-off frequency for wireless communication otherwise provided by the waveguides without the loading blocks (e.g., 28 GHz). In particular, the loading blocks may facilitate communication in low mmWave frequencies, such as 24 GHz.Type: GrantFiled: September 9, 2021Date of Patent: April 9, 2024Assignee: Apple Inc.Inventors: Thomas Wu Yang, Michael D. Quinones, Harish Rajagopalan, Gareth L. Rose, Bhaskara R. Rupakula, Jiechen Wu, Hao Xu
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Patent number: 11941627Abstract: Systems and methods for transaction authorizations using a distributed database are disclosed. The system may allow registered transaction account holders and merchants to interact and complete transactions according to workflows enforced by smart contracts. The system may include an issuer system that receives a transaction authorization request comprising a merchant ID, a transaction account number, a transaction amount, and a transaction ID. The issuer system may retrieve a merchant public key and a smart contract based on the merchant ID, and a user public key based on the transaction account number. The issuer system may invoke the smart contract by passing the user public key and the transaction ID to the smart contract. The system may propagate transaction data (e.g., the merchant ID, the transaction account number, the payment amount, a transaction status, etc.) to a blockchain network for writing to a blockchain according to the invoked smart contract.Type: GrantFiled: March 24, 2022Date of Patent: March 26, 2024Assignee: American Express Travel Related Services Company, Inc.Inventors: Balaji Balaraman, Andras L. Ferenczi, Sathish B. Muthukrishnan, Harish R. Naik
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Patent number: 11942160Abstract: A request to perform a secure erase operation for a memory component can be received. A voltage level of a pass voltage that is applied to unselected wordlines of the memory component during a read operation can be determined. A voltage pulse can be applied during a program operation to at least one wordline of the memory component to perform the secure erase operation. The voltage pulse can exceed the pass voltage applied to the unselected wordlines of the memory component during the read operation.Type: GrantFiled: December 12, 2022Date of Patent: March 26, 2024Assignee: Micron Technology, Inc.Inventors: Kishore Kumar Muchherla, Harish R. Singidi, Vamsi Pavan Rayaprolu, Ashutosh Malshe, Sampath K. Ratnam
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Patent number: 11928353Abstract: A processing device, operatively coupled with a memory device, is configured to perform a write operation on a page of a plurality of pages of a data unit of a memory device. The processing device further generates a parity page for data stored in the page of the data unit and associates the parity page with parity data associated with the data unit. Responsive to determining that a first size of the parity data is larger than a first threshold size, the processing device compresses the parity data. Responsive to determining that a second size of the compressed parity data is larger than a second threshold size, the processing device releases at least a subset of the parity data corresponding to a subset of the data that is free from defects.Type: GrantFiled: January 18, 2023Date of Patent: March 12, 2024Assignee: Micron Technology, Inc.Inventors: Harish R Singidi, Ashutosh Malshe, Vamsi Pavan Rayaprolu, Kishore Kumar Muchherla
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Patent number: 11907066Abstract: A parity generation operation based on a set of multiple planes of host data is executed to generate a set of multi-page parity data. The set of multi-page parity data is stored in a cache memory of a memory device. A data recovery operation is performed based on the set of multi-page parity data.Type: GrantFiled: May 2, 2022Date of Patent: February 20, 2024Assignee: Micron Technology, Inc.Inventors: Xiangang Luo, Jianmin Huang, Lakshmi Kalpana Vakati, Harish R. Singidi
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Publication number: 20230410103Abstract: A zero knowledge proof purchase system and process using blockchain is disclosed. The system may comprise a customer device, a merchant system, an issuer system, and a blockchain network having a zero-knowledge proof (ZKP) smart contract. The system may implement a zero-knowledge proof algorithm haying a key generator function, a proof function, and a validate function. Each function may be configured to perform various tasks in the system to support and enable zero-knowledge proof purchases.Type: ApplicationFiled: July 17, 2023Publication date: December 21, 2023Inventors: ANDRAS FERENCZI, DALLAS L. GALE, NILESH Y. JADHAV, HARISH R. NAIK
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Publication number: 20230401555Abstract: A transaction account based micro-payment system using blockchain is disclosed. The system may receive a micro-payment request including a payment address from a merchant system. The system may invoke an account holder account smart contract and a directory smart contract. The system may write a plurality of micro-payment transaction debits to a transaction account based micro-payment blockchain via a blockchain node. The system may generate a transaction clearance event based on the account holder account smart contract. The system may write a micro-payment transaction clearance credit to the transaction account based micro-payment blockchain.Type: ApplicationFiled: August 28, 2023Publication date: December 14, 2023Inventors: Alaric M. Eby, Andras L. Ferenczi, Harish R. Naik, Vishnuvajhala Venkata Subrahmanyam
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Patent number: 11836392Abstract: A processing device in a memory sub-system identifies a plurality of word lines at a first portion of a memory device, determines a respective error rate for each of the plurality of word lines, and determines that a first error rate of a first word line of the plurality of word lines and a second error rate of a second word line of the plurality of word lines satisfy a first threshold condition pertaining to an error rate threshold. The processing device further identifies a third word line of the plurality of word lines that is proximate to the first word line and the second word line and relocates data stored at the third word line to a second portion of the memory device, wherein the second portion of the memory device is associated with a lower read latency than the first portion of the memory device.Type: GrantFiled: October 12, 2021Date of Patent: December 5, 2023Assignee: Micron Technology, Inc.Inventors: Kishore Kumar Muchherla, Ashutosh Malshe, Vamsi Pavan Rayaprolu, Sampath K. Ratnam, Harish R. Singidi, Peter Feeley
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Publication number: 20230385398Abstract: A single sign-on system using blockchain is disclosed. The single sign-on system may interconnect various organization systems over a peer-to-peer network, with each organization system having a blockchain node and an application programming interface (API). The blockchain node invokes and uses a smart contract to write registration credentials to the blockchain during a registration process. During a login process, the blockchain node invokes the smart contract to determine whether login credentials match stored login credentials in the blockchain. In response to matching login credentials, the API may generate a single sign-on token that can be used by a user device to access one or more organization systems connected over the network.Type: ApplicationFiled: August 14, 2023Publication date: November 30, 2023Inventors: Balaji Balaraman, Andras L. Ferenczi, Dallas L. Gale, Nilesh Yashavant Jadhav, Harish R. Naik
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Publication number: 20230385866Abstract: A blockchain-based multi-merchant loyalty point partnership system may include a blockchain API host that is configured to generate a reward based at least in part on transaction data received from a web site. In one example, a system is configured to receive a loyalty account and transaction data for a completed purchase from a loyalty partner site. A partnership smart contract is executed to validate that the transaction data meets a purchase requirement parameter of the partnership smart contract. A transaction record is stored which indicates that the loyalty account has the transaction data for meeting the purchase requirement parameter. The transaction record is transmitted to consensus participants associated with the blockchain network.Type: ApplicationFiled: May 25, 2023Publication date: November 30, 2023Inventors: Calvin Chan, Christopher Cracchiolo, Andras Ferenczi, Harish R. Naik, Andrew Martin Baal Thomas
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Patent number: 11810627Abstract: A processing device in a memory system maintains a counter to track a number of read operations performed on a data block of a memory device and determines that the number of read operations performed on the data block satisfies a first threshold criterion. The processing device further determines whether a number of scan operations performed on the data block satisfies a scan threshold criterion. Responsive to the number of scan operations performed on the data block satisfying the scan threshold criterion, the processing device performs a first data integrity scan to determine one or more first error rates for the data block, each of the one or more first error rates corresponding to a first set of wordlines of the data block, the first set comprising first alternating pairs of adjacent wordlines.Type: GrantFiled: August 12, 2022Date of Patent: November 7, 2023Assignee: Micron Technology, Inc.Inventors: Kishore Kumar Muchherla, Harish R. Singidi, Renato C. Padilla, Vamsi Pavan Rayaprolu, Ashutosh Malshe, Sampath K. Ratnam
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Patent number: 11782627Abstract: A processing device in a memory system receives a first read request from a host system, wherein the first read request is directed to first data stored at a first address in a block of the memory component. The processing device determines that the first address is located within a first region of the block and increments a read counter for the block by a default amount. The processing device further receives a second read request from the host system, wherein the second read request is directed to second data stored at a second address in a block of the memory component, determines that the second address is located within a second region of the block and increments the read counter for the block by a scaled amount.Type: GrantFiled: February 25, 2022Date of Patent: October 10, 2023Assignee: Micron Technology, Inc.Inventors: Kishore Kumar Muchherla, Ashutosh Malshe, Vamsi Pavan Rayaprolu, Harish R. Singidi, Gianni S. Alsasua
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Patent number: 11776639Abstract: Storage devices include a memory array comprised of a plurality of memory devices. These memory devices are programmed with a modified distribution across the available memory states within the devices. The modified distribution of memory states attempts to minimize the use of memory states that are susceptible to negative effects. These negative effects can include read and write disturbs as well as data retention errors. Often, these negative effects occur on memory states on the lower and upper states within the voltage threshold range of the memory device. The distribution of memory states can be modified though the use of a modified randomization seed configured to change the probabilities of programming of each page within the memory device. This modification of the randomization seed can yield desired distribution of memory device states that are configured to reduce exposure to negative effects thus prolonging the overall lifespan of the storage device.Type: GrantFiled: October 3, 2022Date of Patent: October 3, 2023Assignee: Western Digital Technologies, Inc.Inventors: Amiya Banerjee, Vinayak Bhat, Harish R. Singidi
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Patent number: 11762974Abstract: A single sign-on system using blockchain is disclosed. The single sign-on system may interconnect various organization systems over a peer-to-peer network, with each organization system having a blockchain node and an application programming interface (API). The blockchain node invokes and uses a smart contract to write registration credentials to the blockchain during a registration process. During a login process, the blockchain node invokes the smart contract to determine whether login credentials match stored login credentials in the blockchain. In response to matching login credentials, the API may generate a single sign-on token that can be used by a user device to access one or more organization systems connected over the network.Type: GrantFiled: August 4, 2022Date of Patent: September 19, 2023Assignee: AMERICAN EXPRESS TRAVEL RELATED SERVICES COMPANY, INC.Inventors: Balaji Balaraman, Andras L. Ferenczi, Dallas L. Gale, Nilesh Yashavant Jadhav, Harish R. Naik
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Patent number: 11748750Abstract: A zero-knowledge proof purchase system and process using blockchain is disclosed. The system may comprise a customer device, a merchant system, an issuer system, and a blockchain network having a zero-knowledge proof (ZKP) smart contract. The system may implement a zero-knowledge proof algorithm haying a key generator function, a proof function, and a validate function. Each function may be configured to perform various tasks in the system to support and enable zero-knowledge proof purchases.Type: GrantFiled: September 13, 2021Date of Patent: September 5, 2023Assignee: AMERICAN EXPRESS TRAVEL RELATED SERVICES COMPANY, INC.Inventors: Andras Ferenczi, Dallas L. Gale, Nilesh Y. Jadhav, Harish R. Naik
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Patent number: 11740805Abstract: A distribution statistic is generated for a data block of a memory component based on a reliability statistic for memory cells sampled in the data block. The distribution statistic is indicative of at least one of a uniformity or a non-uniformity of read disturb stress on the sampled memory cells. At least a subset of the data block is relocated to another data block of the memory component in view of the distribution statistic.Type: GrantFiled: June 10, 2022Date of Patent: August 29, 2023Assignee: Micron Technology, Inc.Inventors: Ashutosh Malshe, Kishore Kumar Muchherla, Vamsi Vamsi Rayaprolu, Harish R. Singidi
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Patent number: 11740957Abstract: A failure of a first memory access operation is detected at a memory device. Responsive to the detection, a first error control operation and a second error control operation are performed. In response to a determination that the second error control operation has remedied the failed first memory access operation, the second error control operation is associated with a second priority which is higher than a first priority associated with the first error control operation.Type: GrantFiled: October 20, 2021Date of Patent: August 29, 2023Assignee: Micron Technology, Inc.Inventors: Vamsi Pavan Rayaprolu, Harish R. Singidi, Kishore Kumar Muchherla, Ashutosh Malshe, Xiangang Luo