Patents by Inventor Harmeet Singh

Harmeet Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10568163
    Abstract: Described herein is a method of detecting fault conditions in a multiplexed multi-heater-zone heating plate for a substrate support assembly used to support a semiconductor substrate in a semiconductor processing apparatus.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: February 18, 2020
    Assignee: LAM RESEARCH CORPORATION
    Inventor: Harmeet Singh
  • Patent number: 10554384
    Abstract: In some embodiments, an encryption system secures data using a homomorphic encryption. The encryption system encrypts a number by encrypting a number identifier of the number and combining the number and the encrypted number identifier using a mathematical operation to generate an encrypted number. The encrypted numbers may be stored at a server system along with their number identifiers. The server system can then generate an aggregation (e.g., sum) of the encrypted numbers and provide the aggregation, the encrypted numbers, and the number identifiers. The encryption system can then separate the aggregation of the numbers from the aggregation of the encrypted numbers using an inverse of the mathematical operation used in the encryption to effect removal of an aggregation of the encrypted number identifiers of the numbers from the aggregation of the encrypted numbers. The separated aggregation of the numbers is an aggregation of the plurality of the numbers.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: February 4, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ranjita Bhagwan, Nishanth Chandran, Ramachandran Ramjee, Harmeet Singh, Antonios Papadimitriou, Saikrishna Badrinarayanan
  • Patent number: 10515816
    Abstract: Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve sequentially alternating between atomic layer etch and atomic layer deposition processes to prevent feature degradation during etch, improve selectivity, and encapsulate sensitive layers of a semiconductor substrate.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: December 24, 2019
    Assignee: Lam Research Corporation
    Inventors: Keren Jacobs Kanarik, Jeffrey Marks, Harmeet Singh, Samantha SiamHwa Tan, Alexander Kabansky, Wenbing Yang, Taeseung Kim, Dennis M. Hausmann, Thorsten Lill
  • Publication number: 20190371576
    Abstract: An electrostatic chuck includes an embedded electrode receiving a first voltage to electrostatically attract a semiconductor substrate to the electrostatic chuck. A plurality of current loops are disposed in at least one of the electrostatic chuck and an edge ring surrounding the electrostatic chuck. The current loops are laterally spaced apart. Each current loop is a wire formed into a loop. One or more DC power sources are electrically connected to the current loops. A controller supplies the first voltage to the embedded electrode, supplies a DC current to the current loops from the power sources, and controls the power sources. Each current loop is independently operable and generates a localized DC magnetic field proximate to the semiconductor substrate on receiving the DC current during plasma processing of the semiconductor substrate to adjust the plasma processing of the semiconductor substrate. The localized DC magnetic field does not generate plasma.
    Type: Application
    Filed: July 9, 2019
    Publication date: December 5, 2019
    Inventors: Harmeet SINGH, Keith GAFF, Brett RICHARDSON, Sung LEE
  • Patent number: 10497544
    Abstract: A component of a plasma processing chamber having a protective liquid layer on a plasma exposed surface of the component The protective liquid layer can be replenished by supplying a liquid to a liquid channel and delivering the liquid through liquid feed passages in the component. The component can be an edge ring which surrounds a semiconductor substrate supported on a substrate support in a plasma processing apparatus wherein plasma is generated and used to process the semiconductor substrate. Alternatively, the protective liquid layer can be cured or cooled sufficiently to form a solid protective layer.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: December 3, 2019
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Harmeet Singh, Thorsten Lill
  • Patent number: 10491967
    Abstract: Technologies are disclosed for integrating a live streaming video service with other computing systems and services. A live streaming video service exposes a network service API through which requests for identifiers for live video streams can be submitted. An API request can include context data obtained or generated by a user device, such as data defining the state of an application executing on the user device or data identifying the type of user device making the request. The context data can also be obtained or generated by an application store system or a merchant system. The context data and metadata associated with live video streams can be used to select one or more of the live video streams. Unique identifiers corresponding to the selected live video streams can be returned in response to a call to the API. The identifiers can be utilized to access the corresponding live video streams.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: November 26, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Charles Lawrence Sismondo, Aakash Deep Makkar, Harmeet Singh Gorwara, Glenn Warren Van Houten, Thomas James Rader
  • Publication number: 20190354618
    Abstract: The present invention provides for autonomous data isolation and persistence using application controlled dynamic embedded databases. Specifically, the application includes the logic to identify, through the operating system, the user and the user's home directory and, in response to such, generate user-specific embedded database at the home directory location. Since the home directory can only be accessed by the user, the embedded database and its data are shielded from other users. Further, the application provides for automatically maintaining the database, such as, modifying the database (e.g., add columns, rows, tables or the like) based on detected updates to the application and/or re-generating a new instance of the embedded database based on detected updates to the application that warrant such, detection of corrupt data in the database or the like.
    Type: Application
    Filed: May 15, 2018
    Publication date: November 21, 2019
    Inventors: Harmeet Khanna Kalra, Paramdeep Singh Kalra
  • Publication number: 20190306142
    Abstract: A system includes a server computer system that may receive an authorization request from a first user for a transaction that includes a request for resources from a user account. The authorization request may include an identification value for a second, different user that has authorization authority for the user account. The server computer system may send transaction details to an authentication server that may make authorization determinations for the transaction based on a passcode and a reference value. The reference value may be generated based on the transaction details. The system may also receive confirmation data from the authentication server. This confirmation data may be generated by the authentication server based on the transaction details. The system may further send, to the first user, the passcode for communication to the second user, and may receive an indication whether the second user has authorized the transaction.
    Type: Application
    Filed: March 28, 2018
    Publication date: October 3, 2019
    Inventors: Harmeet Singh Gujral, Sanjaya Kumar Sahu, Rohit Pathak, Vijay Kulkarni
  • Patent number: 10424461
    Abstract: Systems and methods controlling ion energy within a plasma chamber are described. One of the systems includes an upper electrode coupled to a sinusoidal RF generator for receiving a sinusoidal signal and a nonsinusoidal RF generator for generating a nonsinusoidal signal. The system further includes a power amplifier coupled to the nonsinusoidal RF generator. The power amplifier is used for amplifying the nonsinusoidal signal to generate an amplified signal. The system includes a filter coupled to the power amplifier. The filter is used for filtering the amplified signal using a filtering signal to generate a filtered signal. The system includes a chuck coupled to the filter. The chuck faces at least a portion of the upper electrode and includes a lower electrode. The lower electrode is used for receiving the filtered signal to facilitate achieving ion energy at the chuck to be between a lower threshold and an upper threshold.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: September 24, 2019
    Assignee: Lam Research Corporation
    Inventors: Thorsten Lill, Harmeet Singh, Alex Paterson, Gowri Kamarthy
  • Patent number: 10403475
    Abstract: A tunable multi-zone injection system for a plasma processing system for plasma processing of substrates such as semiconductor wafers. The injector can include an on-axis outlet supplying process gas at a first flow rate to a central zone and off-axis outlets supplying the same process gas at a second flow rate to an annular zone surrounding the central zone. The arrangement permits modification of gas delivery to meet the needs of a particular processing regime by allowing independent adjustment of the gas flow to multiple zones in the chamber. In addition, compared to consumable showerhead arrangements, a removably mounted gas injector can be replaced more easily and economically.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: September 3, 2019
    Assignee: LAM RESEARCH CORPORATION
    Inventors: David J. Cooperberg, Vahid Vahedi, Douglas Ratto, Harmeet Singh, Neil Benjamin
  • Patent number: 10388493
    Abstract: A component of a substrate support assembly such as a substrate support or edge ring includes a plurality of current loops incorporated in the substrate support and/or the edge ring. The current loops are laterally spaced apart and extend less than halfway around the substrate support or edge ring with each of the current loops being operable to induce a localized DC magnetic field of field strength less than 20 Gauss above a substrate supported on the substrate support during plasma processing of the substrate. When supplied with DC power, the current loops generate localized DC magnetic fields over the semiconductor substrate so as to locally affect the plasma and compensate for non-uniformity in plasma processing across the substrate.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: August 20, 2019
    Assignee: Lam Research Corporation
    Inventors: Harmeet Singh, Keith Gaff, Brett Richardson, Sung Lee
  • Publication number: 20190250501
    Abstract: Disclosed are methods of generating a proximity-corrected design layout for photoresist to be used in an etch operation. The methods may include identifying a feature in an initial design layout, and estimating one or more quantities characteristic of an in-feature plasma flux (IFPF) within the feature during the etch operation. The methods may further include estimating a quantity characteristic of an edge placement error (EPE) of the feature by comparing the one or more quantities characteristic of the IFPF to those in a look-up table (LUT, and/or through application of a multivariate model trained on the LUT, e.g., constructed through machine learning methods (MLM)) which associates values of the quantity characteristic of EPE with values of the one or more quantities characteristics of the IFPF. Thereafter, the initial design layout may be modified based on at the determined quantity characteristic of EPE.
    Type: Application
    Filed: December 18, 2018
    Publication date: August 15, 2019
    Inventors: Saravanapriyan Sriraman, Richard Wise, Harmeet Singh, Alex Paterson, Andrew D. Bailey, III, Vahid Vahedi, Richard A. Gottscho
  • Patent number: 10372045
    Abstract: A reluctance actuator assembly comprising a reluctance actuator, a flux sensor to measure a magnetic flux in a gap of the reluctance actuator, and a flux amplifier to drive an actuator coil of the reluctance actuator based on a flux set point and the flux measured by the flux sensor. A method comprising providing to the flux amplifier a flux setpoint, the flux setpoint comprising a time constant component and a sinusoidally varying component at an excitation frequency, measuring a force generated by the reluctance actuator in response to the flux setpoint, and calibrating the reluctance actuator assembly from the measured force.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: August 6, 2019
    Assignee: ASML Netherlands B.V.
    Inventors: Johannes Antonius Gerardus Akkermans, Bas Pieter Lemmen, Sjoerd Martijn Huiberts, Joeri Lof, Petrus Theodorus Rutgers, Sven Antoin Johan Hol, Harmeet Singh, Peter Michel Silvester Maria Heijmans
  • Publication number: 20190139778
    Abstract: Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve sequentially alternating between atomic layer etch and atomic layer deposition processes to prevent feature degradation during etch, improve selectivity, and encapsulate sensitive layers of a semiconductor substrate.
    Type: Application
    Filed: December 14, 2018
    Publication date: May 9, 2019
    Inventors: Keren Jacobs Kanarik, Jeffrey Marks, Harmeet Singh, Samantha SiamHwa Tan, Alexander Kabansky, Wenbing Yang, Taeseung Kim, Dennis M. Hausmann, Thorsten Lill
  • Patent number: 10256077
    Abstract: A method for achieving sub-pulsing during a state is described. The method includes receiving a clock signal from a clock source, the clock signal having two states and generating a pulsed signal from the clock signal. The pulsed signal has sub-states within one of the states. The sub-states alternate with respect to each other at a frequency greater than a frequency of the states. The method includes providing the pulsed signal to control power of a radio frequency (RF) signal that is generated by an RF generator. The power is controlled to be synchronous with the pulsed signal.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: April 9, 2019
    Assignee: Lam Research Corporation
    Inventors: John C. Valcore, Jr., Harmeet Singh, Bradford J. Lyndaker
  • Publication number: 20190103253
    Abstract: Systems and methods controlling ion energy within a plasma chamber are described. One of the systems includes an upper electrode coupled to a sinusoidal RF generator for receiving a sinusoidal signal and a nonsinusoidal RF generator for generating a nonsinusoidal signal. The system further includes a power amplifier coupled to the nonsinusoidal RF generator. The power amplifier is used for amplifying the nonsinusoidal signal to generate an amplified signal. The system includes a filter coupled to the power amplifier. The filter is used for filtering the amplified signal using a filtering signal to generate a filtered signal. The system includes a chuck coupled to the filter. The chuck faces at least a portion of the upper electrode and includes a lower electrode. The lower electrode is used for receiving the filtered signal to facilitate achieving ion energy at the chuck to be between a lower threshold and an upper threshold.
    Type: Application
    Filed: November 13, 2018
    Publication date: April 4, 2019
    Inventors: Thorsten Lill, Harmeet Singh, Alex Paterson, Gowri Kamarthy
  • Patent number: 10242883
    Abstract: A method for etching features in an OMOM stack with first layer of silicon oxide, a second layer of a metal containing material over the first layer, a third layer of silicon oxide over the second layer, and a fourth layer of a metal containing material over the third layer is provided. A hardmask is formed over the stack. The hardmask is patterned. The OMOM stack is etched through the hardmask.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: March 26, 2019
    Assignee: Lam Research Corporation
    Inventors: Joydeep Guha, Sirish K. Reddy, Kaushik Chattopadhyay, Thomas W. Mountsier, Aaron Eppler, Thorsten Lill, Vahid Vahedi, Harmeet Singh
  • Patent number: 10236193
    Abstract: A substrate support is provided, is configured to support a substrate in a plasma processing chamber, and includes first, second and third insulative layers, conduits and leads. The first insulative layer includes heater zones arranged in rows and columns. The second insulative layer includes conductive vias. First ends of the conductive vias are connected respectively to the heater zones. Second ends of the conductive vias are connected respectively to power supply lines. The third insulative layer includes power return lines. The conduits extend through the second insulative layer and into the third insulative layer. The leads extend through the conduits and connect to the heater zones. The heater zones are connected to the power return lines by the leads and are configured to heat corresponding portions of the substrate to provide a predetermined temperature profile across the substrate during processing of the substrate in the plasma processing chamber.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: March 19, 2019
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Harmeet Singh, Keith Gaff, Neil Benjamin, Keith Comendant
  • Patent number: 10224221
    Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. Where multiple plasma grids are used, one or more of the grids may be movable, allowing for tenability of the plasma conditions in at least the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: March 5, 2019
    Assignee: Lam Research Corporation
    Inventors: Harmeet Singh, Thorsten Lill, Vahid Vahedi, Alex Paterson, Monica Titus, Gowri Kamarthy
  • Patent number: 10217615
    Abstract: A plasma processing apparatus for processing semiconductor substrates comprises a plasma processing chamber in which a semiconductor substrate is processed. A process gas source is in fluid communication with the plasma processing chamber and is adapted to supply a process gas into the plasma processing chamber. A RF energy source is adapted to energize the process gas into a plasma state in the plasma processing chamber. Process gas and byproducts of the plasma processing are exhausted from the plasma processing chamber through a vacuum port. At least one component of the plasma processing apparatus comprises a laterally extending optical fiber beneath a plasma exposed surface of the component wherein spatial temperature measurements of the surface are desired to be taken, and a temperature monitoring arrangement coupled to the optical fiber so as to monitor temperatures at different locations along the optical fiber.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: February 26, 2019
    Assignee: LAM RESEARCH CORPORATION
    Inventor: Harmeet Singh