Abstract: A plasma processing system and method includes a processing chamber, and a plasma processing volume included therein. The plasma processing volume having a volume less than the processing chamber. The plasma processing volume being defined by a top electrode, a substrate support surface opposing the surface of the top electrode and a plasma confinement structure including at least one outlet port. A conductance control structure is movably disposed proximate to the at least one outlet port and capable of controlling an outlet flow through the at least one outlet port between a first flow rate and a second flow rate, wherein the conductance control structure controls the outlet flow rate and an at least one RF source is modulated and at least one process gas flow rate is modulated corresponding to a selected processing state set by the controller during a plasma process.

Abstract: A semiconductor substrate processing system includes a processing chamber and a substrate support defined to support a substrate in the processing chamber. The system also includes a plasma chamber defined separate from the processing chamber. The plasma chamber is defined to generate a plasma. The system also includes a plurality of fluid transmission pathways fluidly connecting the plasma chamber to the processing chamber. The plurality of fluid transmission pathways are defined to supply reactive constituents of the plasma from the plasma chamber to the processing chamber. The system further includes an electrode disposed within the processing chamber separate from the substrate support. The system also includes a power supply electrically connected to the electrode. The power supply is defined to supply electrical power to the electrode so as to liberate electrons from the electrode into the processing chamber.

Abstract: A processing chamber having a chamber housing with a top and sidewalls is provided. The processing chamber has a seal for connecting the sidewalls of the chamber housing to a top of a lower chamber below the processing chamber. A substrate holder is attached to the sidewalls of the chamber housing. Further, a wafer lift ring supported by a side arm extending through the sidewalls has at least three posts each having at least one finger, the top of the fingers defining a first wafer handoff plane. The lower chamber has at least one lowest wafer support that defines a second wafer handoff plane where the height between the first wafer handoff plane and the second wafer handoff plane is not greater than a maximum vertical stroke of a transfer arm that is configured to transfer a wafer from the first wafer handoff plane and the second wafer handoff plane.

Abstract: A method for identifying a conference call from a communication device, wherein the communication device includes a memory for storing a calendar event record. The method includes: parsing at least some of the calendar event record, wherein the parsing includes an automatic discovery feature; determining, based on the parsing, whether the calendar event record includes conference call scheduling information in relation to a scheduled conference call session; generating, based on the parsing, one or more identifiers for at least some of the conference call scheduling information; and storing in the memory the one or more identifiers. A host communication device and a non-host participant communication device can also be configured for performing the method.

Abstract: A method for etching a stack with at least one metal layer in one or more cycles is provided. An initiation step is preformed, transforming part of the at least one metal layer into metal oxide, metal halide, or lattice damaged metallic sites. A reactive step is performed providing one or more cycles, where each cycle comprises providing an organic solvent vapor to form a solvated metal, metal halide, or metal oxide state and providing an organic ligand solvent to form volatile organometallic compounds. A desorption of the volatile organometallic compounds is performed.

Abstract: A method for etching a stack with an Ru containing layer disposed below a hardmask and above a magnetic tunnel junction (MTJ) stack with pinned layer is provided. The hardmask is etched with a dry etch. The Ru containing layer is etched, where the etching uses hypochlorite and/or O3 based chemistries. The MTJ stack is etched. The MTJ stack is capped with dielectric materials. The pinned layer is etched following the MTJ capping.

Abstract: A method for etching a stack with at least one metal layer in one or more cycles is provided. An initiation step is preformed, transforming part of the at least one metal layer into metal oxide, metal halide, or lattice damaged metallic sites. A reactive step is performed providing one or more cycles, where each cycle comprises providing an organic solvent vapor to form a solvated metal, metal halide, or metal oxide state and providing an organic ligand solvent to form volatile organometallic compounds. A desorption of the volatile organometallic compounds is performed.

Abstract: A method of planarizing an upper surface of a semiconductor substrate in a plasma etch chamber comprises supporting the substrate on a support surface of a substrate support assembly that includes an array of independently controlled thermal control elements therein which are operable to control the spatial and temporal temperature of the support surface of the substrate support assembly to form independently controllable heater zones which are formed to correspond to a desired temperature profile across the upper surface of the semiconductor substrate. The etch rate across the upper surface of the semiconductor substrate during plasma etching depends on a localized temperature thereof wherein the desired temperature profile is determined such that the upper surface of the semiconductor substrate is planarized within a predetermined time. The substrate is plasma etched for the predetermined time thereby planarizing the upper surface of the substrate.

Abstract: A reluctance actuator assembly comprising a reluctance actuator, a flux sensor to measure a magnetic flux in a gap of the reluctance actuator, and a flux amplifier to drive an actuator coil of the reluctance actuator based on a flux set point and the flux measured by the flux sensor. A method comprising providing to the flux amplifier a flux setpoint, the flux setpoint comprising a time constant component and a sinusoidally varying component at an excitation frequency, measuring a force generated by the reluctance actuator in response to the flux setpoint, and calibrating the reluctance actuator assembly from the measured force.

Abstract: A tunable multi-zone injection system for a plasma processing system for plasma processing of substrates such as semiconductor wafers. The injector can include an on-axis outlet supplying process gas at a first flow rate to a central zone and off-axis outlets supplying the same process gas at a second flow rate to an annular zone surrounding the central zone. The arrangement permits modification of gas delivery to meet the needs of a particular processing regime by allowing independent adjustment of the gas flow to multiple zones in the chamber. In addition, compared to consumable showerhead arrangements, a removably mounted gas injector can be replaced more easily and economically.

Abstract: A method and a communication device are provided for creating a conference call profile from a communication device, wherein the communication device includes a memory for storing an event record. The method includes: identifying from the event record one or more addresses for communicating with a conference call server; generating a conference call profile having one or more address fields and populating the address fields with the addresses; and storing the generated conference call profile in the memory. A communication device can be configured to perform the method.

Abstract: A semiconductor substrate processing system includes a processing chamber and a substrate support defined to support a substrate in the processing chamber. The system also includes a plasma chamber defined separate from the processing chamber. The plasma chamber is defined to generate a plasma. The system also includes a plurality of fluid transmission pathways fluidly connecting the plasma chamber to the processing chamber. The plurality of fluid transmission pathways are defined to supply reactive constituents of the plasma from the plasma chamber to the processing chamber. The system further includes an electron injection device for injecting electrons into the processing chamber to control an electron energy distribution within the processing chamber so as to in turn control an ion-to-radical density ratio within the processing chamber. In one embodiment, an electron beam source is defined to transmit an electron beam through the processing chamber above and across the substrate support.

Abstract: A semiconductor wafer processing apparatus for processing semiconductor wafers comprises a semiconductor wafer processing chamber in which a semiconductor wafer is processed, a process gas source in fluid communication with the processing chamber adapted to supply process gas into the processing chamber, a vacuum source adapted to exhaust process gas and byproducts of the processing from the processing chamber, and an electrostatic chuck assembly.

Abstract: A substrate processing system having a processing chamber for etching a layer on a substrate is provided. The system includes a chuck upon which the substrate r disposed during etching. The system also includes the chamber being divided into a plasma generating region and a substrate processing region by a separating plate structure. The system further includes a plasma source for generating plasma in the plasma generating region. The system further includes logic for introducing a first gas into the chamber, wherein the gas is suitable for etching the layer. The logic, also allows the first gas to be present in the chamber tin a period of time sufficient to cause adsorption of at least some of the first gas into the layer. The logic further replaces the first gas with an inert gas, generates metastables from the inert gas, and etches the layer with the metastables.

Abstract: A method for etching features in a stack is provided. A combination hardmask is formed by forming a first hardmask layer comprising carbon or silicon oxide over the stack, forming a second hardmask layer comprising metal over the first hardmask layer, and patterning the first and second hardmask layers. The stack is etched through the combination hardmask.

Abstract: A method for performing chamber-to-chamber matching includes receiving a voltage and a current measured at an output of an RF generator of a first plasma system. The method further includes calculating a sum of terms. The first term is a first product of a coefficient and a function of the voltage. The second term is a second product of a coefficient and a function of the current. The third term is a third product of a coefficient, a function of the voltage, and a function of the current. The method further includes determining the sum to be the etch rate associated with the first plasma system and adjusting power output from an RF generator of a second plasma system to achieve the etch rate associated with the first plasma system.

Abstract: A plasma confinement ring assembly with a single movable lower ring can be used for controlling wafer area pressure in a capacitively coupled plasma reaction chamber wherein a wafer is supported on a lower electrode assembly and process gas is introduced into the chamber by an upper showerhead electrode assembly. The assembly includes an upper ring, the lower ring, hangers, hanger caps, spacer sleeves and washers. The lower ring is supported by the hangers and is movable towards the upper ring when the washers come into contact with the lower electrode assembly during adjustment of the gap between the upper and lower electrodes. The hanger caps engage upper ends of the hangers and fit in upper portions of hanger bores in the upper ring. The spacer sleeves surround lower sections of the hangers and fit within lower portions of the hanger bores. The washers fit between enlarged heads of the hangers and a lower surface of the lower ring.

Abstract: The disclosed embodiments relate to methods and apparatus for removing material from a substrate. In various implementations, conductive material is removed from a sidewall of a previously etched feature such as a trench, hole or pillar on a semiconductor substrate. In practicing the techniques herein, a substrate is provided in a reaction chamber that is divided into an upper plasma generation chamber and a lower processing chamber by a corrugated ion extractor plate with apertures therethrough. The extractor plate is corrugated such that the plasma sheath follows the shape of the extractor plate, such that ions enter the lower processing chamber at an angle relative to the substrate. As such, during processing, ions are able to penetrate into previously etched features and strike the substrate on the sidewalls of such features. Through this mechanism, the material on the sidewalls of the features may be removed.

Abstract: A semiconductor wafer processing apparatus for processing semiconductor wafers comprises a semiconductor wafer processing chamber in which a semiconductor wafer is processed, a process gas source in fluid communication with the processing chamber adapted to supply process gas into the processing chamber, a vacuum source adapted to exhaust process gas and byproducts of the processing from the processing chamber, and an electrostatic chuck assembly.

Abstract: A plasma processing apparatus for processing semiconductor substrates comprises a plasma processing chamber in which a semiconductor substrate is processed. A process gas source is in fluid communication with the plasma processing chamber and is adapted to supply a process gas into the plasma processing chamber. A RF energy source is adapted to energize the process gas into a plasma state in the plasma processing chamber. Process gas and byproducts of the plasma processing are exhausted from the plasma processing chamber through a vacuum port. At least one component of the plasma processing apparatus comprises a laterally extending optical fiber beneath a plasma exposed surface of the component wherein spatial temperature measurements of the surface are desired to be taken, and a temperature monitoring arrangement coupled to the optical fiber so as to monitor temperatures at different locations along the optical fiber.