Abstract: An implantable medical device is provided. The device comprises a drug release layer, wherein the drug release layer comprises a naked nucleic acid dispersed within a polymer matrix. The polymer matrix includes an ethylene vinyl acetate copolymer and has a melting temperature of from about 20° C. to about 100° C. as determined in accordance with ASTM D3418-15 and a melt flow index of from about 0.2 to about 100 gram per 10 minutes as determined in accordance with ASTM D1238-20 at a temperature of 190° C. and a load of 2.16 kilograms.

Abstract: A method for facilitating reviews of caller interactions with an intelligent voice interface may include receiving raw voice data representing dialog between one or more callers and the intelligent voice interface during one or more respective voice calls, determining, by processing text translation of the raw voice data using one or more natural language processing models, one or more intents of the one or more callers during the one or more voice calls, generating one or more event labels indicative of one or more events associated with the one or more voice calls, and causing a user interface to be presented on a display device. The user interface may enable a user to (i) listen to the raw voice data, (ii) view the one or more intents, and/or (iii) view the one or more event labels.

Abstract: In a method for handling out-of-sequence caller dialog, an intelligent voice interface is configured to lead callers through pathways of an algorithmic dialog that includes available voice prompts for requesting different types of caller information. The method may include, during a voice communication with a caller via a caller device, receiving from the caller device caller input data indicative of a voice input of the caller, without having first provided to the caller device any voice prompt that requests a first type of caller information, and determining, by processing the caller input data, that the voice input includes caller information of the first type. The method also includes after determining that the voice input includes the caller information of the first type, bypassing one or more voice prompts, of the available voice prompts, that request the first type of caller information.

Abstract: A method of corrupting contents of a memory array includes asserting a signal at a reset node to thereby cause starving of current supply to the memory array, and selecting bit lines and complementary bit lines associated with desired columns of the memory array that contain memory cells to have their contents corrupted. For each desired column, a logic state of its bit line and complementary bit line are forced to a same logic state. Each word line associated with desired rows of the memory array that contains memory cells to have their contents corrupted is simultaneously asserted, and then simultaneously deasserted to thereby place each memory cell to have its contents corrupted into a metastable state during a single clock cycle.

Abstract: An in-memory computation circuit includes a memory array with SRAM cells connected in rows by word lines and in columns by bit lines. Body bias nodes of the transistors in each SRAM cell are biased by a modulated body bias voltage. A row controller circuit simultaneously actuates word lines in parallel for an in-memory compute operation. A column processing circuit processes analog voltages developed on the bit lines in response to the simultaneous actuation to generate a decision output for the in-memory compute operation. A voltage generator circuit switches the modulated body bias voltage from a non-negative voltage level to a negative voltage level during the simultaneous actuation. The negative voltage level is adjusted dependent on integrated circuit process and/or temperature conditions in order to optimize protection against unwanted memory cell data flip.

Abstract: A bead exerciser system for an automated wheel assembly may include a center lift configured to lift a wheel assembly off of a conveyor belt, a drum roller configured to rotate the wheel assembly, a pair of pinch rollers driven by a driver and configured to apply force to a tire of the wheel assembly, a force sensor configured to detect a force of the tire against the pinch rollers, and a controller configured to receive the force from the force sensor and generate a command for an alert in response to the force falling outside of a predefined threshold range.

Abstract: A liquid electrophotographic (LEP) printing device that includes a photo-imaging plate (PIP) to receive a liquid printing fluid, the liquid printing fluid including a pigment incorporated into a resin, a charge conductor, and a carrier liquid, and a transfer roller to transfer the liquid printing fluid from the PIP to a fabric substrate while wet.

Abstract: A differential video rendering system, including a graphics processing unit (GPU); a graphical display coupled to the GPU; a video decoder configured to decode a bitstream of encoded data into a plurality of sets of decoded blocks; at least one processor configured to: generate, based on a first set of the plurality of sets of decoded blocks, a first differential video frame comprising a plurality of sets of differential regions, normalize each set of the plurality of sets of differential regions to a fixed size block to provide a normalized plurality of sets of differential regions, map a respective set of the normalized plurality of sets of differential regions to align with a respective tile size region of a plurality of tile size regions conforming with the GPU, generate a hierarchal region tree based on the normalized plurality of sets of differential regions mapped to the plurality of tile size regions, and generate a plurality of optimal regions based on the hierarchal region tree satisfying a predefin

Abstract: A method of memory reset includes precharging bit lines of a memory array, asserting a signal at a reset node to remove the precharge voltage, and selecting write drivers associated with the bit lines associated with columns of the memory array that contain memory cells to be reset, with the assertion of the signal at the reset node also resulting in application of desired logic states to inputs of the selected write drivers to cause those selected write drivers to change a logic state of the bit lines associated with those write drivers. The method continues with asserting each word line associated with a row of the memory that contains memory cells to be reset to write desired logic states to all of the memory cells of the columns and rows of the memory to be reset during a single clock cycle, and then deasserting those word lines.

Abstract: A method for providing ciphertext data by a first computing device having memory includes obtaining, from the memory, plaintext data having a structure; providing the plaintext data to a structure preserving encryption network (SPEN) to generate the ciphertext data, where the structure of the plaintext data corresponds to a structure of the ciphertext data; and communicating, from the first computing device to a second computing device, the ciphertext data to permit analysis on the ciphertext data.

Abstract: A circuit includes a memory array with SRAM cells connected in rows by word lines and in columns by bit lines. A row controller circuit simultaneously actuates, through a word line driver circuit for each row, word lines in parallel for an in-memory compute operation. A column processing circuit processes analog voltages developed on the bit lines in response to the simultaneous actuation to generate a decision output for the in-memory compute operation. A bit line precharge circuit generates a precharge voltage for application to each pair of bit lines. The precharge voltage has a first voltage level (not greater than a positive supply voltage for the SRAM cells) when the memory array is operating in a data read/write mode. The precharge voltage has a second voltage level (greater than the first voltage level) in advance of the simultaneous actuation of the word lines for the in-memory compute operation.

Abstract: A circuit includes a memory array with SRAM cells connected in rows by word lines and in columns by bit lines. A row controller circuit simultaneously actuates, through a word line driver circuit for each row, word lines in parallel for an in-memory compute operation. A column processing circuit processes analog voltages developed on the bit lines in response to the simultaneous actuation to generate a decision output for the in-memory compute operation. A bit line clamping circuit includes a sensing circuit that compares the analog voltages on a given pair of bit lines to a threshold voltage. A voltage clamp circuit is actuated in response to the comparison to preclude the analog voltages on the given pair of bit lines from decreasing below a clamping voltage level.

Abstract: Integrated circuitry comprises two three-dimensional (3D) array regions individually comprising tiers of electronic components. A stair-step region is between the two 3D-array regions. First stair-step structures alternate with second stair-step structures along a first direction within the stair-step region. The first stair-step structures individually comprise two opposing first flights of stairs in a first vertical cross-section along the first direction. The stairs in the first flights each have multiple different-depth treads in a second vertical cross-section that is along a second direction that is orthogonal to the first direction. The second stair-step structures individually comprise two opposing second flights of stairs in the first vertical cross-section. The stairs in the second flights each have only a single one tread along the second direction. Other embodiments, including method, are disclosed.

Abstract: SRAM cells are connected in columns by bit lines and connected in rows by first and second word lines coupled to first and second data storage sides of the SRAM cells. First the first word lines are actuated in parallel and then next the second word lines are actuated in parallel in first and second phases, respectively, of an in-memory compute operation. Bit line voltages in the first and second phases are processed to generate an in-memory compute operation decision. A low supply node reference voltage for the SRAM cells is selectively modulated between a ground voltage and a negative voltage. The first data storage side receives the negative voltage and the second data storage side receives the ground voltage during the second phase. Conversely, the second data storage side receives the negative voltage and the first data storage side receives the ground voltage during the first phase.

Abstract: An in-memory computation circuit includes a memory array with SRAM cells connected in rows by word lines and in columns by bit lines. Each row includes a word line drive circuit powered by an adaptive supply voltage. A row controller circuit simultaneously actuates word lines in parallel for an in-memory compute operation. A column processing circuit processes analog voltages developed on the bit lines in response to the simultaneous actuation to generate a decision output for the in-memory compute operation. A voltage generator circuit generates the adaptive supply voltage for powering the word line drive circuits during the simultaneous actuation. A level of the adaptive supply voltage is modulated dependent on integrated circuit process and/or temperature conditions in order to optimize word line underdrive performance and inhibit unwanted memory cell data flip.

Abstract: A system and method of managing a network that includes assets are described. The method includes modeling the network as a directed graph with each of the assets represented as a node and determining alternative paths to each node from each available corresponding source of the node. The method also includes computing upstream robustness of each node, computing upstream robustness of the network, and computing downstream criticality of each node. Managing the network and each asset of the network is based on the upstream robustness and the downstream criticality of each node.

Abstract: The extraction of a three-dimensional (3D) object is facilitated using a printed hint, which includes an additional shape that is printed along with the 3D object in a granular-based printer bed. In example implementations, the hint is indicative of a location of the 3D object. In one example, a hint has a dimension indicative of a depth to the object in the printer bed. In another example, a position of a hint is indicative that the object is below, and a size of the hint is based on a size of the object. Some hints can also protect the object. Examples include plate and shell-shaped hints. The object is located under a plate hint or within a shell hint. Further, an appearance of the object or indications of the sturdiness of different parts of the object can be printed on the hint to facilitate a safe extraction of the object.

Abstract: Disclosed herein is a case for a portable electronic device. The case has a back wall and a plurality of side walls for retaining the portable electronic device. The back wall includes a storage area. A cover is hingedly attached to the back wall to selectively cover the storage area. The storage area includes a grip for retaining edges of data cards.

Abstract: The present disclosure provides a system and method for performing an automatic port over process to replace and/or add to calibration data of an electric vehicle with updated calibration data, comprising: downloading the updated calibration data from a remote computing system; determining whether a charging port of the vehicle is connected to a charging station; determining whether a charging event is complete, wherein an energy storage system of the vehicle receives electrical energy from the charging station through the charging port; determining whether the vehicle is located within a predetermined geo-fence location; and performing the automatic port over process in response to (1) the charging port being connected to the charging station, (2) the charging event being complete, and (3) the vehicle being located within a predetermined geo-fence location

Abstract: A system and method for aggregating content, social sharing and instant messaging of saved electronic content to a memory location includes an administrator for controlling and allocating storage quota, based on a subscription type of one or more users. The user receives the electronic content on his computing device by selecting a text from the electronic content or the user can select the document by pressing the copy menu, which causes a pop-up user interface. The user can save the electronic content in one click directly on the user device or to a server as well as collaborate on the instant messaging platform to chat or share electronic content with other users.