Abstract: A ScxAl1-xN based filter may include a ScxAl1-xN material formed directly on a III-N material. The III-N material may include an n-type III-N layer or a III-N heterostructure having a 2DEG therein. The ScxAl1-xN based filter may be monolithically integrated with a III-N device such as a HEMT device to form a monolithically integrated circuit.

Abstract: An infrared photo-detector array and a method for manufacturing it are disclosed. The infrared photo-detector array contains a plurality of pyramid-shaped structures, a first light-absorbing material supporting the plurality of the pyramid-shaped structure, a carrier-selective electronic barrier supporting the first light-absorbing material, a second light-absorbing material supporting the carrier-selective electronic barrier, and a metal reflector supporting the second light-absorbing material, wherein the plurality of the pyramid shaped structures are disposed on the side of the photo-detector array facing the incident light to be detected and the metal reflector is disposed on the opposite side of the photo-detector array. The method disclosed teaches how to manufacture the infrared photo-detector array.

Abstract: A radar system includes a transmit section to emit a transmit signal. A chip-based front-end portion of the transmit section increases a frequency of an input signal to produce an intermediate signal and amplifies signal strength of the intermediate signal to produce the transmit signal. The frequency of the input signal is in a range of 76 gigahertz (GHz) to 80 GHz. The radar system also includes a receive section to receive a reflected signal resulting from reflection of the transmit signal by an object.

Abstract: A structure is disclosed. The structure contains a second detector disposed above a first detector, wherein the first detector contains a first absorber layer, a first barrier layer disposed above the first absorber layer, a first contact layer disposed above the first barrier layer, and wherein the second detector contains a second contact layer disposed above the first contact layer, a second barrier layer disposed above the second contact layer, a second absorber layer disposed above the second barrier layer.

Abstract: A radar system with frequency conversion includes a signal generator configured to generate an input signal at a first frequency. A transmitting interposer is configured to receive the input signal from the signal generator. The transmitting interposer includes a transmitting front-end module configured to upconvert the input signal at the first frequency to an outgoing radar signal at a second frequency greater than the first frequency, and a transmitting antenna module having a plurality of transmitting patches configured to radiate the outgoing radar signal. A receiving interposer is configured to transmit an output signal to the signal generator. The receiving interposer includes a receiving antenna module having a plurality of receiving patches configured to capture an incoming radar signal at the second frequency, and a receiving front-end module configured to downconvert the incoming radar signal at the second frequency to the output signal at the first frequency.

Abstract: An electronic assembly, comprising a carrier wafer having a top wafer surface and a bottom wafer surface; an electronic integrated circuit being formed in the carrier wafer and comprising a wafer contact pad on the top wafer surface; said carrier wafer comprising a through-wafer cavity joining the top and bottom wafer surfaces; a component chip having a component chip top surface, a component chip bottom surface and component chip side surfaces, the component chip being held in said through-wafer cavity by direct contact of at least a side surface of said first component chip with an attachment metal that fills at least a portion of said through-wafer cavity; said component chip comprising at least one component contact pad on said component chip top surface; a first conductor connecting said wafer contact pad and said component contact pad.

Abstract: An active quadrature generation circuit configured to provide an in-phase output signal and a quadrature output signal based on an input signal and a method of fabricating the active quadrature generation circuit on an integrated circuit are described. The circuit includes an input node to receive the input signal and a first transistor including a collector connected to a power supply pin. The circuit also includes a second transistor including a base connected to the power supply pin, the second transistor differing in size from the first transistor by a factor of K, wherein the in-phase output signal and the quadrature output signal are generated based on an inherent phase difference of 90 degrees between a current at a collector of the first transistor and a current at a base of the second transistor.

Abstract: A radar system includes a transmit section to emit a transmit signal. A chip-based front-end portion of the transmit section increases a frequency of an input signal to produce an intermediate signal and amplifies signal strength of the intermediate signal to produce the transmit signal. The frequency of the input signal is in a range of 76 gigahertz (GHz) to 80 GHz. The radar system also includes a receive section to receive a reflected signal resulting from reflection of the transmit signal by an object.

Abstract: A receiver apparatus is provided. The apparatus includes a single field effect transistor mixer comprising a gate, a source and a drain, wherein one of the source or the drain is configured to receive a first signal from a first low noise amplifier at a receiving frequency and another of the source or the drain is configured to output a second signal at an intermediate frequency to a second low noise amplifier; and a local oscillator configured to apply a third signal to the gate.

Abstract: An active quadrature generation circuit configured to provide an in-phase output signal and a quadrature output signal based on an input signal and a method of fabricating the active quadrature generation circuit on an integrated circuit are described. The circuit includes an input node to receive the input signal and a first transistor including a collector connected to a power supply pin. The circuit also includes a second transistor including a base connected to the power supply pin, the second transistor differing in size from the first transistor by a factor of K, wherein the in-phase output signal and the quadrature output signal are generated based on an inherent phase difference of 90 degrees between a current at a collector of the first transistor and a current at a base of the second transistor.

Abstract: A circuit for driving a switched transistor comprises: a level shifter comprising at least one transistor, the level shifter configured to convert an input pulse to a pulse having a greater voltage swing than the input pulse and shift a voltage level of the converted pulse; and a pulse shaping filter coupled between the level shifter and the gate of the switched transistor, the pulse shaping filter tuned to cancel or reduce an impedance of the gate of the switched transistor. The switched transistor and/or the at least one transistor are a GaN High Electron Mobility Transistor (HEMT).

Abstract: Methods of fabrication and monolithic integration of a polycrystalline infrared detector structure deposit Group III-V compound semiconductor materials at a low deposition temperature within a range of about 300° C. to about 400° C. directly on an amorphous template. The methods provide wafer-level fabrication of polycrystalline infrared detectors and monolithic integration with a readout integrated circuit wafer for focal plane arrays.

Abstract: A radar system with frequency conversion includes a signal generator configured to generate an input signal at a first frequency. A transmitting interposer is configured to receive the input signal from the signal generator. The transmitting interposer includes a transmitting front-end module configured to upconvert the input signal at the first frequency to an outgoing radar signal at a second frequency greater than the first frequency, and a transmitting antenna module having a plurality of transmitting patches configured to radiate the outgoing radar signal. A receiving interposer is configured to transmit an output signal to the signal generator. The receiving interposer includes a receiving antenna module having a plurality of receiving patches configured to capture an incoming radar signal at the second frequency, and a receiving front-end module configured to downconvert the incoming radar signal at the second frequency to the output signal at the first frequency.

Abstract: Methods of hydrogen atom incorporation and of passivation of grain boundaries of polycrystalline semiconductors use a low temperature, pulsed plasma to incorporate hydrogen atoms into the grain boundaries of polycrystalline semiconductor materials in a controlled manner. A hydrogen-passivated polycrystalline IR detector has hydrogen atoms incorporated into grain boundaries of a polycrystalline Group III-V compound semiconductor detector element and a dark current density characteristic that is lower than the dark current density characteristic of a polycrystalline IR detector without the incorporated hydrogen atoms.

Abstract: Methods of fabrication and monolithic integration of a polycrystalline infrared detector structure deposit Group III-V compound semiconductor materials at a low deposition temperature within a range of about 300° C. to about 400° C. directly on an amorphous template. The methods provide wafer-level fabrication of polycrystalline infrared detectors and monolithic integration with a readout integrated circuit wafer for focal plane arrays.

Abstract: A detector. The detector includes a first collector, a first interface layer on the first collector, a first absorber on the first interface layer, a second interface layer on the first absorber, and a second collector on the second interface layer. The first absorber is configured to absorb photons to generate electron-hole pairs. The first interface layer may include a barrier configured to impede the flow of majority carriers from the first absorber to the first collector. The second barrier may include a barrier configured to impede the flow of majority carriers from the first absorber, or from a second absorber, to the second collector.

Abstract: A Delta-Sigma modulator architecture is disclosed that uses interleaving and dynamic matching algorithms to address the needs of multi-mode, multi-band high bandwidth transmitters. The proposed architecture also supports a novel software defined transmitter architecture based on an interleaved Delta-Sigma modulator to generate RF signals. The proposed architecture leverages interleaving concepts to relax subcomponent clock rates without changing the effective oversampling ratio, thus, making it easier to reach aggressive dynamic range goals across wider bandwidths at higher frequencies. The DEM algorithm helps to randomize mismatch errors across all interleaved paths and improves substantially the signal-to-noise ratio. Additionally, a tunable bandpass filter can be added to reject out-of-band emissions.

Abstract: An electronic assembly, comprising a carrier wafer having a top wafer surface and a bottom wafer surface; an electronic integrated circuit being formed in the carrier wafer and comprising a wafer contact pad on the top wafer surface; said carrier wafer comprising a through-wafer cavity joining the top and bottom wafer surfaces; a component chip having a component chip top surface, a component chip bottom surface and component chip side surfaces, the component chip being held in said through-wafer cavity by an attachment material attaching at least one wall of the through-wafer cavity to at least one of the component chip bottom surface and a component chip side surface; said component chip comprising at least one component contact pad on said component chip top substrate; a first conductor connecting said wafer contact pad and said component contact pad.

Abstract: A Delta-Sigma modulator architecture is disclosed that uses interleaving and dynamic matching algorithms to address the needs of multi-mode, multi-band high bandwidth transmitters. The proposed architecture also supports a novel software defined transmitter architecture based on an interleaved Delta-Sigma modulator to generate RF signals. The proposed architecture leverages interleaving concepts to relax subcomponent clock rates without changing the effective oversampling ratio, thus, making it easier to reach aggressive dynamic range goals across wider bandwidths at higher frequencies. The DEM algorithm helps to randomize mismatch errors across all interleaved paths and improves substantially the signal-to-noise ratio. Additionally, a tunable bandpass filter can be added to reject out-of-band emissions.

Abstract: The present application generally relates communications and hazard avoidance within a monitored driving environment. More specifically, the application teaches a system for semi-transparent and flexible millimeter wave circuits and antennas using inexpensive PET substrate. The system facilitates the fabrication of millimeter wave circuits, transmission lines and antennas in various optically transparent platform where optical transparency is desired, for example in automotive radar in windows, windshield, and rear/side mirrors.