Abstract: Various embodiments of the present disclosure are directed towards a semiconductor package comprising optically coupled integrated circuit (IC) chips. A first IC chip and a second IC chip overlie a substrate at a center of the substrate. A photonic chip overlies the first and second IC chips and is electrically coupled to the second IC chip. A laser device chip overlies the substrate, adjacent to the photonic chip and the second IC chip, at a periphery of the substrate. The photonic chip is configured to modulate a laser beam from the laser device chip in accordance with an electrical signal from the second IC chip and to provide the modulated laser beam to the first IC chip. This facilitates optical communication between the first IC chip to the second IC chip. Various embodiments of the present disclosure are further directed towards simultaneously aligning and bonding constituents of the semiconductor package.

Abstract: An optical integrated circuit (IC) structure includes: a substrate including a fiber slot formed in an upper surface of the substrate and extending from an edge of the substrate, and an undercut formed in the upper surface and extending from the fiber slot; a semiconductor layer disposed on the substrate; a dielectric structure disposed on the semiconductor layer; an interconnect structure disposed in the dielectric structure; a plurality of vents that extend through a coupling region of the dielectric structure and expose the undercut; a fiber cavity that extends through the coupling region of dielectric structure and exposes the fiber slot; and a barrier ring disposed in the dielectric structure, the barrier ring surrounding the interconnect structure and routed around the perimeter of the coupling region.

Abstract: A semiconductor device is provided. The semiconductor device includes a waveguide over a first dielectric layer. A first portion of the waveguide has a first width and a second portion of the waveguide has a second width larger than the first width. The semiconductor device includes a first doped semiconductor structure and a second doped semiconductor structure. The second portion of the waveguide is between the first doped semiconductor structure and the second doped semiconductor structure.

Abstract: An optical waveguide structure of a semiconductor photonic device includes a first semiconductor waveguide, a second semiconductor waveguide, and an air seam between the first and second semiconductor waveguides. The semiconductor waveguides extend in a first direction, and a plurality of air seams extend in a second direction. Each of the air seams is disposed between two adjacent semiconductor waveguides. A distance between the two adjacent semiconductor waveguides is less than a width of each semiconductor waveguide.

Abstract: A coupling system includes an optical fiber configured to carry an optical signal. The coupling system further includes a chip in optical communication with the optical fiber. The chip includes a substrate. The chip further includes a grating on a first side of the substrate, wherein the grating is configured to receive the optical signal. The chip further includes an interconnect structure over the grating on the first side of the substrate, wherein the interconnect structure defines a cavity aligned with the grating. The chip further includes a first polysilicon layer on a second side of the substrate, wherein the second side of the substrate is opposite to the first side of the substrate.

Abstract: An edge coupler, a waveguide structure and a method for forming a waveguide structure are provided. The edge coupler includes a substrate, a first cladding layer, a core layer and a first anti-reflection coating layer. The first cladding layer has a second sidewall aligned with a first sidewall of the substrate. The core layer has a third sidewall aligned with the second sidewall. The anti-reflection coating layer lines the first sidewall, the second sidewall and the third sidewall. A thickness of the anti-reflection coating layer varies along the first sidewall, the second sidewall and the third sidewall.

Abstract: Some implementations described herein include a photonics integrated circuit device including a photonics structure. The photonics structure includes a waveguide structure and an optical attenuator structure. In some implementation, the optical attenuator structure is formed on an end region of the waveguide structure and includes a metal material or a doped material. In some implementations, the optical attenuator structure includes a gaussian doping profile within a portion of the waveguide structure. The optical attenuator structure may absorb electromagnetic waves at the end of the waveguide structure with an efficiency that is improved relative to a spiral optical attenuator structure or metal cap optical attenuator structure.

Abstract: A semiconductor device is provided. The semiconductor device includes a waveguide over a first dielectric layer. A first portion of the waveguide has a first width and a second portion of the waveguide has a second width larger than the first width. The semiconductor device includes a first doped semiconductor structure and a second doped semiconductor structure. The second portion of the waveguide is between the first doped semiconductor structure and the second doped semiconductor structure.

Abstract: A semiconductor structure includes a waveguide and an optical attenuator. The waveguide is disposed over an insulating layer and configured to guide light. The optical attenuator is connected to the waveguide. The optical attenuator has a first surface and a second surface opposite the first surface, and a cross-sectional width of the optical attenuator decreases from the first surface to the second surface.

Abstract: At least one doped silicon region is formed in a silicon layer of a semiconductor substrate, and a silicon oxide layer is formed over the silicon layer. A germanium-containing material portion is formed in the semiconductor substrate to provide a p-n junction or a p-i-n junction including the germanium-containing material portion and one of the at least one doped silicon region. A capping material layer that is free of germanium is formed over the germanium-containing material portion. A first dielectric material layer is formed over the silicon oxide layer and the capping material layer. The first dielectric material layer includes a mesa region that is raised from the germanium-containing material portion by a thickness of the capping material layer. The capping material layer may be a silicon capping layer, or may be subsequently removed to form a cavity. Dark current is reduced for the germanium-containing material portion.

Abstract: A method for manufacturing an integrated circuit device is provided. The method includes: providing a photonic structure including an insulating structure and an optical coupler embedded in the insulating structure; and removing a portion of the insulating structure to expose a coupling surface of the optical coupler and form a light reflective structure corresponding to the coupling surface.

Abstract: A method of making a chip includes depositing a first polysilicon layer on a top surface and a bottom surface of a substrate. The method further includes patterning the first polysilicon layer to define a recess, wherein the first polysilicon layer is completed removed from the recess. The method further includes implanting dopants into the substrate to define an implant region. The method further includes depositing a contact etch stop layer (CESL) in the recess, wherein the CESL covers the implant region. The method further includes patterning the CESL to define a CESL block. The method further includes forming a waveguide and a grating in the substrate. The method further includes forming an interconnect structure over the waveguide, the grating and the CESL block. The method further includes etching the interconnect structure to define a cavity aligned with the grating.

Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit. The integrated circuit includes a substrate having an upper face and a lower face. The upper face includes a central region and an outer sidewall that laterally surrounds the central region and that extends from the upper face to the lower face. An optical edge coupler is disposed over the upper face of the substrate and extends in a first direction from the central region toward the outer sidewall. An outer sidewall of the optical edge coupler corresponds to the outer sidewall of the substrate and has a concave surface or a convex surface.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor package comprising optically coupled integrated circuit (IC) chips. A first IC chip and a second IC chip overlie a substrate at a center of the substrate. A photonic chip overlies the first and second IC chips and is electrically coupled to the second IC chip. A laser device chip overlies the substrate, adjacent to the photonic chip and the second IC chip, at a periphery of the substrate. The photonic chip is configured to modulate a laser beam from the laser device chip in accordance with an electrical signal from the second IC chip and to provide the modulated laser beam to the first IC chip. This facilitates optical communication between the first IC chip to the second IC chip. Various embodiments of the present disclosure are further directed towards simultaneously aligning and bonding constituents of the semiconductor package.

Abstract: A method for fabricating a photonic package device is provided. The method includes patterning a semiconductor layer of a semiconductor-on-insulator (SOI) substrate into a waveguide structure and at least one first semiconductor pillar; forming a metal-dielectric stack over the waveguide structure and the first semiconductor pillar; etching an opening in the metal-dielectric stack to expose the first semiconductor pillar; etching an insulator layer of the SOI substrate to form at least one insulator cap below the first semiconductor pillar; and etching a base semiconductor substrate of the SOI substrate to form at least one second semiconductor pillar below the insulator cap.

Abstract: A coupling system includes an optical fiber configured to carry an optical signal. The coupling system further includes a chip in optical communication with the optical fiber. The chip includes a substrate. The chip further includes a grating on a first side of the substrate, wherein the grating is configured to receive the optical signal. The chip further includes an interconnect structure over the grating on the first side of the substrate, wherein the interconnect structure defines a cavity aligned with the grating. The chip further includes a first polysilicon layer on a second side of the substrate, wherein the second side of the substrate is opposite to the first side of the substrate.

Abstract: An optical integrated circuit (IC) structure includes: a substrate including a fiber slot formed in an upper surface of the substrate and extending from an edge of the substrate, and an undercut formed in the upper surface and extending from the fiber slot; a semiconductor layer disposed on the substrate; a dielectric structure disposed on the semiconductor layer; an interconnect structure disposed in the dielectric structure; a plurality of vents that extend through a coupling region of the dielectric structure and expose the undercut; a fiber cavity that extends through the coupling region of dielectric structure and exposes the fiber slot; and a barrier ring disposed in the dielectric structure, the barrier ring surrounding the interconnect structure and routed around the perimeter of the coupling region.

Abstract: At least one doped silicon region is formed in a silicon layer of a semiconductor substrate, and a silicon oxide layer is formed over the silicon layer. A germanium-containing material portion is formed in the semiconductor substrate to provide a p-n junction or a p-i-n junction including the germanium-containing material portion and one of the at least one doped silicon region. A capping material layer that is free of germanium is formed over the germanium-containing material portion. A first dielectric material layer is formed over the silicon oxide layer and the capping material layer. The first dielectric material layer includes a mesa region that is raised from the germanium-containing material portion by a thickness of the capping material layer. The capping material layer may be a silicon capping layer, or may be subsequently removed to form a cavity. Dark current is reduced for the germanium-containing material portion.

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a semiconductor substrate having a first surface and a first optical coupler disposed on the first surface of the semiconductor substrate. The first optical coupler includes a first surface facing away from the first surface of the semiconductor substrate and a first lateral surface connected to the first surface of the first optical coupler. The first surface of the first optical coupler and the first lateral surface of the optical coupler define an angle greater than 90 degrees. A method of manufacturing a semiconductor device package is also disclosed.

Abstract: In some embodiments, the present disclosure relates to a device having a first waveguide and a second waveguide arranged over a substrate. The first waveguide has a first input terminal and a first output terminal, wherein the first input terminal is configured to receive light. The second waveguide is arranged laterally beside the first waveguide and has a second input terminal and a second output terminal. The second input terminal of the second waveguide is configured to receive light. The first waveguide further includes a first portion that has a different structure than surrounding portions of the first waveguide. The second waveguide further includes a second portion that has a different structure than surrounding portions of the second waveguide. The first waveguide is spaced apart at a maximum distance from the second waveguide at the first portion and the second portion.