Patents by Inventor Heike E. Riel

Heike E. Riel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7629202
    Abstract: A method and apparatus for providing ESD protection of an integrated circuit using a temporary conductive coating. The method deposits a temporary conductive coating upon a chip die between contacts to be protected such that a conductive path is created between contacts, provides a carrier substrate that is then bonded to the chip die and then the conductive coating is deactivated to ready the device for use. The deactivation of the conductive coating may involve physical removal of the conductive coating (or a portion thereof), oxidation of the conductive coating to form a non-conductive coating, or some other process to interrupt the conductive path between contacts. The apparatus of the invention is a chip having a temporary conductive coating deposited thereon to protect the integrated circuit from ESD events.
    Type: Grant
    Filed: September 18, 2006
    Date of Patent: December 8, 2009
    Assignee: International Business Machines Corporation
    Inventors: Jonas R Weiss, Thomas E. Morf, Heike E Riel
  • Publication number: 20090298209
    Abstract: A method for manufacturing an optoelectronic device including a capping layer for improving out-coupling and optical fine-tuning of emission characteristics includes steps of: producing an optoelectronic member for generating photons of a predefined wavelength; producing a light emitting surface on the optoelectronic member; and producing a capping layer on the light emitting surface.
    Type: Application
    Filed: August 10, 2009
    Publication date: December 3, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Walter Riess, Heike E. Riel, Siegfried F. Karg
  • Publication number: 20090275191
    Abstract: A method and apparatus for providing ESD protection of an integrated circuit using a temporary conductive coating. The method deposits a temporary conductive coating upon a chip die between contacts to be protected such that a conductive path is created between contacts, provides a carrier substrate that is then bonded to the chip die and then the conductive coating is deactivated to ready the device for use. The deactivation of the conductive coating may involve physical removal of the conductive coating (or a portion thereof), oxidation of the conductive coating to form a non-conductive coating, or some other process to interrupt the conductive path between contacts. The apparatus of the invention is a chip having a temporary conductive coating deposited thereon to protect the integrated circuit from ESD events.
    Type: Application
    Filed: September 18, 2006
    Publication date: November 5, 2009
    Inventors: Jonas R Weiss, Thomas E. Morf, Heike E Riel
  • Publication number: 20090273011
    Abstract: A MOS device includes first and second source/drains spaced apart relative to one another. A channel is formed in the device between the first and second source/drains. A gate is formed in the device between the first and second source/drains and proximate the channel, the gate being electrically isolated from the first and second source/drains and the channel. The gate is configured to control a conduction of the channel as a function of a potential applied to the gate. The MOS device further includes an energy filter formed between the first source/drain and the channel. The energy filter includes an impurity band operative to control an injection of carriers from the first source/drain into the channel.
    Type: Application
    Filed: July 16, 2009
    Publication date: November 5, 2009
    Applicant: International Business Machines Corporation
    Inventors: Mikael T. Bjoerk, Siegfried F. Karg, Joachim Knoch, Heike E. Riel, Walter H. Riess, Heinz Schmid
  • Publication number: 20090258166
    Abstract: A device for patterning structures on a substrate includes an imaging device having a scanning tip, a light emitting device, and a space around the scanning tip. The space comprises a vapour of a material which is suitable for Chemical Vapour Deposition onto the substrate when decomposed. The light emitting device is adapted to emit a light beam, which has an intensity not capable to decompose the vapour, onto the scanning tip in such a way that an electromagnetic field induced by the light beam near the scanning tip is high enough to decompose the vapour.
    Type: Application
    Filed: November 9, 2004
    Publication date: October 15, 2009
    Applicant: International Business Machines Corporation
    Inventors: Siegfried F. Karg, Roland Germann, Heike E. Riel, Walter Heinrich Riess, Reto Schlittler
  • Publication number: 20090200540
    Abstract: A MOS device includes first and second source/drains spaced apart relative to one another. A channel is formed in the device between the first and second source/drains. A gate is formed in the device between the first and second source/drains and proximate the channel, the gate being electrically isolated from the first and second source/drains and the channel. The gate is configured to control a conduction of the channel as a function of a potential applied to the gate. The MOS device further includes an energy filter formed between the first source/drain and the channel. The energy filter includes a superlattice structure wherein a mini-band is formed. The energy filter is operative to control an injection of carriers from the first source/drain into the channel. The energy filter, in combination with the first source/drain, is configured to produce an effective zero-Kelvin first source/drain.
    Type: Application
    Filed: February 7, 2008
    Publication date: August 13, 2009
    Inventors: Mikael T. Bjoerk, Siegfried F. Karg, Joachim Knoch, Heike E. Riel, Walter H. Riess, Heinz Schmid
  • Publication number: 20090200605
    Abstract: A MOS device includes first and second source/drains spaced apart relative to one another. A channel is formed in the device between the first and second source/drains. A gate is formed in the device between the first and second source/drains and proximate the channel, the gate being electrically isolated from the first and second source/drains and the channel. The gate is configured to control a conduction of the channel as a function of a potential applied to the gate. The MOS device further includes an energy filter formed between the first source/drain and the channel. The energy filter includes an impurity band operative to control an injection of carriers from the first source/drain into the channel.
    Type: Application
    Filed: February 7, 2008
    Publication date: August 13, 2009
    Inventors: Mikael T. Bjoerk, Siegfried F. Karg, Joachim Knoch, Heike E. Riel, Walter H. Riess, Heinz Schmid
  • Publication number: 20090146133
    Abstract: A method for the fabrication of a semiconductor structure that includes areas that have different crystalline orientation and semiconductor structure formed thereby. The disclosed method allows fabrication of a semiconductor structure that has areas of different semiconducting materials. The method employs templated crystal growth using a Vapor-Liquid-Solid (VLS) growth process. A silicon semiconductor substrate having a first crystal orientation direction is etched to have an array of holes into its surface. A separation layer is formed on the inner surface of the hole for appropriate applications. A growth catalyst is placed at the bottom of the hole and a VLS crystal growth process is initiated to form a nanowire. The resultant nanowire crystal has a second different crystal orientation which is templated by the geometry of the hole.
    Type: Application
    Filed: December 10, 2008
    Publication date: June 11, 2009
    Inventors: Mikael T. Bjoerk, Oliver Hayden, Heike E. Riel, Walter Heinrich Riess, Heinz Schmid
  • Patent number: 7466579
    Abstract: A field effect device includes a source electrode, a drain electrode spaced laterally apart from the source electrode, a channel formed between the source electrode and the drain electrode, and a gate electrode separated from the channel by an insulating layer. The channel includes a switching material that is reversibly switchable between a lower conductivity state and a higher conductivity state by at least one of: (i) application of a predetermined voltage between the source electrode and the drain electrode or between the gate electrode and at least one of the source electrode and the drain electrode, (ii) application of a voltage or a current to the switching material in the channel, and (iii) application of at least one of heat and light. Each of the conductivity states is persistent without the need for a sustaining excitation signal including an electrical field, heat and/or light applied to the device.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: December 16, 2008
    Assignee: International Business Machines Corporation
    Inventors: Georg J. Bednorz, David J. Gundlach, Siegfried F. Karg, Gerhard J. Meijer, Heike E. Riel, Walter H. Riess
  • Publication number: 20080251777
    Abstract: A field effect device includes a source electrode, a drain electrode, a channel formed between the source electrode and the drain electrode, and a gate electrode formed directly on the channel and arranged in a gap between the source electrode and the drain electrode. The channel includes a switching material that is reversibly switchable between a lower conductivity state and a higher conductivity state. The first conductivity state has an electrical conductivity which is lower than an electrical conductivity of the second conductivity state. Each of the conductivity states is persistent without the need for a sustaining excitation signal including an electrical field, heat and/or light applied to the device.
    Type: Application
    Filed: May 14, 2008
    Publication date: October 16, 2008
    Applicant: International Business Machines Corporation
    Inventors: Georg J. Bednorz, David J. Gundlach, Siegfried F. Karg, Gerhard I. Meijer, Heike E. Riel, Walter H. Riess
  • Publication number: 20080220561
    Abstract: The present invention provides methods and apparatus for melt-based patterning for electronic devices. It employs and provides processes and apparatus for fabricating an electronic device having a pattern formed on a surface by a deposition material. Further, the invention a process for fabricating semiconductors, organic light-emitting devices (OLEDs), field-effect transistors, and in particular high-resolution patterning for RGB displays. A process for fabricating an organic electronic device includes the steps of heating and applying a pressure to the deposition material to form a melt, and depositing the melted deposition material on the surface with a phase-change printing technique or a spray technique. The melted deposition material solidifies on the surface.
    Type: Application
    Filed: October 11, 2007
    Publication date: September 11, 2008
    Inventors: Siegfried F. Karg, Heike E. Riel, Walter H. Riess
  • Publication number: 20080138555
    Abstract: A method for manufacturing an organic electronic device including a stack of layers including a release layer, the stack having a lateral structure on a substrate, at least one of the layers being an organic material layer. A method includes with the step of providing a stamp with at least one protrusion of the surface area corresponding to the lateral structure. The stack of layers is deposited with a first face on the surface area of the protrusion of the stamp. A second face of the stack that is opposite to the first face is brought into adhesive contact with the substrate. The stamp is released from the stack.
    Type: Application
    Filed: October 3, 2007
    Publication date: June 12, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Siegfried F. Karg, Bruno Michel, Heike E. Riel, Walter H. Riess
  • Publication number: 20080072816
    Abstract: A method for forming a structure of a desired cross-section on a substrate is provided. The method provides a seed structure comprising at least one support layer on the substrate. The support layer has a geometric shape related to the desired cross-section of the structure and is diffusive to a precursor constituent. The method further includes growing the structure by supplying at least one precursor constituent on the substrate. The desired cross-section of the structure is defined by the geometric shape of at least one support layer.
    Type: Application
    Filed: September 26, 2006
    Publication date: March 27, 2008
    Inventors: Walter H. Riess, Heike E. Riel, Siegfried F. Karg, Heinz Schmid
  • Patent number: 7306970
    Abstract: A method for manufacturing an organic electronic device including a stack of layers with a lateral structure on a substrate, at least one of the layers being an organic material layer. A method includes with the step of providing a stamp with at least one protrusion of the surface area corresponding to the lateral structure. The stack of layers is deposited with a first face on the surface area of the protrusion of the stamp. A second face of the stack that is opposite to the first face is brought into adhesive contact with the substrate. The stamp is released from the stack.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: December 11, 2007
    Assignee: International Business Machines Corporation
    Inventors: Siegfried F. Karg, Bruno Michel, Heike E. Riel, Walter H. Riess
  • Patent number: 7282430
    Abstract: The present invention provides methods and apparatus for melt-based patterning for electronic devices. It employs and provides processes and apparatus for fabricating an electronic device having a pattern formed on a surface by a deposition material. Further, the invention a process for fabricating semiconductors, organic light-emitting devices (OLEDs), field-effect transistors, and in particular high-resolution patterning for RGB displays. A process for fabricating an organic electronic device includes the steps of heating and applying a pressure to the deposition material to form a melt, and depositing the melted deposition material on the surface with a phase-change printing technique or a spray technique. The melted deposition material solidifies on the surface.
    Type: Grant
    Filed: May 24, 2004
    Date of Patent: October 16, 2007
    Assignee: International Business Machines Corporation
    Inventors: Siegfried F. Karg, Heike E. Riel, Walter H. Riess
  • Patent number: 7130212
    Abstract: A field effect device (2) includes a source electrode (14), a drain electrode (16), a channel (24) formed between the source electrode (14) and the drain electrode (16), and a gate electrode (22) separated from the channel (24) by an insulating layer (20), wherein the channel (24) comprises a switching material reversibly switchable between a lower conductivity state and a higher conductivity state, each of the conductivity states being persistent.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: October 31, 2006
    Assignee: International Business Machines Corporation
    Inventors: Georg J. Bednorz, David J. Gundlach, Siegfried F. Karg, Gerhard I. Meijer, Heike E. Riel, Walter H. Riess
  • Patent number: 6432741
    Abstract: The present invention pertains to new flip-chip organic opto-electronic structures and methods for making the same. The new organic opto-electronic device includes at least two separate parts. Each part comprises an electrode and at least one of these electrodes carries an organic stack. After completion of these separate parts both are brought together to form the complete opto-electronic device. It is a crucial aspect of the new flip-chip approach that spacers are integrated on one or both sides of the parts and that an interface formation process is employed.
    Type: Grant
    Filed: August 8, 2001
    Date of Patent: August 13, 2002
    Assignee: International Business Machines Corporation
    Inventors: Peter Mueller, Heike E. Riel, Walter Riess, Horst Vestweber
  • Publication number: 20020020924
    Abstract: The present invention pertains to new flip-chip organic opto-electronic structures and methods for making the same. The new organic opto-electronic device includes at least two separate parts. Each part comprises an electrode and at least one of these electrodes carries an organic stack. After completion of these separate parts both are brought together to form the complete opto-electronic device. It is a crucial aspect of the new flip-chip approach that spacers are integrated on one or both sides of the parts and that an interface formation process is employed.
    Type: Application
    Filed: August 8, 2001
    Publication date: February 21, 2002
    Inventors: Peter Mueller, Heike E. Riel, Walter Riess, Horst Vestweber
  • Patent number: 6316786
    Abstract: The present invention pertains to new flip-chip organic opto-electronic structures and methods for making the same. The new organic opto-electronic device includes at least two separate parts. Each part comprises an electrode and at least one of these electrodes carries an organic stack. After completion of these separate parts both are brought together to form the complete opto-electronic device. It is a crucial aspect of the new flip-chip approach that spacers are integrated on one or both sides of the parts and that an interface formation process is employed.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: November 13, 2001
    Assignee: International Business Machines Corporation
    Inventors: Peter Mueller, Heike E. Riel, Walter Riess, Horst Vestweber