Abstract: The invention provides process for producing microelectronic devices such as integrated circuit devices. Such have vias, interconnect metallization and wiring lines using dissimilar low dielectric constant intermetal dielectrics. The use of both organic and inorganic low-k dielectrics offers advantages due to the significantly different plasma etch characteristics of the two kinds of dielectrics. One dielectric serves as the etchstop in etching the other dielectric so that no additional etchstop layer is required. A microelectronic device is formed having a substrate and a layer of a first dielectric material positioned on the substrate. A layer of a second dielectric material is positioned on the first dielectric layer. Either a sacrificial metal layer or and an additional layer the first dielectric material is positioned on the second dielectric material.

Abstract: The present invention provides an apparatus and method for determining the characteristic(s) of a discharge lamp (f rto example a fluorescent lamp or a high-intensity discharge lamp) operated by a high-frequency electronic ballast including a resonant tank comprising an inductor and a capacitor, wherein said characteristic(s) are selected from the group consisting of lamp input voltage, lamp resistance and lamp power, comprising means for measuring the inductor voltage and/or current, and means for determining said characteristic(s) from the measured inductor voltage and/or current. More generally, the present invention provides techniques for determining a number of parameters of a power converter circuit simply from easuring an inductir voltage or inductor current.

Abstract: The invention provides an apparatus and a method for controlling the power output of a fluorescent lamp in order to provide dimming control. The fluorescent lamp is driven by an electronic ballast, for example a half-bridge resonant inverter, and the electronic ballast is switched at a constant frequency and with a constant duty-cycle, but with a variable DC voltage power input. Dimming control is provided by variation of the DC voltage power supply. The variable DC supply may be obtained from an AC source followed by a power factor corrected AC-DC variable converter, or a DC source followed by a variable DC-DC converter.

Abstract: A bidirectional switched-capacitor power converter has a first step-up mode and a second step-down mode. The converter includes a capacitor in which in both modes is charged during a first switch topology and then discharged during a second switch topology. Two converters operating out of phase may be disposed in parallel to enable continuous power conversion.

Abstract: The invention provides processes for the formation of structures in microelectronic devices such as integrated circuit devices. More particularly, the invention relates to the formation of vias, interconnect metallization and wiring lines using multiple low dielectric-constant inter-metal dielectrics. The processes use two or more dissimilar low-k dielectrics for the inter-metal dielectrics of Cu-based dual damascene backends of integrated circuits. The use of both organic and inorganic low-k dielectrics offers advantages due to the significantly different plasma etch characteristics of the two kinds of dielectrics. One dielectric serves as the etchstop in etching the other dielectric so that no additional etchstop layer is required. Exceptional performance is achieved due to the lower parasitic capacitance resulting from the use of low-k dielectrics.

Abstract: A pallet for mounting components on a double sided PCB including a fab (panel) having a frame area surrounding a depression. A shoulder around the depression is dimensioned to support the fab. The fab is laid on the shoulder with the a group of components mounted in a previous reflow operation in the space between the depression and a first area of the fab. The print, pick and place and reflow operations are performed to mount a second group of components on the opposite side of the fab. The first area of the fab is shielded from the heat of the oven so that the first components do not separate from the fab during the second reflow step. Standoffs in the depression prevent sagging of the board. Another area of the pallet has a recessed area with cutouts for wave soldering components located on the third area of the fab.

Abstract: An apparatus used in a process for supporting a printed circuit board during a wave soldering operation including a frame with a frame opening in which a surface of the frame supports the board and also serves as a reference surface for vertically positioning the board above the solder pool. The board is secured against the reference surface with spring loaded clamps. Stiffeners preferably being an aluminum extrusion having a Tee or angle cross section is mounted along the outside edge of the reference surface of the frame and has a second reference surface facing in a direction opposite the reference surface of the frame. The second reference surface on the extrusion is accessible for support by a slide rail so that the height of the reference surface of the frame above the surface of the pool is independent of the thickness of the board or frame.

Abstract: A frame comprising four angles each angle having two legs, each leg connected to a a leg of a neighboring angle wherein locations of attachment of the legs are adjustable so as to accommodate a range of sizes of boards for a surface mount manufacturing process. One leg of each angle has a tongue and the other leg has a groove so that tongue of one leg slideably engages the groove of the leg of a neighboring angle to enable adjustment in size of the frame opening. The board is supported on a shoulder around the frame opening with the surface of the board opposite the supporting shoulder surface coplanar with the plane surface of the frame. A flat spring loaded rotatable finger on the plan surface in one corner of the board urges the board toward the opposite corner of the frame.

Abstract: A combination chamfering tool and cutting tool for a milling machine that machines a wall and leaves a chamfered comer including a shaft having one section (12) dimensioned to slip into a mill collet. Another larger cylindrical section (14) is joined end- to- end with the one section and has a conical end (16). A pair of cutting flutes (18) are formed on the conical surface (16). A central bore (20) extends the entire length of the shaft and is dimensioned to accept a mill cutter (22) slip fitted into the bore (20). A set screw (24) secures the cutter (34) in the bore (20). In one embodiment, a part of the bore is threaded and an allen screw (34) is a positioning stop for the cutter (22). In another embodiment, a cylindrical sleeve is journalled onto the shaft forming a chamber.

Abstract: The invention relates to the formation of structures in microelectronic devices such as integrated circuit devices by means of borderless via architectures in intermetal dielectrics. An integrated circuit structure has a substrate, a layer of a second dielectric material on the substrate and spaced apart metal contacts on the second dielectric. A space between adjacent metal contact side walls is filled with the second dielectric material. A ledge of a first dielectric material is on top of each second dielectric material filled space. The ledges are attached to adjacent side walls such that each ledge either fully spans the width of the filled space between adjacent side walls; or partially spans the width of the filled space between adjacent side walls, and the area between adjacent ledges is filled with second dielectric material. A top surface of each of the metal contacts, a top surface of the ledges and a top surface of any filled areas between adjacent ledges are at a common level.

Abstract: The present invention provides a method of manufacturing of planarizing an insulating layer using a reduced size reversed interconnect mask and an etch stop layer. Spaced interconnections 22 are provided over the semiconductor substrate 10. An etch stop layer 26 is formed over the raised portions 22. A dielectric layer 30 is formed over the etch stop layer 26. The top of the first dielectric layer 30 over the valley 23 is about coplanar with the top of the etch stop layer 26 over the raised portion 22. A reduced size, reverse interconnect (photoresist) mask 40 is formed over the first dielectric layer 30. The reduced size, reverse interconnect mask 40 covers portions of the valleys 23 between the raised portions. The first dielectric layer 30 is etched using the reverse interconnect mask 40 as an etch mask leaving dielectric blocks 30A over the narrow valleys 23. The dielectric blocks 30A fill in the valleys 23 between the raised portions thereby eliminating the need for a global planarization step.

Abstract: The present invention provides a method of forming closely spaced interconnections over a semiconductor structure using conventional photolithographic and etching methods and tools. The process which begins by providing an insulating layer 14 over a semiconductor structure 10. A conductive layer and an isolation layer are sequentially formed over the insulating layer 14. The conductive layer is patterned forming spaced first interconnects 16 covered by isolation layer blocks 20. Sidewall spacers are then formed on the sidewalls of the first interconnects and the isolation layer blocks 20. A second conductive layer is formed over the resulting surface. The second conductive layer is planarized forming second interconnects 30 and excess conductive pieces 31 between the sidewall spacers. The excess conductive pieces 31 are intended to be removed.

Abstract: The present invention provides a method of manufacturing of planarizing an insulating layer using a sized reversed interconnect mask and two polish stop layers. Spaced interconnections 14 are provided over the semiconductor substrate 10. An insulating layer 22 is formed over the interconnections 14 forming valleys 18 between the spaced interconnections 14. A first polish stop layer 26 is formed over the insulating layer 22. A dielectric layer 30 is formed over the first polish stop layer 26. A second polish stop layer 36 is formed over the dielectric layer 30. The top of the second polish stop layer 36 over the valley 23 is coplanar with the top of the first polish stop layer 26 over the interconnect 14. A reduced size, reverse interconnect mask 40 is formed over the second polish stop layer 36. The reduced size, reverse interconnect mask 40 covers portions of the valleys 23 between the spaced interconnections 14.

Abstract: A frame for supporting a printed circuit board during manufacturing operations having a frame with at least one open area and frame holes arrayed around an edge of open area; a flat finger for each frame hole and having a mounting hole located in the middle of the finger; a stool for each finger having a stem and a cap on one end and a helical spring biasing the finger toward the frame. The stem passes through the mounting hole of the respective finger and frame hole. Each stem has a retaining member on an end of the stool distal from the cap such that each stool is retained in its respective hole by the cap against the finger on one end and the retaining means against the frame on the other side of the finger and frame so that each finger is rotatably mounted on the frame.

Abstract: A method of providing control signals for resetting mirror elements (10,20) of a digital micro-mirror device (DMD) having reset groups (FIG. 4), or for resetting moveable elements of other micro-mechanical devices that operate with similar principles. A bias voltage is applied to the mirrors and their landing sites, and an address voltage is applied under the mirrors. (FIG. 3). The address voltage is held at an intermediate level except during a reset period. During this reset period, the address voltage is increased. Also, during reset, the bias applied to mirrors to be reset is pulsed and offset, and the bias applied to mirrors not to be reset is increased. (FIGS. 5 and 6).

Abstract: This invention relates to a portable toy capable of playing, at different times, different, interchangeable, electro-mechanical toy-units. The invention provides a toy which permits a user to have a single power-unit to supply electrical and mechanical energy to a toy-unit which is received by the power-unit. However, the toy-units are interchangeable and so the user can play, at different times, with several different toy units, with each different toy-unit providing a different toy with which the user can play. In a preferred embodiment of the invention, the power-unit is worn on a wrist of the user.