Patents by Inventor Herman Schmit

Herman Schmit has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7489162
    Abstract: Some embodiments provide a reconfigurable IC. This reconfigurable IC includes a set of reconfigurable circuits for reconfigurably performing a set of operations in more than one reconfiguration cycle. The reconfigurable IC also includes a set of reconfigurable circuits that perform a storage operation during one reconfiguration cycle and perform a non-storage operation during a second reconfiguration cycle. At least two of these reconfigurable circuits are communicatively coupled to operate as a data register during at least two reconfiguration cycles.
    Type: Grant
    Filed: December 1, 2005
    Date of Patent: February 10, 2009
    Assignee: Tabula, Inc.
    Inventors: Herman Schmit, Jason Redgrave
  • Publication number: 20090002016
    Abstract: Some embodiments provide a configurable integrated circuit (IC). The IC has configurable logic circuits for performing logical operations, configurable routing circuits for routing signals between the configurable logic circuits, and a network for monitoring data. In some embodiments a method uses at least a subset of the configurable logic circuits and a first subset of the configurable routing circuits to implement a user design circuit on the configurable IC. The method uses a second subset of the configurable routing circuits to pass signals to the network.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Inventors: Brad Hutchings, Steven Teig, Herman Schmit, Jason Redgrave
  • Patent number: 7449915
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes first and second circuits. The first circuit is a logic circuit for receiving configuration data sets and performing at least a first function when receiving a first configuration data set and a second function when receiving a second configuration data set. The second circuit communicatively couples to the first logic circuit. The second circuit is for supplying configuration data sets to the first logic circuit. The second circuit has a first set of input terminals. The integrated circuit also has a second set of input terminals for carrying data. Several the second set of input terminals overlap several of the first set of input terminals. The IC also has a set of vias, where each via connects an input terminal in the first set with an input terminal in the second set.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: November 11, 2008
    Assignee: Tabula Inc.
    Inventors: Herman Schmit, Steven Teig
  • Publication number: 20080272802
    Abstract: Some embodiments of the invention is a configurable integrated circuit (IC) that includes (1) several configurable logic circuits, (2) a first routing network for connecting the configurable logic circuits, (3) several user design state (UDS) circuits, and (4) a second network communicatively coupled to the UDS circuits. In least one period during the operation of the IC, the second network receives addresses for a several UDS circuits in a random access manner. In some embodiments, the second network is a debug network for reading randomly state values stored by the addressed UDS circuits during the user-design operation of the IC.
    Type: Application
    Filed: March 13, 2006
    Publication date: November 6, 2008
    Inventors: Brad Hutchings, Jason Redgrave, Steven Teig, Herman Schmit
  • Publication number: 20080272801
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. In some embodiments, the configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. In some of these embodiments, the configuration network is a pipelined network.
    Type: Application
    Filed: March 13, 2006
    Publication date: November 6, 2008
    Inventors: Brad Hutchings, Jason Redgrave, Teju Khubchandani, Herman Schmit, Steven Teig
  • Patent number: 7443196
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC) that includes several configurable circuits grouped in several tiles. The configurable IC also includes a configuration network for loading configuration data into the IC, where the configuration data is for configuring several of the configurable circuit. In some embodiments, the configuration network includes several registers at several boundaries between the tiles, where the registers allow multiple configuration data sets to be routed to multiple tiles concurrently. The configuration network in some embodiments includes several address counters at several tiles, where each address counter allows one address to be loaded for a tile and then to be successively incremented based on increment instructions sent over the configuration network. At least, two different addresses specified by an address counter of a particular tile identify two different resources within the particular tile.
    Type: Grant
    Filed: March 13, 2006
    Date of Patent: October 28, 2008
    Assignee: Tabula, Inc.
    Inventors: Jason Redgrave, Teju Khubchandani, Herman Schmit
  • Publication number: 20080258761
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. In some embodiments, the configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. In some of these embodiments, the configuration network is a pipelined network.
    Type: Application
    Filed: April 18, 2008
    Publication date: October 23, 2008
    Inventors: Brad Hutchings, Jason Redgrave, Teju Khubehandani, Herman Schmit, Steven Teig
  • Patent number: 7439766
    Abstract: Some embodiments of the invention provide a configurable logic circuit. The logic circuits has inputs for receiving input data. It also has a first connecting circuit for receiving configuration data and at least a portion of the input data. Based at least partially on the received portion of the input data, the first connecting circuit selects configuration data sub-sets. The logic circuit also includes a second core-logic circuit for receiving configuration data sub-sets from the first connecting circuit and for providing the output data. At least two configuration data sub-sets configure the configurable logic circuit to perform at least two different functions on the input data to produce output data.
    Type: Grant
    Filed: September 25, 2006
    Date of Patent: October 21, 2008
    Assignee: Tabula, Inc.
    Inventors: Herman Schmit, Steven Teig
  • Publication number: 20080231318
    Abstract: Some embodiments provide a configurable IC that includes a configurable routing fabric with storage elements. In some embodiments, the routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric of some embodiments provides the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component continually performs operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the configurable IC.
    Type: Application
    Filed: May 27, 2007
    Publication date: September 25, 2008
    Inventors: Herman Schmit, Randy Renfu Huang
  • Publication number: 20080231314
    Abstract: Some embodiments provide a configurable IC that includes a configurable routing fabric with storage elements. In some embodiments, the routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric of some embodiments provides the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component continually performs operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the configurable IC.
    Type: Application
    Filed: May 27, 2007
    Publication date: September 25, 2008
    Inventors: Steven Teig, Herman Schmit, Jason Redgrave
  • Publication number: 20080224730
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC) that includes several configurable circuits grouped in several tiles. The configurable IC also includes a configuration network for loading configuration data into the IC, where the configuration data is for configuring several of the configurable circuit. In some embodiments, the configuration network includes several registers at several boundaries between the tiles, where the registers allow multiple configuration data sets to be routed to multiple tiles concurrently. The configuration network in some embodiments includes several address counters at several tiles, where each address counter allows one address to be loaded for a tile and then to be successively incremented based on increment instructions sent over the configuration network. At least, two different addresses specified by an address counter of a particular tile identify two different resources within the particular tile.
    Type: Application
    Filed: March 13, 2006
    Publication date: September 18, 2008
    Inventors: Jason Redgrave, Teju Khubchandani, Herman Schmit
  • Publication number: 20080224260
    Abstract: A semiconductor device may be created using multiple metal layers and a layer including programmable vias that may be used to form various patterns of interconnections among segments of metal layers. The programmable vias may be formed of materials whose resistance is changeable between a high-resistance state and a low-resistance state.
    Type: Application
    Filed: March 12, 2008
    Publication date: September 18, 2008
    Applicant: EASIC CORPORATION
    Inventors: Herman Schmit, Ronnie Vasishta, Adam Levinthal, Jonathan Park
  • Patent number: 7425841
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes a logic circuit for receiving input data sets and configuration data sets and performing several functions on the input data sets. Each configuration data set specifies a particular function that the logic circuit has to perform on the input data set. The IC also includes a connection circuit for supplying sets of the configuration data to the logic circuit at a particular rate for at least a particular time period. At least two supplied configuration data sets are different and configure the logic circuit to perform two different functions on the input data.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: September 16, 2008
    Assignee: Tabula Inc.
    Inventors: Herman Schmit, Michael Butts, Brad L. Hutchings, Steven Teig
  • Publication number: 20080222465
    Abstract: Some embodiments provide a configurable integrated circuit (IC) that has several configurable circuits and several user design state (UDS) circuits. The UDS circuits store user-design state values. The configurable IC also includes a debug network communicatively coupled to the UDS circuits. The debug network is for retrieving the user-design state values of several UDS circuits at various stoppages of the operation of the IC without retrieving configuration data that is used to configure the configurable circuits of the IC. The retrieved user-design state values at each stoppage are used as the checkpointed state of the IC while debugging the IC. In some embodiments, the debug network allows the checkpointing of only certain portions of the configurable IC.
    Type: Application
    Filed: March 13, 2006
    Publication date: September 11, 2008
    Inventors: Jason Redgrave, Brad Hutchings, Herman Schmit, Steven Teig, Tom Kronmiller
  • Patent number: 7420389
    Abstract: Some embodiments of the invention provide a reconfigurable IC that has several reconfigurable circuits. Each reconfigurable circuit for configurably performing a set of operations and for reconfiguring at a first frequency. The reconfigurable IC also has at least one reconfiguration signal generator for receiving a clock signal at a second frequency and producing a set of reconfiguration signals with a third frequency. The reconfiguration signals are supplied to the reconfigurable circuits to direct the reconfiguration of the reconfigurable circuits at the first frequency.
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: September 2, 2008
    Assignee: Tabula, Inc.
    Inventors: Herman Schmit, Jason Redgrave
  • Publication number: 20080191735
    Abstract: Some embodiments of the invention provide a configuration/debug network for configuring and debugging a configurable integrated circuit (IC). The configurable IC in some embodiments includes configurable resources (e.g., configurable logic resources, routing resources, memory resources, etc.) that can be grouped in conceptual configurable tiles that are arranged in several rows and columns. Some embodiments allow tiles to be individually addressed, globally addressed (i.e., all addressed together), or addressed based on their tile types. The configurable IC includes numerous user-design state elements (“UDS elements”) in some embodiments. In some embodiments, the configuration/debug network has a streaming mode that can direct various circuits in one or more configurable tiles to stream out their data during the operation of the configurable IC.
    Type: Application
    Filed: March 13, 2006
    Publication date: August 14, 2008
    Inventors: Jason Redgrave, Brad Hutchings, Steven Teig, Herman Schmit, Teju Khubchandani
  • Patent number: 7408382
    Abstract: Some embodiments of the invention provide a first configurable integrated circuit (IC) that has a first configurable IC design. The first configurable IC implements a second IC design that is specified for a second IC that is to operate a particular design rate. The first configurable IC includes several configurable logic circuits. Each configurable logic circuit can configurably perform a set of functions. The IC also includes several configurable interconnect circuits that configurably couple the logic circuits. At least several configurable circuits can reconfigure faster than the particular design rate.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: August 5, 2008
    Assignee: Tabula, Inc.
    Inventors: Herman Schmit, Michael Butts, Brad L. Hutchings, Steven Teig
  • Publication number: 20080180131
    Abstract: Some embodiments provide a configurable IC that includes several configurable logic circuits for configurably performing computations. The configurable IC also includes several configurable routing circuits for configurably routing signals to and from the logic circuits. In some embodiments, at least a set of the routing circuits are routing/storage circuits. Each routing/storage circuit has an output and a storage section at the output for controllably storing a signal that the routing/storage circuit produces at the output.
    Type: Application
    Filed: January 28, 2008
    Publication date: July 31, 2008
    Inventors: Steven Teig, Herman Schmit, Jason Redgrave, Vikas Chandra
  • Publication number: 20080129335
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (“IC”). The IC includes a first set of circuits and a second set of circuits interspersed among the first set of circuits. Each set of circuits includes at least ten volatile configurable circuits. Several circuits in at least one of the sets are user multiplexers. Each particular user multiplexer has input and output terminals and has a set of select terminals for receiving a set of user-design signals that directs the particular multiplexer to connect a set of the input terminals to a set of the output terminals. The user-design signals are signals generated internally by the IC.
    Type: Application
    Filed: November 19, 2007
    Publication date: June 5, 2008
    Inventors: Brad Hutchings, Herman Schmit, Steven Teig
  • Publication number: 20080129337
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (“IC”). This IC includes several configurable circuits for receiving configuration data and configurably performing a set of operations based on the configuration data. It also includes several hybrid circuits. Each particular hybrid circuit can interchangeably perform as either a logic circuit or an interconnect circuit in the configurable IC.
    Type: Application
    Filed: October 31, 2007
    Publication date: June 5, 2008
    Inventors: Jason Redgrave, Brad Hutchings, Herman Schmit, Steven Teig