Patents by Inventor Herman Schmit

Herman Schmit has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Embedding memory between tile arrangement of a configurable IC
    Patent number: 7564261
    Abstract: Some embodiments of the invention provide a configurable IC that includes several configurable computational tiles and several memory tiles. These tiles are arranged in a particular tile arrangement. Each computational tile has a set of configurable logic circuits for configurably performing a plurality of computations and a set of configurable routing circuits. The routing circuits of the tiles configurably route signals between configurable logic circuits. The configurable IC also has several memory arrays for storing data on which the logic circuit perform computation. The memory arrays are embedded in the tile arrangement between two sets of memory tiles, where each set of memory tiles includes a set of routing circuits. In this IC, at least a first memory tile has the same set of configurable routing circuits as at least a second computational tile.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: July 21, 2009
    Assignee: Tabula Inc.
    Inventors: Herman Schmit, Jason Redgrave
  • VPA interconnect circuit
    Patent number: 7564260
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes an interconnect circuit having a first set of input terminals and a set of output terminals. The interconnect circuit has several connection schemes for connecting the first input set to the output set. The IC also has a second set of input terminals for carrying a set of input signals, where at least several of the second set of input terminals overlap at least a plurality of the first set of input terminals. The IC further has a set of vias, where each via connects an input terminal in the first set with an input terminal in the second set. The interconnect circuit receives a control signal and based on this control signal connects the first input terminal set to the output set by using a particular one of the connection schemes.
    Type: Grant
    Filed: September 25, 2006
    Date of Patent: July 21, 2009
    Assignee: Tabula Inc.
    Inventors: Herman Schmit, Steven Teig
  • Non-Sequentially Configurable IC
    Publication number: 20090167354
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes at least fifty configurable circuits arranged in an array having a plurality of rows and a plurality of columns. Each configurable circuit for configurably performing a set of operations. At least a first configurable circuit reconfigures at a first reconfiguration rate. The first configurable circuit performs a different operation each time the first configurable circuit is reconfigured. The reconfiguration of the first configurable circuit does not follow any sequential progression through the set of operations of the first configurable circuit.
    Type: Application
    Filed: December 8, 2006
    Publication date: July 2, 2009
    Inventors: Herman Schmit, Michael Butts, Brad L. Hutchings, Steven Teig
  • Configurable Circuits, IC's and Systems
    Publication number: 20090160481
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC). The configurable IC includes first and second interconnect circuits. The first interconnect circuit has a set of input terminals, a set of output terminals, and several connection schemes for communicatively coupling the input terminal set to the output terminal set. During the operation of the IC, the second connection circuit supplies sets of configuration data to the first interconnect circuit at a particular rate for at least a particular time period. At least two supplied configuration data sets are different and configure the first interconnect circuit to use two different connection schemes that differently couple the input and output terminal sets.
    Type: Application
    Filed: December 28, 2006
    Publication date: June 25, 2009
    Inventors: Herman Schmit, Michael Butts, Brad Hutchings, Steven Teig
  • Random access of user design states in a configurable IC
    Patent number: 7548085
    Abstract: Some embodiments of the invention is a configurable integrated circuit (IC) that includes (1) several configurable logic circuits, (2) a first routing network for connecting the configurable logic circuits, (3) several user design state (UDS) circuits, and (4) a second network communicatively coupled to the UDS circuits. In least one period during the operation of the IC, the second network receives addresses for a several UDS circuits in a random access manner. In some embodiments, the second network is a debug network for reading randomly state values stored by the addressed UDS circuits during the user-design operation of the IC.
    Type: Grant
    Filed: March 13, 2006
    Date of Patent: June 16, 2009
    Assignee: Tabula, Inc.
    Inventors: Brad Hutchings, Jason Redgrave, Steven Teig, Herman Schmit
  • Configurable IC with interconnect circuits that also perform storage operations
    Patent number: 7545167
    Abstract: Some embodiments provide a configurable IC that includes several configurable logic circuits for configurably performing computations. The configurable IC also includes several configurable routing circuits for configurably routing signals to and from the logic circuits. In some embodiments, at least a set of the routing circuits are routing/storage circuits. Each routing/storage circuit has an output and a storage section at the output for controllably storing a signal that the routing/storage circuit produces at the output.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: June 9, 2009
    Assignee: Tabula, Inc.
    Inventors: Steven Teig, Herman Schmit, Jason Redgrave, Vikas Chandra
  • Configurable circuits, IC's, and systems
    Patent number: 7532032
    Abstract: Some embodiments of the invention provide configurable integrated circuit (IC) that has a first interface rate for exchanging signals with a circuit outside of the configurable IC. The configurable IC has an array of configurable circuits. The array includes several configurable logic and interconnect circuits. Each configurable logic circuit can configurably perform a set of functions. The configurable interconnect circuits can configurably couple the logic circuits. At least several of the configurable circuits can be reconfigured faster than the first rate.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: May 12, 2009
    Assignee: Tabula, Inc.
    Inventors: Herman Schmit, Michael Butts, Brad L. Hutchings, Steven Teig
  • Method and apparatus for performing shifting in an integrated circuit
    Patent number: 7528627
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (“IC”). This IC includes several configurable circuits for receiving configuration data and configurably performing a set of operations based on the configuration data. It also includes several hybrid circuits. Each particular hybrid circuit can interchangeably perform as either a logic circuit or an interconnect circuit in the configurable IC.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: May 5, 2009
    Assignee: Tabula, Inc.
    Inventors: Jason Redgrave, Brad Hutchings, Herman Schmit, Steven Teig
  • Method and apparatus for decomposing functions in a configurable IC
    Patent number: 7530033
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (“IC”). The configurable IC includes a set of multiplexers that each has a set of input terminals, a set of output terminals, and a set of select terminals. The set of multiplexers includes a group of multiplexers, where at least one input terminal of each multiplexer in the group is a permanently inverting input terminal. During at least a set of cycles during the operation of the configurable IC, several multiplexers in the group of multiplexers are used to implement a particular function.
    Type: Grant
    Filed: November 7, 2005
    Date of Patent: May 5, 2009
    Assignee: Tabula, Inc.
    Inventors: Andrew Caldwell, Herman Schmit, Steven Teig
  • Single via structured IC device
    Publication number: 20090109765
    Abstract: A configurable logic array may include a multiplicity of logic components, which may contain customizable look-up tables, and layers of fixed metal segments all of which may be customizable using a single custom via layer. The integrated circuit containing the configurable logic array may also include a multiplicity of customizable register files, customizable RAM blocks; a ROM block with customizable contents; or test logic With customizable test options and configurations to separately test logic and the PLLs.
    Type: Application
    Filed: June 21, 2007
    Publication date: April 30, 2009
    Applicant: eASIC Corporation
    Inventors: Shu Ern Perng Mark, Yit Ping Kok, Soon Chieh Lim, Jonathan Park, Herman Schmit
  • Configurable IC having a routing fabric with storage elements
    Patent number: 7525344
    Abstract: Some embodiments provide a configurable IC that includes a configurable routing fabric with storage elements. In some embodiments, the routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric of some embodiments provides the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component continually performs operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the configurable IC.
    Type: Grant
    Filed: May 27, 2007
    Date of Patent: April 28, 2009
    Assignee: Tabula, Inc.
    Inventors: Steven Teig, Herman Schmit, Jason Redgrave
  • Reconfigurable IC that has sections running at different looperness
    Patent number: 7525342
    Abstract: Some embodiments provide a reconfigurable IC that includes at least two sections, each with several configurable circuits. Each configurable circuit configurably performs a set of operations. Each section stores multiple configuration data sets for each configurable circuit. Each configuration data set for a particular configurable circuit specifies the operation that the particular configurable circuit has to perform from the circuit's set of operations, where the configurable circuits of different sections iterate through different numbers of configuration data sets.
    Type: Grant
    Filed: August 18, 2007
    Date of Patent: April 28, 2009
    Assignee: Tabula, Inc.
    Inventors: Steven Teig, Herman Schmit, Jason Redgrave
  • Hybrid configurable circuit for a configurable IC
    Patent number: 7521958
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (“IC”). This IC includes several configurable logic circuits for receiving configuration data and configurably performing a set of operations based on the configuration data. It also includes several hybrid circuits. Each particular hybrid circuit has: (1) a set of inputs, (2) a set of outputs for selectively connecting to the set of inputs, and (3) a set of select lines for receiving select signals that direct the hybrid circuit to connect the input set to the output set in a particular manner. At least one select signal is for controllably receiving configuration data and at least one select line is for controllably receiving signals generated by the configurable logic circuits.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: April 21, 2009
    Assignee: Tabula, Inc.
    Inventors: Brad Hutchings, Herman Schmit, Steven Teig
  • Configurable IC with configuration logic resources that have asymmetric inputs and/or outputs
    Patent number: 7518402
    Abstract: Some embodiments provide a configurable IC that includes several configurable tiles. The configurable tiles include several interior tiles within the interior of an arrangement of configurable tiles. The arrangement has several sides that define the exterior boundary of the arrangement. In some embodiments, each configurable interior tile includes a set of configurable logic circuits, a set of configurable input-select circuits for selecting inputs to the configurable logic circuits, and a set of configurable routing interconnect circuits for routing signals between the configurable logic circuits. The set of configurable input-select circuits in each interior tile has a set of inputs that are supplied by a set of asymmetric locations in the configurable IC.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: April 14, 2009
    Assignee: Tabula, Inc.
    Inventors: Herman Schmit, Steven Teig, Brad Hutchings, Randy Renfu Huang, Jason Redgrave
  • Barrel shifter implemented on a configurable integrated circuit
    Patent number: 7518400
    Abstract: Some embodiments provide a barrel shifter on a configurable integrated circuit (IC). The barrel shifter has a first set of tiles and a second set of tiles with configurable circuits. The barrel shifter also has a first set of non-neighboring offset connections (NNOCs) connecting at least one of the tiles in the first set to at least one of the tiles in the second set.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: April 14, 2009
    Assignee: Tabula, Inc.
    Inventors: Jason Redgrave, Herman Schmit
  • Configurable IC having a routing fabric with storage elements
    Patent number: 7514957
    Abstract: Some embodiments provide a configurable IC that includes a configurable routing fabric with storage elements. In some embodiments, the routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric of some embodiments provides the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component continually performs operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the configurable IC.
    Type: Grant
    Filed: May 27, 2007
    Date of Patent: April 7, 2009
    Assignee: Tabula, Inc
    Inventors: Herman Schmit, Randy Renfu Huang
  • Checkpointing user design states in a configurable IC
    Patent number: 7512850
    Abstract: Some embodiments provide a configurable integrated circuit (IC) that has several configurable circuits and several user design state (UDS) circuits. The UDS circuits store user-design state values. The configurable IC also includes a debug network communicatively coupled to the UDS circuits. The debug network is for retrieving the user-design state values of several UDS circuits at various stoppages of the operation of the IC without retrieving configuration data that is used to configure the configurable circuits of the IC. The retrieved user-design state values at each stoppage are used as the checkpointed state of the IC while debugging the IC. In some embodiments, the debug network allows the checkpointing of only certain portions of the configurable IC.
    Type: Grant
    Filed: March 13, 2006
    Date of Patent: March 31, 2009
    Assignee: Tabula, Inc.
    Inventors: Jason Redgrave, Brad Hutchings, Herman Schmit, Steven Teig, Tom Kronmiller
  • Configurable integrated circuit with parallel non-neighboring offset connections
    Patent number: 7504858
    Abstract: Some aspects of the present invention involve connections in a configurable IC. Some embodiments provide a configurable integrated circuit with a first array of tiles. The first array of tiles has columns and rows of tiles. The IC has a first tile within the first array of tiles. The first tile has a set of outputs. The IC has a second tile in the array of tiles. The second tile has a set of inputs. The IC has a non-neighboring offset connection (NNOC) from an output of the first tile to an input of the second tile. The second tile is offset from the first tile by at least one row and at least two columns or by at least two rows and at least one column.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: March 17, 2009
    Assignee: Tabula, Inc.
    Inventors: Herman Schmit, Steven Teig, Brad Hutchings
  • Configurable Circuits, IC's, and Systems
    Publication number: 20090058461
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes a logic circuit for receiving input data sets and configuration data sets and performing several functions on the input data sets. Each configuration data set specifies a particular function that the logic circuit has to perform on the input data set. The IC also includes a connection circuit for supplying sets of the configuration data to the logic circuit at a particular rate for at least a particular time period. At least two supplied configuration data sets are different and configure the logic circuit to perform two different functions on the input data.
    Type: Application
    Filed: August 28, 2008
    Publication date: March 5, 2009
    Inventors: Herman Schmit, Michael Butts, Brad L. Hutchings, Steven Teig
  • Runtime loading of configuration data in a configurable IC
    Patent number: 7492186
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. In some embodiments, the configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. In some of these embodiments, the configuration network is a pipelined network.
    Type: Grant
    Filed: March 13, 2006
    Date of Patent: February 17, 2009
    Assignee: Tabula, Inc.
    Inventors: Brad Hutchings, Jason Redgrave, Teju Khubchandani, Herman Schmit, Steven Teig