Patents by Inventor Hideaki Kuwabara

Hideaki Kuwabara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ELECTRONIC DEVICE, DISPLAY DEVICE, METHOD FOR MANUFACTURING THE SAME, AND SYSTEM INCLUDING A PLURALITY OF DISPLAY DEVICES
    Publication number: 20170092230
    Abstract: A power saving system using a plurality of flexible display devices placed on various places is provided. A structure of a bendable portion in a display device is improved. Specifically, a wiring partly including a metal nanoparticle is used. Openings are formed in an insulating layer so that the wiring becomes substantially longer by meandering in cross section. When a plurality of openings are formed and aligned, a portion that is easy to bend is formed along the line where they are aligned. A plurality of display panels are used for one display portion. The flexible display portion can be provided on a surface, specifically, a curved surface of furniture such as a chair or a sofa.
    Type: Application
    Filed: September 22, 2016
    Publication date: March 30, 2017
    Inventor: Hideaki KUWABARA
  • Display device
    Patent number: 9608007
    Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: March 28, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroki Ohara, Toshinari Sasaki, Kosei Noda, Hideaki Kuwabara
  • SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    Publication number: 20170084750
    Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.
    Type: Application
    Filed: December 5, 2016
    Publication date: March 23, 2017
    Inventors: Shunpei YAMAZAKI, Miyuki HOSOBA, Junichiro SAKATA, Hideaki KUWABARA
  • SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20170077006
    Abstract: An object is to realize a hermetically sealed package which ensures long-term airtightness inside the package by sealing using a substrate, or a sealing structure for reducing destruction caused by pressure from the outside. A frame of a semiconductor material is provided over a first substrate, which is bonded to a second substrate having a semiconductor element so that the semiconductor element is located inside the frame between the first substrate and the second substrate. The frame may be formed using, as frame members, two L-shaped semiconductor members in combination or four or more stick semiconductor members in combination.
    Type: Application
    Filed: November 4, 2016
    Publication date: March 16, 2017
    Inventor: Hideaki KUWABARA
  • Semiconductor device and manufacturing method thereof
    Patent number: 9576986
    Abstract: It is an object of the present invention to provide a method for preventing a breaking and poor contact, without increasing the number of steps, thereby forming an integrated circuit with high driving performance and reliability. The present invention applies a photo mask or a reticle each of which is provided with a diffraction grating pattern or with an auxiliary pattern formed of a semi-translucent film having a light intensity reducing function to a photolithography step for forming wires in an overlapping portion of wires. And a conductive film to serve as a lower wire of a two-layer structure is formed, and then, a resist pattern is formed so that a first layer of the lower wire and a second layer narrower than the first layer are formed for relieving a steep step.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: February 21, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masayuki Sakakura, Hideto Ohnuma, Hideaki Kuwabara
  • DISPLAY PANEL AND MANUFACTURING METHOD THEREOF
    Publication number: 20170040403
    Abstract: Provided is a novel display panel that is highly convenient or reliable. The display device has two display modes: a reflective display mode and a light-emitting display mode. In the light-emitting display mode, light display is performed by transmitting light from a light-emitting element overlapping with an opening in a pixel electrode of a reflective display element. A switching element of the reflective display element and a switching element electrically connected to the light-emitting element are formed over one substrate. They are each a transistor whose channel formation region is formed in a silicon-containing film, specifically a polysilicon film.
    Type: Application
    Filed: August 1, 2016
    Publication date: February 9, 2017
    Inventor: Hideaki KUWABARA
  • Semiconductor device and method for manufacturing the same
    Patent number: 9559212
    Abstract: An object is to increase field effect mobility of a thin film transistor including an oxide semiconductor. Another object is to stabilize electrical characteristics of the thin film transistor. In a thin film transistor including an oxide semiconductor layer, a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor is formed over the oxide semiconductor layer, whereby field effect mobility of the thin film transistor can be increased. Further, by forming a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor between the oxide semiconductor layer and a protective insulating layer of the thin film transistor, change in composition or deterioration in film quality of the oxide semiconductor layer is prevented, so that electrical characteristics of the thin film transistor can be stabilized.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: January 31, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideaki Kuwabara, Kengo Akimoto, Toshinari Sasaki
  • Method of making a semiconductor lighting emitting device that prevents defect of the mask without increasing steps
    Patent number: 9536932
    Abstract: As a result of miniaturization of a pixel region associated with an improvement in definition and an increase in a substrate size associated with an increase in area, defects due to precision, bending, and the like of a mask used at the time of evaporation have become issues. A partition including portions with different thicknesses over a pixel electrode (also referred to as a first electrode) in a display region and in the vicinity of a pixel electrode layer is formed, without increasing the number of steps, by using a photomask or a reticle provided with an auxiliary pattern having a light intensity reduction function made of a diffraction grating pattern or a semi-transmissive film.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: January 3, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideaki Kuwabara, Hideto Ohnuma
  • Semiconductor device and manufacturing method thereof
    Patent number: 9525034
    Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: December 20, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake, Kei Takahashi, Kouhei Toyotaka, Masashi Tsubuku, Kosei Noda, Hideaki Kuwabara
  • SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    Publication number: 20160358941
    Abstract: [Summary] [Problem] A TFT is manufactured using at least five photomasks in a conventional liquid crystal display device, and therefore the manufacturing cost is high. [Solving Means] By performing the formation of the pixel electrode 127, the source region 123 and the drain region 124 by using three photomasks in three photolithography steps, a liquid crystal display device prepared with a pixel TFT portion, having a reverse stagger type n-channel TFT, and a storage capacitor can be realized.
    Type: Application
    Filed: June 10, 2016
    Publication date: December 8, 2016
    Inventors: Shunpei YAMAZAKI, Hideaki KUWABARA, Yasuyuki ARAI
  • Semiconductor device
    Patent number: 9515192
    Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: December 6, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Miyuki Hosoba, Junichiro Sakata, Hideaki Kuwabara
  • Light Emitting Device and Manufacturing Method of the Same
    Publication number: 20160343793
    Abstract: The present invention is directed to a light emitting device structured so as to increase the amount of light which is taken out in a certain direction after emitted from a light emitting element, and a method of manufacturing this light emitting device. An upper end portion of an insulating material 19 that covers an end portion of a first electrode 18 is formed to have a curved surface having a radius of curvature, a second electrode 23a is formed to have a slant face as going from its center portion toward its end portion along the curved surface. Light emitted from a light emitting layer comprising an organic material 20 that is formed on the second electrode 23a is reflected at the slant face of the second electrode 23a to increase the total amount of light taken out in the direction indicated by the arrow in FIG. 1A.
    Type: Application
    Filed: August 2, 2016
    Publication date: November 24, 2016
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi SEO, Hideaki KUWABARA
  • Semiconductor Device and Method of Manufacturing Same
    Publication number: 20160336529
    Abstract: A FET is formed on a semiconductor substrate, a curved surface having a radius of curvature is formed on an upper end of an insulation, a portion of a first electrode is exposed corresponding to the curved surface to form an inclined surface, and a region defining a luminescent region is subjected to etching to expose the first electrode. Luminescence emitted from an organic chemical compound layer is reflected by the inclined surface of the first electrode to increase a total quantity of luminescence taken out in a certain direction.
    Type: Application
    Filed: June 3, 2016
    Publication date: November 17, 2016
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Seo, Hideaki Kuwabara
  • Vehicle, display device and manufacturing method for a semiconductor device
    Patent number: 9493119
    Abstract: To provide a semiconductor device in which a layer to be peeled is attached to a base having a curved surface, and a method of manufacturing the same, and more particularly, a display having a curved surface, and more specifically a light-emitting device having a light emitting element attached to a base with a curved surface. A layer to be peeled, which contains a light emitting element furnished to a substrate using a laminate of a first material layer which is a metallic layer or nitride layer, and a second material layer which is an oxide layer, is transferred onto a film, and then the film and the layer to be peeled are curved, to thereby produce a display having a curved surface.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: November 15, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yuugo Goto, Hideaki Kuwabara, Shunpei Yamazaki
  • Semiconductor device and method for manufacturing the same
    Patent number: 9490309
    Abstract: An object is to realize a hermetically sealed package which ensures long-term airtightness inside the package by sealing using a substrate, or a sealing structure for reducing destruction caused by pressure from the outside. A frame of a semiconductor material is provided over a first substrate, which is bonded to a second substrate having a semiconductor element so that the semiconductor element is located inside the frame between the first substrate and the second substrate. The frame may be formed using, as frame members, two L-shaped semiconductor members in combination or four or more stick semiconductor members in combination.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: November 8, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hideaki Kuwabara
  • ELECTRONIC DEVICE
    Publication number: 20160313769
    Abstract: A highly convenient electronic device used while being worn on a body is provided. The electronic device is an arm-worn electronic device including a display panel, a power storage device, a circuit, and a sealing structure. The display panel displays an image with power supplied from the power storage device. The circuit includes an antenna and charges the power storage device wirelessly. Inside the sealing structure, the display panel, the power storage device, and the circuit are provided. The sealing structure includes a portion that transmits visible light. The sealing structure can be worn on an arm or is connected to a structure body that can be worn on an arm.
    Type: Application
    Filed: April 11, 2016
    Publication date: October 27, 2016
    Inventors: Yusuke YOSHITANI, Hideaki KUWABARA, Natsuko TAKASE
  • SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20160268359
    Abstract: One object is to provide a semiconductor device with a structure which enables reduction in parasitic capacitance sufficiently between wirings. In a bottom-gate type thin film transistor including a stacked layer of a first layer which is a metal thin film oxidized partly or entirely and an oxide semiconductor layer, the following oxide insulating layers are formed together: an oxide insulating layer serving as a channel protective layer which is over and in contact with a part of the oxide semiconductor layer overlapping with a gate electrode layer; and an oxide insulating layer which covers a peripheral portion and a side surface of the stacked oxide semiconductor layer.
    Type: Application
    Filed: May 23, 2016
    Publication date: September 15, 2016
    Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Hiroki OHARA, Hideaki KUWABARA
  • Light emitting device and manufacturing method of the same
    Patent number: 9412804
    Abstract: The present invention is directed to a light emitting device structured so as to increase the amount of light which is taken out in a certain direction after emitted from a light emitting element, and a method of manufacturing this light emitting device. An upper end portion of an insulating material 19 that covers an end portion of a first electrode 18 is formed to have a curved surface having a radius of curvature, a second electrode 23a is formed to have a slant face as going from its center portion toward its end portion along the curved surface. Light emitted from a light emitting layer comprising an organic material 20 that is formed on the second electrode 23a is reflected at the slant face of the second electrode 23a to increase the total amount of light taken out in the direction indicated by the arrow in FIG. 1A.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: August 9, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Seo, Hideaki Kuwabara
  • Light Emitting Device and Method of Manufacturing the Same
    Publication number: 20160218160
    Abstract: To provide a light emitting device high in reliability with a pixel portion having high definition with a large screen. According to a light emitting device of the present invention, on an insulator (24) provided between pixel electrodes, an auxiliary electrode (21) made of a metal film is formed, whereby a conductive layer (20) made of a transparent conductive film in contact with the auxiliary electrode can be made low in resistance and thin. Also, the auxiliary electrode (21) is used to achieve connection with an electrode on a lower layer, whereby the electrode can be led out with the transparent conductive film formed on an EL layer. Further, a protective film (32) made of a film containing hydrogen and a silicon nitride film which are laminated is formed, whereby high reliability can be achieved.
    Type: Application
    Filed: April 6, 2016
    Publication date: July 28, 2016
    Inventors: Shunpei Yamazaki, Masaaki Hiroki, Masakazu Murakami, Hideaki Kuwabara
  • Light Emitting Device and Method of Manufacturing the Same
    Publication number: 20160190214
    Abstract: A light-emitting device structured so as to increase the amount of light taken out in a certain direction is provided as well as a method of manufacturing this light emitting device. As a result of etching treatment, an upper edge portion of an insulator (19) is curved to have a radius of curvature, a slope is formed along the curved face while partially exposing layers (18c and 18d) of a first electrode, and a layer (18b) of the first electrode is exposed in a region that serves as a light emitting region. Light emitted from an organic compound layer (20) is reflected by the slope of the first electrode (layers 18c and 18d) to increase the total amount of light taken out in the direction indicated by the arrow in FIG. 1A.
    Type: Application
    Filed: March 8, 2016
    Publication date: June 30, 2016
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi SEO, Hideaki Kuwabara