Patents by Inventor Hidefumi Hiura

Hidefumi Hiura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220176329
    Abstract: A microsphere cavity that forms a whispering gallery mode is used. By vibrationally coupling a whispering gallery mode being one of kinds of an optical mode to a vibrational mode of water or a liquid other than water, ultra strong coupling water or a liquid in a vibrational coupling state is generated. A first example is to acquire aerosol in which water itself or a liquid itself other than water constitutes a micro-water sphere cavity or a micro-liquid sphere cavity (50) and is a dispersoid. A second example is to acquire colloid or emulsion in which a micro-dielectric sphere cavity (53) is a dispersoid and water or a liquid other than water is a dispersion medium.
    Type: Application
    Filed: January 6, 2020
    Publication date: June 9, 2022
    Applicant: NEC Corporation
    Inventor: Hidefumi HIURA
  • Publication number: 20200206713
    Abstract: An object according to an example embodiment is an object containing a matter having an OH (OD) group, in which the object exists in a structure in which light having a wavelength that resonates with stretching vibration of the OH (OD) group resonates. This object is achieved by using, for example, a device including a structure in which light having a wavelength that resonates with stretching vibration of the OH (OD) group resonates and an inlet for introducing an object into the structure is used. The object is used as a solvent, for example. Specifically, the object is used in a processing method which includes placing a solvent containing a solute inside a structure in which light having a wavelength that resonates with stretching vibration of a group included in the solvent resonates and reacting the solute.
    Type: Application
    Filed: March 26, 2018
    Publication date: July 2, 2020
    Applicant: NEC CORPORATION
    Inventors: Hidefumi HIURA, Jingwen LU
  • Publication number: 20190217268
    Abstract: Provided are a chemical reaction device able to promote a chemical reaction, and a method for producing same. The chemical reaction device has an optical electric field confinement/chemical reaction container structure obtained by integrating an optical electric field confinement structure for forming an optical mode having a frequency identical to or close to a vibrational mode of a chemical substance involved in a chemical reaction, and a chemical reaction container structure having a space for storing a fluid required for the chemical reaction and containing the chemical reaction, the optical mode and the vibrational mode being vibrationally coupled to promote the chemical reaction.
    Type: Application
    Filed: August 23, 2017
    Publication date: July 18, 2019
    Applicant: NEC Corporation
    Inventor: Hidefumi HIURA
  • Patent number: 8980217
    Abstract: Provided is a graphene substrate, which is manufactured by: bringing a metal layer into contact with a carbon-containing layer and heating the metal layer to dissolve carbon in the carbon-containing layer into the metal layer; and cooling the metal layer to precipitate the carbon in the metal layer as graphene on any substrate surface.
    Type: Grant
    Filed: November 25, 2011
    Date of Patent: March 17, 2015
    Assignee: NEC Corporation
    Inventors: Hidefumi Hiura, Kazuhito Tsukagoshi
  • Patent number: 8835286
    Abstract: The invention provides a manufacturing method of a graphene-on-insulator substrate which is mass productive, of high quality, and yet is directly usable for manufacture of semiconductor devices at a low manufacturing cost. According to the manufacturing method of a graphene substrate of the invention, a metal layer and a carbide layer are heated with the metal layer in contact with the carbide layer so that carbon in the carbide layer is dissolved into the metal layer, and then the metal layer and the carbide layer are cooled so that the carbon in the metal layer is segregated as graphene on the surface of the carbide layer.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: September 16, 2014
    Assignee: NEC Corporation
    Inventors: Hidefumi Hiura, Kazuhito Tsukagoshi
  • Patent number: 8698077
    Abstract: Provided is a versatile method of determining the number of layers of a two-dimensional atomic layer thin film as compared with conventional methods. An electron beam is radiated to a two-dimensional thin film atomic structure having an unknown number of layers to determine the number of layers based on an intensity of reflected electrons or secondary electrons generated thereby. In particular, this method is effective for determining the number of layers of graphene.
    Type: Grant
    Filed: June 22, 2011
    Date of Patent: April 15, 2014
    Assignees: NEC Corporation, National Institute for Materials Science
    Inventors: Hidefumi Hiura, Kazuhito Tsukagoshi, Hisao Miyazaki
  • Publication number: 20130272951
    Abstract: Provided is a graphene substrate, which is manufactured by: bringing a metal layer into contact with a carbon-containing layer and heating the metal layer to dissolve carbon in the carbon-containing layer into the metal layer; and cooling the metal layer to precipitate the carbon in the metal layer as graphene on any substrate surface.
    Type: Application
    Filed: November 25, 2011
    Publication date: October 17, 2013
    Applicant: NEC CORPORATION
    Inventors: Hidefumi Hiura, Kazuhito Tsukagoshi
  • Publication number: 20130214253
    Abstract: The invention provides a manufacturing method of a graphene-on-insulator substrate which is mass productive, of high quality, and yet is directly usable for manufacture of semiconductor devices at a low manufacturing cost. According to the manufacturing method of a graphene substrate of the invention, a metal layer and a carbide layer are heated with the metal layer in contact with the carbide layer so that carbon in the carbide layer is dissolved into the metal layer, and then the metal layer and the carbide layer are cooled so that the carbon in the metal layer is segregated as graphene on the surface of the carbide layer.
    Type: Application
    Filed: November 2, 2011
    Publication date: August 22, 2013
    Applicant: NEC CORPORATION
    Inventors: Hidefumi Hiura, Kazuhito Tsukagoshi
  • Publication number: 20130087705
    Abstract: Provided is a versatile method of determining the number of layers of a two-dimensional atomic layer thin film as compared with conventional methods. An electron beam is radiated to a two-dimensional thin film atomic structure having an unknown number of layers to determine the number of layers based on an intensity of reflected electrons or secondary electrons generated thereby. In particular, this method is effective for determining the number of layers of graphene.
    Type: Application
    Filed: June 22, 2011
    Publication date: April 11, 2013
    Applicants: NATIONAL INSTITUTE FOR MATERIALS SCIENCE, NEC CORPORATION
    Inventors: Hidefumi Hiura, Kazuhito Tsukagoshi, Hisao Miyazaki
  • Publication number: 20120161098
    Abstract: A semiconductor device is provided which is produced from a high-quality and large-area graphene substrate and is capable of fully exhibiting superior electronic properties that graphene inherently has. The semiconductor device is capable of realizing increased operation speed, reduced power consumption, and higher degree of integration, and thus is capable of improving the reliability and productivity. Electrical short circuit between a graphene layer (4) and a metal catalyst layer for growth of graphene is prevented by causing the metal catalyst layer to be absorbed as a compound/alloyed layer 5 at the interface between a substrate (1) and an oxide layer (2).
    Type: Application
    Filed: August 20, 2009
    Publication date: June 28, 2012
    Applicant: NEC CORPORATION
    Inventors: Hidefumi Hiura, Kazuhito Tsukagoshi
  • Patent number: 8168964
    Abstract: A semiconductor graphene is used for a channel layer, and a metal graphene is used for electrode layers for a source, a drain, and a gate which serve as interconnections as well. An oxide is used for a gate insulating layer. The channel layer and the electrode layers are located on the same plane.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: May 1, 2012
    Assignee: NEC Corporation
    Inventors: Hidefumi Hiura, Fumiyuki Nihei, Tetsuya Tada, Toshihiko Kanayama
  • Patent number: 8093580
    Abstract: A semiconductor device has a structure in which a light-emitting layer of an organic material or the like is sandwiched between a work function controlled single-wall carbon nanotube cathode encapsulating a donor having a low ionization potential and a work function controlled single-wall carbon nanotube anode encapsulating an acceptor having a high electron affinity. A semiconductor device represented by an organic field-effect light-emitting element and a method of manufacturing the same are provided. The semiconductor device and the method of manufacturing the same make it possible to improve characteristics and performance, such as reduction in light-emission starting voltage and a high luminous efficiency, to improve reliability, such as an increase in life, and to improve productivity, such as reduction in manufacturing cost.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: January 10, 2012
    Assignee: NEC Corporation
    Inventors: Hidefumi Hiura, Satoru Toguchi, Tetsuya Tada, Toshihiko Kanayama
  • Publication number: 20100102292
    Abstract: A semiconductor graphene is used for a channel layer, and a metal graphene is used for electrode layers for a source, a drain, and a gate which serve as interconnections as well. An oxide is used for a gate insulating layer. The channel layer and the electrode layers are located on the same plane.
    Type: Application
    Filed: February 27, 2008
    Publication date: April 29, 2010
    Applicant: NEC Corporation
    Inventors: Hidefumi Hiura, Fumiyuki Nihei, Tetsuya Tada, Toshihiko Kanayama
  • Patent number: 7687801
    Abstract: It is to provide a thermodynamically and chemically stable dopant material which can achieve controls of the pn conduction types, carrier density, and threshold value of gate voltage, and a manufacturing method thereof. Further, it is to provide an actually operable semiconductor device such as a transistor with an excellent high-speed operability and high-integration characteristic. Provided is a dopant material obtained by depositing, on a carbon nanotube, a donor with a smaller ionization potential than an intrinsic work function of the carbon nanotube or an acceptor with a larger electron affinity than the intrinsic work function of the carbon nanotube. The ionization potential of the donor in vacuum is desired to be 6.4 eV or less, and the electron affinity of the acceptor in vacuum to be 2.3 eV or more.
    Type: Grant
    Filed: January 5, 2006
    Date of Patent: March 30, 2010
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Hidefumi Hiura, Tetsuya Tada, Toshihiko Kanayama
  • Publication number: 20100051902
    Abstract: A semiconductor device has a structure in which a light-emitting layer of an organic material or the like is sandwiched between a work function controlled single-wall carbon nanotube cathode encapsulating a donor having a low ionization potential and a work function controlled single-wall carbon nanotube anode encapsulating an acceptor having a high electron affinity. A semiconductor device represented by an organic field-effect light-emitting element and a method of manufacturing the same are provided. The semiconductor device and the method of manufacturing the same make it possible to improve characteristics and performance, such as reduction in light-emission starting voltage and a high luminous efficiency, to improve reliability, such as an increase in life, and to improve productivity, such as reduction in manufacturing cost.
    Type: Application
    Filed: October 24, 2007
    Publication date: March 4, 2010
    Inventors: Hidefumi Hiura, Satoru Toguchi, Tetsuya Tada, Toshihiko Kanayama
  • Publication number: 20100012923
    Abstract: It is to provide a thermodynamically and chemically stable dopant material which can achieve controls of the pn conduction types, carrier density, and threshold value of gate voltage, and a manufacturing method thereof. Further, it is to provide an actually operable semiconductor device such as a transistor with an excellent high-speed operability and high-integration characteristic. Provided is a dopant material obtained by depositing, on a carbon nanotube, a donor with a smaller ionization potential than an intrinsic work function of the carbon nanotube or an acceptor with a larger electron affinity than the intrinsic work function of the carbon nanotube. The ionization potential of the donor in vacuum is desired to be 6.4 eV or less, and the electron affinity of the acceptor in vacuum to be 2.3 eV or more.
    Type: Application
    Filed: January 5, 2006
    Publication date: January 21, 2010
    Inventors: Hidefumi Hiura, Tetsuya Tada, Toshihiko Kanayama
  • Patent number: 7247548
    Abstract: The present invention achieves a shallow junction of a source and a drain, and provides a doping method which makes device properties reproducible and a semiconductor device fabricated using the method. In the present invention, doping for the semiconductor is conducted by attaching a molecular species with a higher electron affinity or lower ionization energy out of fullerene derivatives or metallocenes to the semiconductor surface to induce charge transfer from the molecule to the semiconductor.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: July 24, 2007
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Tetsuya Tada, Toshihiko Kanayama, Hidefumi Hiura
  • Publication number: 20070161213
    Abstract: A self-aligned/self-limited processing is carried out on a nanowire material typified by a carbon nanotube or on the vicinity of the nanowire material alone in the following manner. External energy is applied to the nanowire material. Joule heat, light, or a thermoelectron is thereby locally formed and acts as minute energy. The minute energy causes a chemical reaction of an externally added raw material and causes the conversion of a property of the nanowire material.
    Type: Application
    Filed: October 30, 2006
    Publication date: July 12, 2007
    Inventors: Hidefumi Hiura, Tetsuya Tada, Toshihiko Kanayama
  • Patent number: 7138688
    Abstract: A doping method includes the step of attaching molecules or clusters to the surface of a semiconductor substrate to enable charge transfer from the molecules or clusters to the substrate surface, thereby inducing carriers underneath the substrate surface. A semiconductor device is fabricated through attachment of molecules or clusters to the surface of a semiconductor substrate. The attachment enables charge transfer from the molecules or clusters to the substrate surface to induce carriers underneath the substrate surface.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: November 21, 2006
    Assignees: National Institute of Advanced Industrial Science and Technology, NEC Corporation
    Inventors: Toshihiko Kanayama, Takehide Miyazaki, Hidefumi Hiura
  • Publication number: 20050130395
    Abstract: The present invention achieves a shallow junction of a source and a drain, and provides a doping method which makes device properties reproducible and a semiconductor device fabricated using the method. In the present invention, doping for the semiconductor is conducted by attaching a molecular species with a higher electron affinity or lower ionization energy out of fullerene derivatives or metallocenes to the semiconductor surface to induce charge transfer from the molecule to the semiconductor.
    Type: Application
    Filed: December 6, 2004
    Publication date: June 16, 2005
    Inventors: Tetsuya Tada, Toshihiko Kanayama, Hidefumi Hiura