Abstract: An image compression circuit includes: a transform section configured to transform a plurality of pieces of pixel data into a plurality of pieces of coefficient data; and a quantization section configured to obtain a quantization parameter based on a predetermined number of pieces of the coefficient data, and to quantize the predetermined number of pieces of the coefficient data with use of the quantization parameter.

Abstract: The present invention relates to a communication system, a transmitter, a receiver, a communication method, a program, and a communication cable for providing high-speed bidirectional communication while maintaining compatibility. When an HDMI® source performs bidirectional IP communication with an HDMI® sink using a CEC line and a signal line, a switching control unit controls a switch so that, when data is transmitted, the switch selects a constituent signal forming a differential signal output from a converting unit and, when data is transmitted, the switch selects a constituent signal forming a differential signal output from a receiver. When bidirectional communication is performed using only the CEC line, the switching control unit controls the switch so that the CEC signal output from the HDMI® source or the receiver is selected. The present invention is applicable to, for example, HDMI®.

Abstract: The present invention relates to a communication system, a transmitter, a receiver, a communication method, a program, and a communication cable for providing high-speed bidirectional communication while maintaining compatibility. When an HDMI® source performs bidirectional IP communication with an HDMI® sink using a CEC line and a signal line, a switching control unit controls a switch so that, when data is transmitted, the switch selects a constituent signal forming a differential signal output from a converting unit and, when data is transmitted, the switch selects a constituent signal forming a differential signal output from a receiver. When bidirectional communication is performed using only the CEC line, the switching control unit controls the switch so that the CEC signal output from the HDMI® source or the receiver is selected. The present invention is applicable to, for example, HDMI®.

Abstract: A communication method for performing transmission of video data and audio data, communication of device control data, and local area network communication by using a single cable may include connecting a connectable device to a pair of differential transmission lines; performing the local area network communication through bidirectional communication via the pair of differential transmission lines; and notifying a connection state of an interface with the connectable device by using a DC bias potential of at least one of the differential transmission lines of the pair. The connection state may include a first notification from a first one of the pair of differential transmission lines whether the connectable device is connected to the single cable.

Abstract: Electronic equipment and methods for permitting quick control of the operating state of a source equipment side from sink equipment. A television receiver (sink equipment) 100 and an amplifier (repeater equipment) 200 are interconnected over an HDMI cable 610, and the amplifier 200 and a DVD recorder (source equipment) 300 are interconnected over an HDMI cable 620. Each of the pieces of equipment includes, in addition to an HDMI receiving unit and an HDMI transmitting unit, a high-speed data line I/F included in a bidirectional communication unit that uses predetermined lines of the HDMI cable. The bidirectional communication unit is used to transmit channel selection information, a remote control code instructing recording, “theater mode” designating information, a remote control code, or the like from the television receiver 100 to the audio amplifier 200 or DVD recorder 300.

Abstract: A semiconductor device includes first and second wells formed side by side as impurity diffusion regions of a first conductive type in a semiconductor substrate, below an intermediate dielectric film that covers a major surface of the substrate. A conductive layer formed above the intermediate dielectric film is held at a potential. A first resistive layer is formed on the intermediate dielectric film and is electrically connected to the first well. A second resistive layer is formed on the intermediate dielectric film and is electrically connected to the second well. The first resistive layer and first well form a first resistance element. The second resistive layer and second well form a second resistance element.

Abstract: A video signal and an audio signal are TMDS transmitted from a source device to a sink device. Through a reserved line and a HPD line provided separately from a TMDS transmission line, an Ethernet™ signal is bidirectionally transmitted, and also, a SPDIF signal is transmitted from the sink device to the source device. The Ethernet™ signal bidirectionally transmitted between Ethernet™ transmitter/receiver circuits is differentially transmitted by an amplifier and is received by the amplifier. The SPDIF signal from a SPDIF transmitter circuit is common-mode transmitted from an adder and is received by the adder to be supplied to the SPDIF receiver circuit.

Abstract: An output circuit for a bus whose output node is connected to a bus, including a first current source connected to a first reference potential, a first semiconductor switching element connected between the first current source and the output node, a current control circuit for controlling the first semiconductor switching element such that the first current source and the output node are connected when a voltage of the output node is lower than a reference voltage, and the first current source and the output node are disconnected when a voltage of the output node is higher than the reference voltage, and a voltage generating circuit which is connected between the output node and a second reference potential, and includes a second semiconductor switching element turned on/off based on an output control signal.

Abstract: A video signal and an audio signal are TMDS transmitted from a source device to a sink device. Through a reserved line and a HPD line provided separately from a TMDS transmission line, an Ethernet™ signal is bidirectionally transmitted, and also, a SPDIF signal is transmitted from the sink device to the source device. The Ethernet™ signal bidirectionally transmitted between Ethernet™ transmitter/receiver circuits is differentially transmitted by an amplifier and is received by the amplifier. The SPDIF signal from a SPDIF transmitter circuit is common-mode transmitted from an adder and is received by the adder to be supplied to the SPDIF receiver circuit.

Abstract: Methods and systems for allowing a contents list of a video camera recorder to be smoothly displayed on a television receiver and improve the performance of a selecting operation on video content by a user. A video camera recorder (source device) 10A and a television receiver (sink device) 30A are connected through an HDMI cable 1. The video camera recorder 10A is provided with an HDMI transmission unit (HDMI TX) 28 and a high-speed data line I/F 28A. The television receiver 30A is provided with an HDMI reception unit (HDMI RX) 32 and a high-speed data line I/F 32A. In response to a transmission request from the television receiver 30A side, the video camera recorder 10A transmits, at high speed, additional information (contents list and thumbnail data) to the television receiver 30A by using a high-speed data line constituted by specific lines of the HDMI cable 1.

Abstract: [Object] To promptly decode and reproduce content of any encoding formats. [Solving Means] If a TV (1) judges that it cannot decode content to be viewed by a user, the TV (1) asks another apparatus such as a game apparatus (3) or PC (4) whether it can decode the content via a high-speed data line (150) capable of performing bidirectional IP communication in expanded HDMI and transmits the content and decoding request command thereof to an apparatus which has answered that it can perform decoding, via the high-speed data line (150). The game apparatus (3) or the PC (4) which has received the decoding request decodes the content and transmits the decoded content as a baseline signal to the TV (1) via TMDS channels in expanded HDMI so that the content is reproduced.

Abstract: There is an image data processing circuit including a memory storing input image data, the input image data being limited to a specific number of colors or to a specific image range, and a correction processing part replacing, when a predetermined tone change is present between a pixel in image data previous by one frame whose data is stored by the memory and a pixel in image data in a current frame whose data is input, a relevant pixel in the current frame with a color of a specific tone. The memory is built in an integrated circuit included in the correction processing part.

Abstract: The light emitting device control circuit device 100 in accordance with the disclosure includes a power source V1, a transistor TR1, a light emitting unit EU1, switches S1 to S17, constant current sources CC1 to CC17, and a controller 110. A switching voltage Vs1 is supplied from the controller 110 to turn ON or turn OFF the transistor TR intermittently, a pulse voltage is supplied to a pulse voltage supplying line Y1 connected to a drain terminal D of the transistor TR1. The driving signals SP1 to SP17 are sequentially supplied to the switches S1 to S17 to turn ON or turn OFF them (i.e., time division drive). The light emitting devices A1 to A17 are driven sequentially by a pulse current (i.e., time division drive) when a high voltage is supplied to the pulse voltage supplying line Y1 and when the driving signals SP1 to SP17 are turned ON.

Abstract: Electronic equipment and methods for permitting quick control of the operating state of a source equipment side from sink equipment. A television receiver (sink equipment) 100 and an amplifier (repeater equipment) 200 are interconnected over an HDMI cable 610, and the amplifier 200 and a DVD recorder (source equipment) 300 are interconnected over an HDMI cable 620. Each of the pieces of equipment includes, in addition to an HDMI receiving unit and an HDMI transmitting unit, a high-speed data line I/F included in a bidirectional communication unit that uses predetermined lines of the HDMI cable. The bidirectional communication unit is used to transmit channel selection information, a remote control code instructing recording, “theater mode” designating information, a remote control code, or the like from the television receiver 100 to the audio amplifier 200 or DVD recorder 300.

Abstract: A video signal and an audio signal are TMDS transmitted from a source device to a sink device. Through a reserved line and a HPD line provided separately from a TMDS transmission line, an Ethernet™ signal is bidirectionally transmitted, and also, a SPDIF signal is transmitted from the sink device to the source device. The Ethernet™ signal bidirectionally transmitted between Ethernet™ transmitter/receiver circuits is differentially transmitted by an amplifier and is received by the amplifier. The SPDIF signal from a SPDIF transmitter circuit is common-mode transmitted from an adder and is received by the adder to be supplied to the SPDIF receiver circuit.

Abstract: A semiconductor device includes first and second wells formed side by side as impurity diffusion regions of a first conductive type in a semiconductor substrate, below an intermediate dielectric film that covers a major surface of the substrate. A conductive layer formed above the intermediate dielectric film is held at a potential. A first resistive layer is formed on the intermediate dielectric film and is electrically connected to the first well. A second resistive layer is formed on the intermediate dielectric film and is electrically connected to the second well. The first resistive layer and first well form a first resistance element. The second resistive layer and second well form a second resistance element.

Abstract: Electronic equipment and methods for permitting quick control of the operating state of a source equipment side from sink equipment. A television receiver (sink equipment) 100 and an amplifier (repeater equipment) 200 are interconnected over an HDMI cable 610, and the amplifier 200 and a DVD recorder (source equipment) 300 are interconnected over an HDMI cable 620. Each of the pieces of equipment includes, in addition to an HDMI receiving unit and an HDMI transmitting unit, a high-speed data line I/F included in a bidirectional communication unit that uses predetermined lines of the HDMI cable. The bidirectional communication unit is used to transmit channel selection information, a remote control code instructing recording, “theater mode” designating information, a remote control code, or the like from the television receiver 100 to the audio amplifier 200 or DVD recorder 300.

Abstract: The light emitting device control circuit device 100 in accordance with the disclosure includes a power source V1, a transistor TR1, a light emitting unit EU1, switches S1 to S17, constant current sources CC1 to CC17, and a controller 110. A switching voltage Vs1 is supplied from the controller 110 to turn ON or turn OFF the transistor TR intermittently, a pulse voltage is supplied to a pulse voltage supplying line Y1 connected to a drain terminal D of the transistor TR1. The driving signals SP1 to SP17 are sequentially supplied to the switches S1 to S17 to turn ON or turn OFF them (i.e., time division drive). The light emitting devices A1 to A17 are driven sequentially by a pulse current (i.e., time division drive) when a high voltage is supplied to the pulse voltage supplying line Y1 and when the driving signals SP1 to SP17 are turned ON.

Abstract: Disclosed herein is a driver amplifier circuit, including: a first current source transistor of a first conductivity type, and a second current source transistor of the first conductivity type, control voltages being supplied to gates of the first current source transistor and the second current source transistor, respectively; a first switching transistor of the first conductivity type, and a second switching transistor of the first conductivity type; a third switching transistor of a second conductivity type, and a fourth switching transistor of the second conductivity type; first, second, third, and fourth resistor elements; and a first output node and a second output node.

Abstract: Disclosed herein is a CDR circuit including delay elements, including: a divider having a delay element and configured to extract a clock by using, as a trigger, a data input with a signal transition regularly inserted; and a latch configured to latch an input data signal in synchronization with the clock extracted by the divider.