Patents by Inventor Hideki Hara
Hideki Hara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240102908Abstract: This optical cell for sedimentation analysis has a pair of opposing surfaces through which light is transmitted, and two polarizing plates, in which each of the two polarizing plates is disposed in a crossed Nicols state on each of the inner surfaces of the pair of opposing surfaces.Type: ApplicationFiled: December 15, 2021Publication date: March 28, 2024Applicant: RESONAC CORPORATIONInventors: Yasunao MIYAMURA, Ayako NISHIOKA, Yasushi KADOWAKI, Kuniaki YAMATAKE, Masanao HARA, Shigeru YAMAKI, Hideki OHATA
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Publication number: 20240081151Abstract: An electromechanical conversion element includes: a first electrode, an electromechanical conversion layer, and a second electrode provided on a substrate; a first high-temperature durable layer that contains a metal oxide between the first electrode and the electromechanical conversion layer; and a second high temperature durable layer that containing a metal oxide between the electromechanical conversion layer and the second electrode. The electromechanical conversion layer contains a perovskite-type crystal. Upon diffraction peak intensities of a (001) plane, a (101) plane, and a (111) plane in X-ray diffraction measurement of the electromechanical conversion layer being I(001), I(101), and I(111), respectively, a degree of orientation of the (001) plane represented by {I(001))/(I(001)+I(101)+I(111)}×100% is 99.0% or more.Type: ApplicationFiled: February 5, 2021Publication date: March 7, 2024Inventors: Hideki MASHIMA, Shintaro HARA
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Patent number: 11221711Abstract: An input control device includes a touch information acquiring unit for acquiring touch information from a touch panel, a touch angle calculating unit for calculating an angle of a touched area on the basis of the touch information acquired by the touch information acquiring unit, an operating direction estimating unit for estimating the direction of an operator who has touched the touch panel, on the basis of both the angle of the touched area, the angle being calculated by the touch angle calculating unit, and an angle threshold, a detection information acquiring unit for acquiring detection information from a sensor for detecting a part of the operator's body, a relative position estimating unit for estimating a relative position of the part of the operator's body with respect to the touch panel on the basis of the detection information acquired by the detection information acquiring unit, and a threshold correcting unit for correcting the angle threshold on the basis of the relative position of the part oType: GrantFiled: May 14, 2018Date of Patent: January 11, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventor: Hideki Hara
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Publication number: 20210124455Abstract: An input control device includes a touch information acquiring unit for acquiring touch information from a touch panel, a touch angle calculating unit for calculating an angle of a touched area on the basis of the touch information acquired by the touch information acquiring unit, an operating direction estimating unit for estimating the direction of an operator who has touched the touch panel, on the basis of both the angle of the touched area, the angle being calculated by the touch angle calculating unit, and an angle threshold, a detection information acquiring unit for acquiring detection information from a sensor for detecting a part of the operator's body, a relative position estimating unit for estimating a relative position of the part of the operator's body with respect to the touch panel on the basis of the detection information acquired by the detection information acquiring unit, and a threshold correcting unit for correcting the angle threshold on the basis of the relative position of the part oType: ApplicationFiled: May 14, 2018Publication date: April 29, 2021Applicant: Mitsubishi Electric CorporationInventor: Hideki HARA
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Patent number: 10937177Abstract: A determination device generates, based on a first captured image captured by a first image capturing device mounted on a moving object, a shape of a subject (one of subjects) included in the first captured image. The determination device estimates the location of the shape of the subject after specific time based on the location of the shape of the subject and a moving speed. The determination device extracts the shape of the subject from a second captured image captured by a second image capturing device mounted on the moving object; compares the location of the shape of the subject extracted from the second captured image with the location of the shape of the subject estimated from the first captured image; and performs determination related to a moving state of the subject.Type: GrantFiled: January 24, 2019Date of Patent: March 2, 2021Assignee: FUJITSU LIMITEDInventors: Masahiro Kataoka, Hideki Hara, Keisuke Saito
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Publication number: 20190236792Abstract: A determination device generates, based on a first captured image captured by a first image capturing device mounted on a moving object, a shape of a subject (one of subjects) included in the first captured image. The determination device estimates the location of the shape of the subject after specific time based on the location of the shape of the subject and a moving speed. The determination device extracts the shape of the subject from a second captured image captured by a second image capturing device mounted on the moving object; compares the location of the shape of the subject extracted from the second captured image with the location of the shape of the subject estimated from the first captured image; and performs determination related to a moving state of the subject.Type: ApplicationFiled: January 24, 2019Publication date: August 1, 2019Applicant: FUJITSU LIMITEDInventors: Masahiro Kataoka, HIDEKI HARA, Keisuke Saito
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Patent number: 9627393Abstract: A NAND flash memory has word lines in a memory array area and contact pads and lead lines in a word line hookup area, each of the word lines connected to a corresponding contact pad by a lead line. The word lines in the memory array area have a first height and low-profile areas of lead lines in the word line hookup area have a second height that is less than the first height.Type: GrantFiled: June 30, 2015Date of Patent: April 18, 2017Assignee: SANDISK TECHNOLOGIES LLCInventor: Hideki Hara
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Patent number: 9584131Abstract: A programmable device is disclosed which includes: a circuit data setting section configured to set a logical configuration in a processing circuit using first setting information retrieved from a memory; and a communication status monitoring section configured to determine whether communication is established between the processing circuit and a host computer using the setting made by the circuit data setting section. If it is determined that the communication is not established, the circuit data setting section retrieves from the memory second setting information different from the first setting information to again set a logical configuration in the processing circuit on the basis of the second setting information.Type: GrantFiled: April 15, 2016Date of Patent: February 28, 2017Assignees: Sony Corporation, Sony Interactive Entertainment Inc.Inventors: Takahisa Kojima, Masashi Endo, Takashi Akai, Hideki Hara
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Publication number: 20170019462Abstract: A plurality of servers are provided by executing server software on a specific computer or other computers in a system. These servers, including first and second servers, have subordinate relationships for propagating load values from one server to another server in the system. The second server is subordinate to the first server. The first server receives a load value from the second server, the received load value representing a load on a group of servers including the second server and its subordinate servers. The first server then determines whether to enhance the system, based on a load value of the first server itself and the load value received from the second server.Type: ApplicationFiled: September 27, 2016Publication date: January 19, 2017Applicant: FUJITSU LIMITEDInventor: Hideki HARA
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Publication number: 20170005105Abstract: A NAND flash memory has word lines in a memory array area and contact pads and lead lines in a word line hookup area, each of the word lines connected to a corresponding contact pad by a lead line. The word lines in the memory array area have a first height and low-profile areas of lead lines in the word line hookup area have a second height that is less than the first height.Type: ApplicationFiled: June 30, 2015Publication date: January 5, 2017Inventor: Hideki Hara
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Publication number: 20160322973Abstract: A programmable device is disclosed which includes: a circuit data setting section configured to set a logical configuration in a processing circuit using first setting information retrieved from a memory; and a communication status monitoring section configured to determine whether communication is established between the processing circuit and a host computer using the setting made by the circuit data setting section. If it is determined that the communication is not established, the circuit data setting section retrieves from the memory second setting information different from the first setting information to again set a logical configuration in the processing circuit on the basis of the second setting information.Type: ApplicationFiled: April 15, 2016Publication date: November 3, 2016Applicant: Sony Interactive Entertainment Inc.Inventors: Takahisa Kojima, Masashi Endo, Takashi Akai, Hideki Hara
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Publication number: 20160171773Abstract: A method performed by an information processing apparatus includes obtaining a captured image captured by an imaging device, extracting one or more reference objects included in the captured image according to a predetermined rule, and displaying one or more associated images associated with the extracted one or more reference objects on a display.Type: ApplicationFiled: November 23, 2015Publication date: June 16, 2016Applicant: FUJITSU LIMITEDInventor: HIDEKI HARA
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Patent number: 9231374Abstract: Provided is a multi-beam semiconductor laser device in which deterioration of element characteristics is suppressed even when a beam pitch is reduced. The multi-beam semiconductor laser device includes: a first semiconductor multilayer in which a plurality of semiconductor layers are laminated; a plurality of light emitting ridge portions that are formed on the first semiconductor multilayer; a support electrode portion formed in a region between a pair of neighboring light emitting ridge portions; and a front ridge portion formed on the front side of the support electrode portion. The support electrode portion is electrically connected to one of the pair of neighboring light emitting ridge portions. The support electrode portion is higher than the one light emitting ridge portion. An end of the front ridge portion on the front end surface side is higher than the one light emitting ridge portion at the front end surface.Type: GrantFiled: August 22, 2014Date of Patent: January 5, 2016Assignee: USHIO OPTO SEMICONDUCTORS, INC.Inventors: Yutaka Inoue, Hideki Hara, Shuichi Usuda
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Publication number: 20150055670Abstract: Provided is a multi-beam semiconductor laser device in which deterioration of element characteristics is suppressed even when a beam pitch is reduced. The multi-beam semiconductor laser device includes: a first semiconductor multilayer in which a plurality of semiconductor layers are laminated; a plurality of light emitting ridge portions that are formed on the first semiconductor multilayer; a support electrode portion formed in a region between a pair of neighboring light emitting ridge portions; and a front ridge portion formed on the front side of the support electrode portion. The support electrode portion is electrically connected to one of the pair of neighboring light emitting ridge portions. The support electrode portion is higher than the one light emitting ridge portion. An end of the front ridge portion on the front end surface side is higher than the one light emitting ridge portion at the front end surface.Type: ApplicationFiled: August 22, 2014Publication date: February 26, 2015Inventors: Yutaka INOUE, Hideki HARA, Shuichi USUDA
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Patent number: 8815675Abstract: A nonvolatile semiconductor memory comprises a first memory cell transistor, a second memory cell transistor, a connection layer, protrusion portions and a contact portion. The first memory cell transistor comprises a first gate electrode formed above a first channel region, and a second gate electrode formed on a side of the first gate electrode through an insulating film. The second memory cell transistor comprises a third gate electrode formed above a second channel region, and a fourth gate electrode formed on a side of the third gate electrode through an insulating film and facing the second gate electrode. The connection layer connects the second gate electrode and the fourth gate electrode. The protrusion portions are formed of a material different than that of the second and fourth gate electrodes, and are formed on both ends of the connection layer. The contact portion is formed on the connection layer.Type: GrantFiled: December 13, 2011Date of Patent: August 26, 2014Assignee: Renesas Electronics CorporationInventors: Hideki Sugiyama, Hideki Hara
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Patent number: 8691108Abstract: A refrigeration apparatus (20) includes a refrigerant circuit (10) in which refrigerant is circulated by a compressor (30) to perform a refrigeration cycle. The compressor (30) includes a fluid machine (82) for compressing refrigerant; and an electric motor (85) for driving the fluid machine (82). Refrigerant oil having volume resistivity of equal to or greater than 1010 ?·m at 20° C. is used for the compressor (30).Type: GrantFiled: March 18, 2009Date of Patent: April 8, 2014Assignee: Daikin Industries, Ltd.Inventors: Hideki Matsuura, Masaru Tanaka, Hideki Hara
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Patent number: 8598719Abstract: A semiconductor element mounting board includes: a board having surfaces; a semiconductor element provided at a side of one of the surfaces of the board; a bonding agent layer through which the board and the semiconductor element are bonded together, the bonding agent layer having a storage modulus at 25° C. of 5 to 1,000 MPa; a first layer into which the semiconductor element is embedded, the first layer provided on the one surface of the board; a second layer provided on the other surface of the board, the second layer being constituted from the same material as that of the first layer, the constituent material of the second layer having the same composition ratio as that of the constituent material of the first layer; and surface layers provided on the first and second layers, respectively, each of the surface layers being formed from at least a single layer.Type: GrantFiled: June 3, 2009Date of Patent: December 3, 2013Assignee: Sumitomo Bakelite Company LimitedInventors: Mitsuo Sugino, Hideki Hara, Toru Meura
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Patent number: 8494019Abstract: Within a semiconductor laser device, mounting a semiconductor laser element array of multi-beam structure on a sub-mount, the semiconductor laser element array of multi-beam structure comprises one piece of a semiconductor substrate 11; a common electrode 1, which is formed on a first surface of the semiconductor substrate; a semiconductor layer 2, which is formed on the other surface of the semiconductor substrate, and has a plural number of light emitting portions 7 within an inside thereof; a plural number of anode electrodes 3 of a second conductivity type, which are formed above the plural number of light emitting portions, respectively; and a supporting portion 25, which is provided outside a region of forming the light emitting portions, wherein on one surface of the sub-mount is connected an electrode 3 of the semiconductor laser element array through a solder 4, and that solder 4 is formed to cover a supporting portion and an electrode neighboring thereto, and further on the electrode 3 is formed a gType: GrantFiled: March 31, 2010Date of Patent: July 23, 2013Assignee: Oclaro Japan, Inc.Inventors: Yoshihiko Iga, Hiroshi Moriya, Yutaka Inoue, Hideki Hara, Keiichi Miyauchi
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Patent number: 8269332Abstract: A semiconductor element mounting board includes: aboard having surfaces; a semiconductor element mounted on one of the surfaces of the board; a first layer into which the semiconductor element is embedded, the first layer being provided on the one surface of the board; a second layer provided on the other surface of the board, the second layer being constituted from the same material as that of the first layer, the constituent material of the second layer having the same composition ratio as that of the constituent material of the first layer; and surface layers provided on the first and second layers, respectively, each of the surface layers being formed from at least a single layer. In such a semiconductor element mounting board, each of the surface layers has rigidity higher than that of each of the first and second layers. It is preferred that in the case where a Young's modulus of each surface layer at 25° C. is defined as X GPa and a Young's modulus of the first layer at 25° C.Type: GrantFiled: October 15, 2008Date of Patent: September 18, 2012Assignee: Sumitomo Bakelite Company, Ltd.Inventors: Mitsuo Sugino, Hideki Hara, Toru Meura
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Publication number: 20120083112Abstract: A nonvolatile semiconductor memory comprises a first memory cell transistor, a second memory cell transistor, a connection layer, protrusion portions and a contact portion. The first memory cell transistor comprises a first gate electrode formed above a first channel region, and a second gate electrode formed on a side of the first gate electrode through an insulating film. The second memory cell transistor comprises a third gate electrode formed above a second channel region, and a fourth gate electrode formed on a side of the third gate electrode through an insulating film and facing the second gate electrode. The connection layer connects the second gate electrode and the fourth gate electrode. The protrusion portions are formed of a material different than that of the second and fourth gate electrodes, and are formed on both ends of the connection layer. The contact portion is formed on the connection layer.Type: ApplicationFiled: December 13, 2011Publication date: April 5, 2012Inventors: Hideki SUGIYAMA, Hideki Hara