Patents by Inventor Hideki Ishida

Hideki Ishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130321060
    Abstract: A drain or a source of a transistor which receives an input signal at a gate is connected to a back gate of the transistor. A voltage changing circuit portion changes voltage applied to the drain or the source in accordance with a change in potential level of the input signal so that a potential difference between the gate and the drain or the source is lower than or equal to breakdown voltage of the transistor.
    Type: Application
    Filed: May 29, 2013
    Publication date: December 5, 2013
    Inventors: Junko NAKAMOTO, Hideki ISHIDA
  • Publication number: 20120243146
    Abstract: [Problem to be Solved] A problem to be solved is to provide an electrolytic capacitor capable of causing DC current of a large current amount to flow between anode terminals as a pair, and capable of guiding high-frequency noise from an anode to a cathode. [Means for Solving Problem] An electrolytic capacitor of the present invention includes an electrolytic capacitor element 1, anode terminals as a pair composed of flange portions 61 and 62 as a pair of a metal case 6, and a conductive member composed of a cylindrical part 60 of the metal case 6. The capacitor element 1 has an anode body 2 formed by placing an anode foil and a cathode foil one above the other and by winding the anode and cathode foils, anode leads 31 and 32 as a pair electrically connected to the anode foil, and a cathode lead 4 electrically connected to the cathode foil. A dielectric layer is formed on a surface of the anode foil. A solid electrolyte layer is placed between the dielectric layer and the cathode foil.
    Type: Application
    Filed: September 27, 2010
    Publication date: September 27, 2012
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventor: Hideki Ishida
  • Patent number: 8274624
    Abstract: The present invention provides a liquid crystal panel that can provide a neutral display that is free from coloring in every direction. The liquid crystal panel includes a first polarizer 14a, a second polarizer 14b, and a liquid crystal cell 13. The first polarizer 14a is arranged on the visible side of the liquid crystal cell 13 and the second polarizer 14b is arranged on the backlight side of the liquid crystal cell 13. The liquid crystal panel further includes a first retardation layer 11 and a second retardation layer 12. A refractive index ellipsoid of the first retardation layer 11 has a relationship of nx=ny>nz, and a refractive index ellipsoid of the second retardation layer 12 has a relationship of nx>ny?nz. The first retardation layer 11 and the second retardation layer 12 are arranged between the liquid crystal cell 13 and the second polarizer 14b.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: September 25, 2012
    Assignee: Nitto Denko Corporation
    Inventors: Takeharu Kitagawa, Daisuke Hayashi, Hideki Ishida, Takeshi Nishibe, Nao Murakami
  • Publication number: 20120236470
    Abstract: An electrolytic capacitor comprises a wound body including a wound anode foil with a surface on which a dielectric layer is formed, a solid electrolyte layer formed on a surface of the dielectric layer, a cathode layer formed on a surface of the solid electrolyte layer over the outer circumference of the wound body, a plurality of anode leads electrically connected to the anode foil, and a plurality of cathode leads provided in one-to-one relationship with the anode leads and electrically connected to the cathode layer. The edge surface is a part of the surface of the wound body and crosses the winding axis of the wound body. Each of the cathode leads is electrically connected to an outer circumference of the cathode layer at a position near an anode lead corresponding to this cathode lead.
    Type: Application
    Filed: September 27, 2010
    Publication date: September 20, 2012
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventor: Hideki Ishida
  • Patent number: 8270462
    Abstract: An adaptive equalizer circuit includes an equalizer circuit configured to produce an output data signal in response to an equalizing factor, a data detecting circuit configured to detect a signal level of the output data signal in a given unit time at predetermined timing, a boundary detecting circuit configured to detect a signal level of the output data signal at a timing that is ½ unit time away from the predetermined timing, and a control unit configured to detect, multiple times, a pattern having consecutive data items of a first value followed by a data item of a second value, and to adjust the equalizing factor such that a data detection value and a boundary detection value obtained for the data item of the second value are equal to each other a certain percentage of times, and are different from each other substantially the same percentage of times.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: September 18, 2012
    Assignee: Fujitsu Limited
    Inventors: Hisakatsu Yamaguchi, Shunichiro Masaki, Hideki Ishida, Kohtaroh Gotoh
  • Patent number: 8118204
    Abstract: To provide a compact portable fastening tool which can be easily pushed at its handle portion onto a punched side, even in case a magazine is attached at an inclination with respect to the horizon, so that it can be easily used even in a narrow place. An electric fastening tool 1 comprises: a housing 2 having a handle portion 2B formed to extend from a trunk portion 2A; an ejection unit attached to the lower portion of the housing 2; a magazine 5 attached to the ejection unit; a motor housed in the housing 2; a battery pack 3 for driving the motor; a flywheel rotationally driven by the motor; a follower shaft selectively rotated by the kinetic energy of the flywheel; and a plunger adapted to be linearly moved in the housing 2 by the rotation of the follower shaft thereby to drive the nail fed into the ejection unit.
    Type: Grant
    Filed: September 1, 2006
    Date of Patent: February 21, 2012
    Assignee: Hitachi Koki Co., Ltd.
    Inventors: Hideki Ishida, Hitoshi Tsuzuki, Takeshi Matsuoka
  • Patent number: 8087556
    Abstract: An electric driver includes a hook portion which is constituted by a deformable hook-like portion and a connecting portion for connecting the hook-like portion to the handle. The hook-like portion is constituted by a base portion connected to the connecting portion and a bent portion continuous to the base portion, and a front end portion continuous to the bent portion and arranged at a position substantially opposed to the base portion. The front end portion and the base portion can be proximate to and remote from each other. The connecting portion holds the hook-like portion in a direction substantially the same as a direction in which the handle extends. The hook-like portion is pivotably held on a first rotating axis center extending in substantially the same direction as the handle.
    Type: Grant
    Filed: November 23, 2007
    Date of Patent: January 3, 2012
    Assignee: Hitachi Koki Co., Ltd.
    Inventors: Katsuhiro Oomori, Tomoyuki Hoshi, Hideki Ishida, Masato Sakai, Takuya Teranishi, Takeshi Taniguchi, Takuma Saito, Naoki Tadokoro, Hideyuki Hashimoto, Akira Oono
  • Publication number: 20100165264
    Abstract: The present invention provides a liquid crystal panel that can provide a neutral display that is free from coloring in every direction. The liquid crystal panel includes a first polarizer 14a, a second polarizer 14b, and a liquid crystal cell 13. The first polarizer 14a is arranged on the visible side of the liquid crystal cell 13 and the second polarizer 14b is arranged on the backlight side of the liquid crystal cell 13. The liquid crystal panel further includes a first retardation layer 11 and a second retardation layer 12. A refractive index ellipsoid of the first retardation layer 11 has a relationship of nx=ny>nz, and a refractive index ellipsoid of the second retardation layer 12 has a relationship of nx>ny?nz. The first retardation layer 11 and the second retardation layer 12 are arranged between the liquid crystal cell 13 and the second polarizer 14b.
    Type: Application
    Filed: May 27, 2008
    Publication date: July 1, 2010
    Applicant: NITTO DENKO CORPORATION
    Inventors: Takeharu Kitagawa, Daisuke Hayashi, Hideki Ishida, Takeshi Nishibe, Nao Murakami
  • Patent number: 7692814
    Abstract: Disclosed is the prevention of the occurrence of uneven image density, as well as the image degradation caused by inhibiting the continuity of image density, produced by the photoreceptor in which uneven electrification exists, and additionally uneven sensitivity coexists, without enlargement of the apparatus as well as increase in the cost. To the exposure amount obtained by the approximate linear transformation of the pixel gradation in each segment multi-divided in the surface of the photoreceptor drum 1, in all the pixel gradation including 0 level, exposing source 2 is controlled to expose with the amount of exposure, offset with only the offset exposure amount Ea which corresponds to the difference between the initial electric potential and the reference initial electric potential V0 of the segment. The exposure amount adjustment of the offset exposure amount Ea is conducted by offsetting the exposure time in each pixel.
    Type: Grant
    Filed: December 28, 2005
    Date of Patent: April 6, 2010
    Assignee: Kyocera Mita Corporation
    Inventors: Hideki Ishida, Shingo Yoshida, Hirohito Kondoh
  • Patent number: 7659766
    Abstract: A semiconductor integrated circuit device has a first MIS transistor of a first conductivity type, a second MIS transistor of a second conductivity type, a resistor connected in series between a first power-source line and a second power-source line, and a third MIS transistor of the first conductivity type. The third MIS transistor has a gate connected to a node where the first MIS transistor and the second MIS transistor are connected together, and a drain connected to a connection node where the second MIS transistor and the resistor are connected together.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: February 9, 2010
    Assignee: Fujitsu Limited
    Inventors: Hideki Ishida, Megumi Oono
  • Patent number: 7639329
    Abstract: The liquid crystal panel according to an embodiment of the present invention includes, in the stated order from a viewer side: a first polarizer; a first optical compensation layer; a liquid crystal cell; a second optical compensation layer; and a second polarizer, wherein: the first optical compensation layer has an absolute value of a photoelastic coefficient of 40×10?12 (m2/N) or less, has an in-plane retardation ?nd of 90 nm to 200 nm, has relationships of the following Expressions (1) and (2), and functions as a protective layer on a liquid crystal cell side of the first polarizer; and the second optical compensation layer has relationships of the following Expressions (3) and (4), ?nd(380)=?nd(550)=?nd(780)??(1) nx>ny>nz??(2) Rth(380)>Rth(550)>Rth(780)??(3) nx=ny>nz??(4).
    Type: Grant
    Filed: May 1, 2008
    Date of Patent: December 29, 2009
    Assignee: Nitto Denko Corporation
    Inventors: Kentarou Takeda, Takeharu Kitagawa, Daisuke Hayashi, Hideki Ishida, Nao Murakami, Junichi Nagase
  • Publication number: 20090310666
    Abstract: An adaptive equalizer circuit includes an equalizer circuit configured to produce an output data signal in response to an equalizing factor, a data detecting circuit configured to detect a signal level of the output data signal in a given unit time at predetermined timing, a boundary detecting circuit configured to detect a signal level of the output data signal at a timing that is ½ unit time away from the predetermined timing, and a control unit configured to detect, multiple times, a pattern having consecutive data items of a first value followed by a data item of a second value, and to adjust the equalizing factor such that a data detection value and a boundary detection value obtained for the data item of the second value are equal to each other a certain percentage of times, and are different from each other substantially the same percentage of times.
    Type: Application
    Filed: August 18, 2009
    Publication date: December 17, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Hisakatsu YAMAGUCHI, Shunichiro Masaki, Hideki Ishida, Kohtaroh Gotoh
  • Publication number: 20090266863
    Abstract: To provide a compact portable fastening tool which can be easily pushed at its handle portion onto a punched side, even in case a magazine is attached at an inclination with respect to the horizon, so that it can be easily used even in a narrow place. An electric fastening tool 1 comprises: a housing 2 having a handle portion 2B formed to extend from a trunk portion 2A; an ejection unit attached to the lower portion of the housing 2; a magazine 5 attached to the ejection unit; a motor housed in the housing 2; a battery pack 3 for driving the motor; a flywheel rotationally driven by the motor; a follower shaft selectively rotated by the kinetic energy of the flywheel; and a plunger adapted to be linearly moved in the housing 2 by the rotation of the follower shaft thereby to drive the nail fed into the ejection unit.
    Type: Application
    Filed: September 1, 2006
    Publication date: October 29, 2009
    Inventors: Hideki Ishida, Hitoshi Tsuzuki, Takeshi Matsuoka
  • Publication number: 20090238027
    Abstract: Disclosed are: an apparatus for kneading a rubber material which continuously performs a series of processes which are kneading a rubber material with a non-vulcanization compounding agent at the beginning, kneading it with a vulcanization compounding agent, and finally obtaining final kneaded rubber; and a kneading method using this kneading apparatus. Preparatory kneaded rubber having been kneaded in one internal mixer is selectively fed, by a distribution conveyor, to a group of kneading lines where at least two kneading lines are provided to be arranged side by side. Each of the kneading line consists of a plurality of open roll mixers serially connected with each other. Intermediate kneaded rubber resulted in having a target viscosity after having been kneaded in the group of kneading lines is kneaded with a vulcanization compounding agent, whereby final kneaded rubber is obtained.
    Type: Application
    Filed: October 18, 2005
    Publication date: September 24, 2009
    Applicant: THE YOKOHAMA RUBBER CO., LTD.
    Inventors: Yoichi Yamaguchi, Masashi Kida, Kazuo Miyasaka, Syunsuke Maruyama, Kenzuo Ogura, Takehisa Morimoto, Hideki Ishida, Yuuichirou Hisada, Hirohumi Immura, Hidenori Hirai, Masahiro Kurosawa
  • Publication number: 20090216705
    Abstract: An object of the present invention is to provide a method for conveniently analyzing sugar chain (isomer) structure using a sample of approximately 1 picomole, which is generally subjected to analysis in proteomics without using any sugar chain preparation. The present invention relates to a method for analyzing sugar chain structure, comprising a step of obtaining the fragmentation pattern of a test sugar chain through fragmentation of the test sugar chain and a step of predicting the structure of the test sugar chain through comparison of the sugar chain predicted fragmentation pattern data generated based on fragmentation pattern templates with the fragmentation pattern of the test sugar chain.
    Type: Application
    Filed: April 13, 2006
    Publication date: August 27, 2009
    Applicants: National Institute of Advanced Industrial Science and Technology, Mitsui Knowledge Industry Co., Ltd., Shimadzu Corporation
    Inventors: Akihiko Kameyama, Norihiro Kikuchi, Shuuichi Nakaya, Hideki Ishida, Hisashi Narimatsu
  • Patent number: 7557960
    Abstract: Uneven image density produced by photoreceptors, in which uneven electrification and sensitivity coexist, is limited economically and space efficiently. For each segment of the surface of the photoreceptor, individual memorizing of slope information K1 defining the slope of when a pixel gradation is approximately linear-transformed into exposure amount and, based upon K1 per segment, individual transforming of pixel gradation into the exposure amount (individual exposure amount transformation) is performed.
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: July 7, 2009
    Assignee: Kyocera Mita Corporation
    Inventors: Hideki Ishida, Chikara Ishihara, Shingo Yoshida
  • Publication number: 20080273153
    Abstract: The liquid crystal panel according to an embodiment of the present invention includes, in the stated order from a viewer side: a first polarizer; a first optical compensation layer; a liquid crystal cell; a second optical compensation layer; and a second polarizer, wherein: the first optical compensation layer has an absolute value of a photoelastic coefficient of 40×10?12 (m2/N) or less, has an in-plane retardation ?nd of 90 nm to 200 nm, has relationships of the following Expressions (1) and (2), and functions as a protective layer on a liquid crystal cell side of the first polarizer; and the second optical compensation layer has relationships of the following Expressions (3) and (4), ?nd(380)=?nd(550)=?nd(780) ??(1) nx>ny>nz ??(2) Rth(380)>Rth(550)>Rth(780) ??(3) nx=ny>nz.
    Type: Application
    Filed: May 1, 2008
    Publication date: November 6, 2008
    Applicant: NITTO DENKO CORPORATION
    Inventors: Kentarou TAKEDA, Takeharu KITAGAWA, Daisuke HAYASHI, Hideki ISHIDA, Nao MURAKAMI, Junichi NAGASE
  • Publication number: 20080204110
    Abstract: A level shift circuit for converting a first signal level into a second signal level, includes a load circuit connected to the second power supply voltage, a first high voltage-resistant transistor in which a drain is connected to the load circuit, and a predetermined constant voltage is applied to a gate, a source voltage control circuit controls a voltage level of the source of the first high voltage-resistant transistor in accordance with an input signal at the first signal level, and has a second low voltage-resistant transistor, and an output terminal which is connected between the drain of the first high voltage-resistant transistor and the load circuit for outputting an output signal at the second signal level. A gate insulating film of the low voltage-resistant transistor has a voltage resistance lower than that of a gate insulating film of the high voltage-resistant transistor.
    Type: Application
    Filed: February 22, 2008
    Publication date: August 28, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Hideki Ishida
  • Publication number: 20080185410
    Abstract: An electric driver includes a hook portion which is constituted by a hook-like portion and a connecting portion for connecting the hook-like portion to the handle. The hook-like portion is constituted by a base portion connected to the connecting portion and a bent portion continuous to the base portion and a front end portion continuous to the bent portion and arranged at a position substantially opposed to the base portion and can be deformed. The front end portion and the base portion can be proximate to and remote from each other. The connecting portion holds the hook-like portion in a state of being hung down in a direction substantially the same as a direction of extending the handle. The hook-like portion is held centering on a first rotating axis center extended in the direction of hanging down the hook-like portion pivotably relative to the handle.
    Type: Application
    Filed: November 23, 2007
    Publication date: August 7, 2008
    Inventors: Katsuhiro OOMORI, Tomoyuki Hoshi, Hideki Ishida, Masato Sakai, Takuya Teranishi, Takeshi Taniguchi, Takuma Saito, Naoki Tadokoro, Hideyuki Hashimoto, Akira Oono
  • Patent number: 7336135
    Abstract: An oscillator for ensuring the phase relationship between two resonant circuits coupled by a coupling circuit. A first resonant circuit outputs two signals having different phases, and a second resonant circuit outputs two signals having different phases. The coupling circuit includes a plurality of inverters connected in a ring manner, and couples the first resonant circuit and the second resonant circuit such that the two signals output from the first resonant circuit and the two signals output from the second resonant circuit have different phases. A filter is connected to the input side of each of the plurality of inverters. With this structure, a signal output from each of the plurality of inverters has either a phase lead or a phase lag according to the phase characteristics of the corresponding filter, and thus the phase relationship between the first resonant circuit and the second resonant circuit is ensured.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: February 26, 2008
    Assignee: Fujitsu Limited
    Inventors: Hirohito Higashi, Hideki Ishida