Abstract: The invention provides a process for fabricating a solid electrolytic capacitor of the chip type which process includes the steps of plating a fabrication frame comprising an anode terminal member and a cathode terminal member projecting from a pair of side frame members respectively so as to be opposed to each other, the anode terminal member being stepped so as to provide a lower portion toward the cathode terminal member, a hole extending vertically and being formed in each of the anode terminal member and a higher portion of the cathode terminal member, joining an anode lead of a capacitor element to an upper surface of the cathode terminal member and a bottom surface of the capacitor element to an upper surface of the lower portion of the cathode terminal member, forming a packaging resin portion around the capacitor element without permitting resin to ingress into the holes, and cutting the anode and cathode terminal members along vertical planes extending through the respective holes.

Abstract: The present invention provides a liquid crystal panel having a high contrast ratio in the front direction. The liquid crystal panel includes a first polarizing plate, a second polarizing plate, and a liquid crystal cell, in which the first polarizing plate is arranged on a display surface side and the second polarizing plate is arranged on a back surface side of the liquid crystal cell. The first polarizing plate includes a first polarizer and a first retardation layer arranged between the first polarizer and the liquid crystal cell. The second polarizing plate includes a second polarizer and a second retardation layer arranged between the second polarizer and the liquid crystal cell. An index ellipsoid of the first retardation layer satisfies nx>ny?nz, and an index ellipsoid of the second retardation layer satisfies nx=ny>nz. The transmittance of the second polarizing plate is greater than that of the first polarizing plate.

Abstract: An anode terminal or a cathode terminal is provided with an exposure portion that extends substantially perpendicularly to an arrangement direction of the two terminals and that have an end face exposed on a side face of a housing. At least the end face on the exposure portion is plated for improving the solder wettability. Furthermore, a front end portion of the exposure portion is bent upwards along a peripheral face of the housing.

Abstract: A differential amplifier circuit has a latch unit and a differential input portion. A minute current is kept to flow through the differential input portion. Therefore, the differential amplifier circuit can accurately amplify even a signal high in speed and small in amplitude.

Abstract: A clock recovery circuit has a phase comparator circuit, a phase adjusting circuit, and a duty cycle correction circuit. The phase comparator circuit carries out phase comparison between an input signal and an output signal, and outputs a phase control signal proportional to a phase difference between the input signal and the output signal. The phase adjusting circuit receives the phase control signal from the phase comparator circuit, adjusts the phase of the input signal, and produces the output signal, and the duty cycle correction circuit receives the output signal from the phase adjusting circuit, and corrects the duty cycle of the output signal.

Abstract: Such an image forming device is supplied as can prevent uneven density of images and enhance image quality, including an LED array control unit that controls driving of an LED print head and a selective-information-data feeding unit that feeds information data corresponding information selected from inherent selective information. The control unit is provided with a characteristic-data memory unit that memorizes a plurality of characteristic data concerning each of LED elements forming the LED array, a driving-current-correction-data calculation unit, an image-signals processing unit and an image-data correction calculation unit. The current-correction-data calculation unit reads out characteristic data from the characteristic-data memory unit, receives selected information data from the data feeding unit and calculates driving current correction data based on these data.

Abstract: The invention provides a process for fabricating a solid electrolytic capacitor of the chip type which process includes the steps of plating a fabrication frame comprising an anode terminal member and a cathode terminal member projecting from a pair of side frame members respectively so as to be opposed to each other, the anode terminal member being stepped so as to provide a lower portion toward the cathode terminal member, a hole extending vertically and being formed in each of the anode terminal member and a higher portion of the cathode terminal member, joining an anode lead of a capacitor element to an upper surface of the cathode terminal member and a bottom surface of the capacitor element to an upper surface of the lower portion of the cathode terminal member, forming a packaging resin portion around the capacitor element without permitting resin to ingress into the holes, and cutting the anode and cathode terminal members along vertical planes extending through the respective holes.

Abstract: The occurrence of uneven image density is presented, as well as image degradation caused by inhibiting the continuity of image density, produced by a photoreceptor in which uneven electrification exists, and additionally uneven sensitivity coexists without enlargement of the apparatus as well as increase in the cost. To the exposure amount obtained by the approximate linear transformation of the pixel gradation in each segment multi-divided in the surface of the photoreceptor drum, in all the pixel gradation including 0 level, an exposing source is controlled to exposure with the amount of exposure, offset with only the offset exposure amount Ea which corresponds to the difference between the initial electric potential and the reference initial electric potential V0 of the segment. The exposure amount adjustment of the offset exposure amount Ea is conducted by offsetting the exposure time in each pixel.

Abstract: An anode terminal or a cathode terminal is provided with an exposure portion that extends substantially perpendicularly to an arrangement direction of the two terminals and that have an end face exposed on a side face of a housing. At least the end face on the exposure portion is plated for improving the solder wettability. Furthermore, a front end portion of the exposure portion is bent upwards along a peripheral face of the housing.

Abstract: A solid electrolytic capacitor which includes a capacitor element in which a dielectric coating layer and a cathode layer are sequentially formed on a surface of an anode element having an anode lead member planted on one end surface thereof, an anode terminal connected with the anode lead member, a platy cathode terminal mounting the capacitor element thereon and connected with the cathode layer, and an enclosure resin coating the capacitor element, a part of the cathode terminal and a part of the anode terminal being exposed on a same plane from the enclosure resin. The cathode terminal is provided with a cathode exposed portion exposed from the enclosure resin in at least two locations on the same plane.

Abstract: A clock recovery circuit has a boundary detection/discrimination circuit to detect and discriminate a boundary in an input signal in accordance with a first signal. The clock recovery circuit performs clock recovery by controlling the timing of the first signal in accordance with the detected boundary, wherein boundary detection timing in the boundary detection/discrimination circuit is varied by controlling the first signal.

Abstract: An anode terminal or a cathode terminal is provided with an exposure portion that extends substantially perpendicularly to an arrangement direction of the two terminals and that have an end face exposed on a side face of a housing. At least the end face on the exposure portion is plated for improving the solder wettability. Furthermore, a front end portion of the exposure portion is bent upwards along a peripheral face of the housing.

Abstract: The present invention provides a solid electrolytic capacitor comprising a capacitor element in which a dielectric coating layer and a cathode layer are sequentially formed on a surface of an anode element having an anode lead member planted on one end surface thereof, an anode terminal connected with the anode lead member, a platy cathode terminal mounting the capacitor element thereon and connected with the cathode layer, and an enclosure resin coating the capacitor element, a part of the cathode terminal and a part of the anode terminal being exposed on a same plane from the enclosure resin. The cathode terminal is provided with a cathode exposed portion exposed from the enclosure resin in at least two locations on the same plane.

Abstract: The invention provides a process for fabricating a solid electrolytic capacitor of the chip type which process includes the steps of plating a fabrication frame comprising an anode terminal member and a cathode terminal member projecting from a pair of side frame members respectively so as to be opposed to each other, the anode terminal member being stepped so as to provide a lower portion toward the cathode terminal member, a hole extending vertically and being formed in each of the anode terminal member and a higher portion of the cathode terminal member, joining an anode lead of a capacitor element to an upper surface of the cathode terminal member and a bottom surface of the capacitor element to an upper surface of the lower portion of the cathode terminal member, forming a packaging resin portion around the capacitor element without permitting resin to ingress into the holes, and cutting the anode and cathode terminal members along vertical planes extending through the respective holes.

Abstract: [Object]The object of this invention is to prevent as much as possible the occurrence of uneven image density produced by photoreceptors, in which uneven electrification and uneven sensitivity coexist, without enlargement of an apparatus as well as increase in cost. [Solution] For each of segments of the surface of the photoreceptor, individually memorizing a slope information K1 which defines the slope of when a pixel gradation is approximately linear-transformed into exposure amount, and then, based upon K1 per segment, individually transforming the pixel gradation into the exposure amount (individual exposure amount transformation).

Abstract: The present invention provides a solid electrolytic capacitor comprising a capacitor element in which a dielectric coating layer and a cathode layer are sequentially formed on a surface of an anode element having an anode lead member planted on one end surface thereof, an anode terminal connected with the anode lead member, a platy cathode terminal mounting the capacitor element thereon and connected with the cathode layer, and an enclosure resin coating the capacitor element, a part of the cathode terminal and a part of the anode terminal being exposed on a same plane from the enclosure resin. The cathode terminal is provided with a cathode exposed portion exposed from the enclosure resin in at least two locations on the same plane.

Abstract: An anode terminal or a cathode terminal is provided with an exposure portion that extends substantially perpendicularly to an arrangement direction of the two terminals and that have an end face exposed on a side face of a housing. At least the end face on the exposure portion is plated for improving the solder wettability. Furthermore, a front end portion of the exposure portion is bent upwards along a peripheral face of the housing.

Abstract: The present invention provides a solid electrolytic capacitor comprising a capacitor element in which a dielectric coating layer and a cathode layer are sequentially formed on a surface of an anode element having an anode lead member planted on one end surface thereof, an anode terminal connected with the anode lead member, a platy cathode terminal mounting the capacitor element thereon and connected with the cathode layer, and an enclosure resin coating the capacitor element, a part of the cathode terminal and a part of the anode terminal being exposed on a same plane from the enclosure resin. The cathode terminal is provided with a cathode exposed portion exposed from the enclosure resin in at least two locations on the same plane.

Abstract: An oscillator for ensuring the phase relationship between two resonant circuits coupled by a coupling circuit. A first resonant circuit outputs two signals having different phases, and a second resonant circuit outputs two signals having different phases. The coupling circuit includes a plurality of inverters connected in a ring manner, and couples the first resonant circuit and the second resonant circuit such that the two signals output from the first resonant circuit and the two signals output from the second resonant circuit have different phases. A filter is connected to the input side of each of the plurality of inverters. With this structure, a signal output from each of the plurality of inverters has either a phase lead or a phase lag according to the phase characteristics of the corresponding filter, and thus the phase relationship between the first resonant circuit and the second resonant circuit is ensured.

Abstract: An image forming apparatus is provided that is capable of forming an image with excellent gradation quality without affected by variations in the sensitivity characteristic of the photoreceptor and the light quantity characteristic of the LED print head among individual products. A highest gradation appropriate exposure amount appropriate for the highest gradation is calculated from the sensitivity characteristic of the photoreceptor and the light quantity characteristic of the LED print head. Then, based on the highest gradation appropriate exposure amount, an appropriate lighting time of the LEDs that is appropriate for each gradation is calculated so that the increment of the exposure amount between the gradations including the first gradation, and the lighting times of the gradations are set based on the appropriate lighting times. Then, the LEDs are lit for the lighting time set in accordance with the gradation of the inputted image data.